lcd_func.c

Realtek 公司的RTD2523A芯片原厂source code,没有被修改过的。

#define __FUNC__

#include "Header\INCLUDE.H"


void WriteGamma(unsigned char code *arrayR, unsigned char code *arrayG, unsigned char code *arrayB)
{
    unsigned char   n   = 0;

    RTDSetBit(COLOR_CTRL_5D, 0xfb, 0x10);   // Disable GAMMA & Enable Access Channel

    // GAMMA_RED
    bRTD_SCSB   = 0;
    RTDSendAddr(RED_GAMMA_64, WRITE, N_INC);
    do
    {
        RTDSendByte(arrayR[n]);
    }
    while (++n);    // if n is 0xff, then n will be 0x00 after increased.
    
    RTDSendStop();
    
    // GAMMA_GREEN
    bRTD_SCSB   = 0;
    RTDSendAddr(GRN_GAMMA_65, WRITE, N_INC);
    do
    {
        RTDSendByte(arrayG[n]);
    }
    while (++n);

    RTDSendStop();
    
    //GAMMA_BLUE
    bRTD_SCSB   = 0;
    RTDSendAddr(BLU_GAMMA_66, WRITE, N_INC);
    do
    {
        RTDSendByte(arrayB[n]);
    }
    while (++n);

    RTDSendStop();
   
    RTDSetBit(COLOR_CTRL_5D, 0xef, 0x04);   // Enable GAMMA & Diable Access Channel
}

void WriteDither(unsigned char code *array, bit new_dither)
{
    unsigned char   n;
    
    RTDSetBit(FX_LST_LEN_H_5A, 0x7f, new_dither ? 0x80 : 0x00);

    RTDSetBit(COLOR_CTRL_5D, 0xb7, 0x68);   // Enable DITHER & Enable Access Channels

    bRTD_SCSB   = 0;
    RTDSendAddr(DITHER_PORT_67, WRITE, N_INC);

    for (n = 0; n < 8; n++)     RTDSendByte(array[n]);

    RTDSendStop();
    
	RTDSetBit(COLOR_CTRL_5D, 0x1f, 0x88);   // Enable DITHER & Disable Access Channels
}

void WriteSU_COEF(unsigned char code *arrayH, unsigned char code *arrayV)
{
    unsigned char   n;
    
    RTDSetBit(FILTER_CTRL1_1C, 0xfc, 0x01);     // Enable H-Coeff access

    bRTD_SCSB   = 0;
    RTDSendAddr(FILTER_PORT_1D, WRITE, N_INC);
    for (n = 0; n < 128; n++)    RTDSendByte(arrayH[n]);

    RTDSendStop();

    RTDSetBit(FILTER_CTRL1_1C, 0xfc, 0x03);     // Enable V-Coeff access
    
    bRTD_SCSB   = 0;
    RTDSendAddr(FILTER_PORT_1D, WRITE, N_INC);
    for (n = 0; n < 128; n++)    RTDSendByte(arrayV[n]);

    RTDSendStop();

    RTDSetBit(FILTER_CTRL1_1C, 0xfc, 0xc4);     // Disable filter coefficient access
}

void Set_H_Position(void)
{
    Disable_Watch_Dog(WATCH_DOG_FRAMESYNC);

    RTDRead(IPH_ACT_STA_06, 2, Y_INC);
    Data[2] = Data[1] & 0x07;
    Data[3] = Data[0];

    if (usIPH_ACT_STA != ((unsigned int *)Data)[1])
    {
        Wait_For_Event(EVENT_IEN_STOP);
        
        Data[0] = 5;
        Data[1] = Y_INC;
        Data[2] = IPH_ACT_STA_06;
        Data[3] = usIPH_ACT_STA;
        Data[4] = usIPH_ACT_STA >> 8;
        Data[5] = 0;    
        RTDWrite(Data);

        RTDSetByte(IHS_DELAY_8D, (stMUD.H_POSITION - ucH_Min_Margin) + PROGRAM_HDELAY);
    }

    // Update IHS delay according to phase
    Set_Phase(stMUD.PHASE);

	RTDSetByte(STATUS0_01, 0x00);  // Clear status
    RTDSetByte(STATUS1_1F, 0x00);  // Clear status
    
    Enable_Watch_Dog(WATCH_DOG_FRAMESYNC);
}


#define MAX_V_ADJUST_STEP   2

void Adjust_V_Position(void)
{
    unsigned int    usIV_Temp, usDV_Temp;

    if (ucV_Max_Margin  < stMUD.V_POSITION)
    {
        RTDSetByte(IVS_DELAY_8C, (PROGRAM_VDELAY + stMUD.V_POSITION - ucV_Max_Margin));
        usIV_Temp   = usIPV_ACT_STA + ucV_Max_Margin - 128;
        usDV_Temp   = (unsigned int)ucDV_Delay + ucV_Max_Margin - 128;
    }
    else
    {
        RTDSetByte(IVS_DELAY_8C, PROGRAM_VDELAY);
        usIV_Temp   = usIPV_ACT_STA + stMUD.V_POSITION - 128;
        usDV_Temp   = (unsigned int)ucDV_Delay + stMUD.V_POSITION - 128;
    }

    Wait_For_Event(EVENT_IEN_START);

    Data[0] = 4;
    Data[1] = N_INC;
    Data[2] = IV_DV_LINES_38;
    Data[3] = (unsigned char)usDV_Temp;
    Data[4] = 5;    
    Data[5] = Y_INC;
    Data[6] = IPV_ACT_STA_0A;
    Data[7] = (unsigned char)usIV_Temp;
    Data[8] = (unsigned char)(usIV_Temp >> 8);
    Data[9] = 0;
    RTDWrite(Data);

    // Just for safe
    Wait_For_Event(EVENT_DEN_STOP);

    RTDSetByte(STATUS0_01, 0x00);  // Clear status
    RTDSetByte(STATUS1_1F, 0x00);  // Clear status
}

void Set_V_Position(void)
{
    Disable_Watch_Dog(WATCH_DOG_FRAMESYNC | WATCH_DOG_DVTOTAL);

#if (PANEL_TYPE != PANEL_HYUNDAI)

    Adjust_V_Position();

#else

    static unsigned char idata ucPre_V_POS  = 0x80;

    unsigned char ucPosV    = stMUD.V_POSITION;

    do
    {
        if (stMUD.V_POSITION >= ucPre_V_POS)
		{
            Data[0]     = stMUD.V_POSITION - ucPre_V_POS;
            ucPre_V_POS += (Data[0] > MAX_V_ADJUST_STEP) ? MAX_V_ADJUST_STEP : Data[0];
		}
		else
		{
            Data[0]     = ucPre_V_POS - stMUD.V_POSITION;
            ucPre_V_POS -= (Data[0] > MAX_V_ADJUST_STEP) ? MAX_V_ADJUST_STEP : Data[0];
		}

        stMUD.V_POSITION    = ucPre_V_POS;
		Adjust_V_Position();

        stMUD.V_POSITION    = ucPosV;
	}
	while (stMUD.V_POSITION != ucPre_V_POS);

#endif

    Enable_Watch_Dog(WATCH_DOG_FRAMESYNC | WATCH_DOG_DVTOTAL);
}


void Set_Clock(void)
{
    unsigned char   ucM_Code, ucN_Code, ucTemp0, ucTemp1;

    unsigned int    usClock = usADC_Clock + (unsigned int)stMUD.CLOCK - 128;    // Pixel clock number
    unsigned long   ulRate  = (unsigned long)RTD_XTAL * usClock / usHsync;      // Pixel clock in kHz


    Disable_Watch_Dog(WATCH_DOG_FRAMESYNC | WATCH_DOG_NONLOCK);

#if (TUNE_APLL)
    RTDSetBit(DV_TOTAL_STATUS_3D, 0xdf, 0x00);  //Disable PE Max Measurement
    RTDSetByte(DV_TOTAL_STATUS_3D,0x40);        //clear PE Max value
#endif

#if (1)

    // New Method for searching suitable M/N code for PLL2

    ((unsigned int *)Data)[2]  = 100;

    ucTemp1    = 11;
    do
    {
        ucTemp0     = ((unsigned long)31 * APLL1_N_CODE * ucTemp1 * usClock) 
                    / ((unsigned long)32 * APLL1_M_CODE * usHsync);
        
        ((unsigned int *)Data)[0]   = ((unsigned long)3100 * APLL1_N_CODE * ucTemp1 * usClock)
                                    / ((unsigned long)APLL1_M_CODE * ucTemp0 * usHsync);

        if (3240 < ((unsigned int *)Data)[0])
        {
            ((unsigned int *)Data)[0]   = ((unsigned int *)Data)[0] - 3200;

            if (((unsigned int *)Data)[2] >= ((unsigned int *)Data)[0])
            {
                ((unsigned int *)Data)[2]   = ((unsigned int *)Data)[0];

                ucM_Code    = ucTemp0;
                ucN_Code    = ucTemp1;
            }

            ((unsigned int *)Data)[1]   = ((unsigned long)3100 * APLL1_N_CODE * ucTemp1 * usClock)
                                        / ((unsigned long)APLL1_M_CODE * (ucTemp0 + 1) * usHsync);
            ((unsigned int *)Data)[1]   = 3200 > ((unsigned int *)Data)[1] ? 3200 - ((unsigned int *)Data)[1]
                                        : ((unsigned int *)Data)[1] - 3200;
            
            if (40 > ((unsigned int *)Data)[1])
            {
                ucM_Code    = ucTemp0 + 1;
                ucN_Code    = ucTemp1;
                break;
            }

            if (((unsigned int *)Data)[2] >= ((unsigned int *)Data)[1])
            {
                ((unsigned int *)Data)[2]   = ((unsigned int *)Data)[1];

                ucM_Code    = ucTemp0 + 1;
                ucN_Code    = ucTemp1;
            }
        }
        else
        {
            ucM_Code    = ucTemp0;
            ucN_Code    = ucTemp1;
            break;
        }
    }
    while (++ucTemp1 < 48);

#else

    // Old Method for searching suitable M/N code for PLL2

    ((unsigned int *)Data)[0]  = 500;

    ucM_Code    = 0;
    ucN_Code    = 0;
    ucTemp0     = 11;
    do
    {
        ucTemp1 = ulRate * ucTemp0 / (unsigned long)BEST_FAV_FREQ;

        if (2 <= ucTemp1)
        {
            ((unsigned long *)Data)[2]  = ulRate * ucTemp0 / ucTemp1;
            ((unsigned int *)Data)[1]   = ((unsigned long)1600 * RTD_XTAL * APLL1_M_CODE / APLL1_N_CODE) 
                                        / ((unsigned long *)Data)[2];

            if (1550 <= ((unsigned int *)Data)[1])
            {
                if (1570 >= ((unsigned int *)Data)[1])
                {
                    ucN_Code    = ucTemp0;
                    ucM_Code    = ucTemp1;
                    break;
                }

                ((unsigned int *)Data)[1]   = ((unsigned int *)Data)[1] - 1550;
            }
            else
            {
                if (1530 <= ((unsigned int *)Data)[1])
                {
                    ucN_Code    = ucTemp0;
                    ucM_Code    = ucTemp1;
                    break;
                }
                
                ((unsigned int *)Data)[1]   = 1550 - ((unsigned int *)Data)[1];
            }
            
            if (((unsigned int *)Data)[0] > ((unsigned int *)Data)[1])
            {
                ((unsigned int *)Data)[0]   = ((unsigned int *)Data)[1];

                ucN_Code    = ucTemp0;
                ucM_Code    = ucTemp1;
            }
        }

        ucTemp1 = ucTemp1 + 1;

        if (2 <= ucTemp1)
        {
            ((unsigned long *)Data)[2]  = ulRate * ucTemp0 / ucTemp1;
            ((unsigned int *)Data)[1]   = ((unsigned long)1600 * RTD_XTAL * APLL1_M_CODE / APLL1_N_CODE) 
                                        / ((unsigned long *)Data)[2];

            if (1550 <= ((unsigned int *)Data)[1])
            {
                if (1570 >= ((unsigned int *)Data)[1])
                {
                    ucN_Code    = ucTemp0;
                    ucM_Code    = ucTemp1;
                    break;
                }

                ((unsigned int *)Data)[1]   = ((unsigned int *)Data)[1] - 1550;
            }
            else
            {
                if (1530 <= ((unsigned int *)Data)[1])
                {
                    ucN_Code    = ucTemp0;
                    ucM_Code    = ucTemp1;
                    break;
                }
                
                ((unsigned int *)Data)[1]   = 1550 - ((unsigned int *)Data)[1];
            }

            if (((unsigned int *)Data)[0] > ((unsigned int *)Data)[1])
            {
                ((unsigned int *)Data)[0]   = ((unsigned int *)Data)[1];

                ucN_Code    = ucTemp0;
                ucM_Code    = ucTemp1;
            }
        }
    }
    while (53 >= ++ucTemp0);

#endif

    Data[0]     = 5;
    Data[1]     = Y_INC;
    Data[2]     = PLL1_M_D7;
    Data[3]     = APLL1_M_CODE - 2;
    Data[4]     = APLL1_N_CODE - 2;
    Data[5]     = 0;
    RTDWrite(Data);

    RTDSetByte(I_CODE_LB_C9, 0x8c);
    RTDSetByte(I_CODE_MB_CA, 0x10);
    RTDSetByte(P_CODE_CB, 0x18);

    usClock     = usClock - 1;

    RTDSetByte(PLL2_M_DB, ucM_Code - 2);
    RTDSetByte(PLLDIV_HI_CC, (unsigned char)(usClock >> 8));

    Wait_For_Event(EVENT_IEN_STOP);

    RTDSetByte(PLL2_N_DC, ucN_Code - 2);
    RTDSetByte(PLLDIV_LO_CD, (unsigned char)usClock);

    PowerUp_ADC();

    Delay_Xms(10);

    Wait_For_Event(EVENT_IEN_STOP);

    if (ucI_Code)
    {
        RTDSetByte(I_CODE_LB_C9, 0x18 | ((ucI_Code & 0x07) << 5));
        RTDSetBit(I_CODE_MB_CA, 0xdc, ((ucI_Code & 0x80) ? 0x24 : 0x04) | ((ucI_Code & 0x18) >> 3));
        RTDSetByte(P_CODE_CB, P_Code_Value);
        ucI_Code    = ucI_Code & 0x7f;
    }
    else
    {
        // Use old PFD once
        RTDSetByte(I_CODE_LB_C9, 0x1C);
        RTDSetByte(I_CODE_MB_CA, 0x11);
        RTDSetByte(P_CODE_CB, 0x16);    
    }
 
    if (!bAutoInProgress)   Wait_For_Event(EVENT_IVS);

#if (TUNE_APLL)
    if (ucPE_Level)     Delay_Xms(2);
#endif

	RTDSetByte(STATUS0_01, 0x00);  // Clear status
    RTDSetByte(STATUS1_1F, 0x00);  // Clear status

    Enable_Watch_Dog(WATCH_DOG_FRAMESYNC | WATCH_DOG_NONLOCK);
} 

void Set_Phase(unsigned char phase)
{
    unsigned char   ucX_Ctrl, ucY_Ctrl, ucSelect;

    unsigned long   ulRate  = (unsigned long)RTD_XTAL * usADC_Clock / usHsync;  // Standard pixel clock in kHz

#if (MORE_PHASE)
    Data[0] = phase & 0x03;
#endif

    phase       = phase & 0x7c;
    ucSelect    = phase & 0x3c;
    phase       = phase >> 2;
    ucX_Ctrl    = (4 >= phase || 29 <= phase) ? 0x80 : (13 <= phase && 21 >= phase) ? 0x80 : 0x00;
    ucY_Ctrl    = (12 >= phase || 29 <= phase) ? 0x01 : 0x00;

#if (MORE_PHASE)
    ucY_Ctrl    = ucX_Ctrl | (ucSelect << 1) | ucY_Ctrl | (Data[0] << 1);
#else
    ucY_Ctrl    = ucX_Ctrl | (ucSelect << 1) | ucY_Ctrl;
#endif

    // Issac :
    // Code below is to select stable HSYNC latch edge.
    // There is about 11.5ns delay between input clock into ADC and output from ADC.
    // Calculating the corresponding phase delay for 11.5ns 
    // Original Formula :
	// ucSelect = 32 * 11.5 / (1000000 / ulRate);