📄 mode_detect.lst
字号:
521 4 #if (_TRUE == TMDS_ENABLE && _FALSE == SOURCE_AUTO_SCAN)
RTDCodeW(TMDS_MANUAL_OFF);
#endif
524 4 }
525 3 else
526 3 {
527 4 if (48 > ucRefresh || MAX_RATE < ucRefresh)
528 4 {
529 5 ucMode_Temp = MODE_NOSUPPORT; // We don't support vertical refresh rate lower than 5
-0Hz
530 5 }
531 4 else
532 4 {
533 5 ucMode_Temp = (SOURCE_VGA == (stGUD1.INPUT_SOURCE & 0x07)) ? VGA_Mode_Search(usHS_Puls
-e) : Seek_DVI_Mode();
534 5 #if (PARTIAL_DISP)
if (MODE_NOSUPPORT == ucMode_Temp && 0 != usIPV_ACT_LEN)
ucMode_Temp = Partial_Display();
#endif
538 5 }
C51 COMPILER V6.20c MODE_DETECT 04/15/2004 12:59:19 PAGE 10
539 4 }
540 3 }
541 2 }
542 1
543 1 if (SOURCE_VGA == (stGUD1.INPUT_SOURCE & 0x07) && SYNC_SOG == ucSync_Type)
544 1 {
545 2 if (MODE_NOSUPPORT == ucMode_Temp || 0 != (usHS_Pulse * 7 / usHsync))
546 2 {
547 3 // To prevent from SOG mode mistake
548 3 // HSYNC pulse width will never longer than 1/7*HSYNC period
549 3 ucMode_Temp = MODE_NOSIGNAL;
550 3 }
551 2 }
552 1
553 1 //-------------Check result-----------------------------------------
554 1 if (MODE_NOSUPPORT == ucMode_Temp || MODE_NOSIGNAL == ucMode_Temp)
555 1 {
556 2 if (MODE_NOSUPPORT != ucMode_Found && MODE_NOSIGNAL != ucMode_Found) ucMode_Times = 0;
557 2
558 2 ucMode_Found = ucMode_Temp;
559 2
560 2 if (NO_MODE_TIMES > ucMode_Times)
561 2 {
562 3 // Wait for signal stable
563 3 ucMode_Times ++;
564 3
565 3 if (SOURCE_DVI == (stGUD1.INPUT_SOURCE & 0x07))
566 3 {
567 4 // Enable the TMDS Hsync & Vsync error correction to improve the long cable image quality
568 4 RTDSetByte(TMDS_CORRECTION_FF, 0x03);
569 4 }
570 3 }
571 2 else
572 2 {
573 3 bStable = (ucMode_Curr == ucMode_Found) ? 1 : 0; // bStable must be cleared when mo
-de changed
574 3 ucMode_Curr = ucMode_Found;
575 3 ucMode_Times = NO_MODE_TIMES - 2;
576 3
577 3 if (SOURCE_VGA == (stGUD1.INPUT_SOURCE & 0x07))
578 3 {
579 4 // Search VGA input with other type of SYNC signal
580 4 Sync_Type_Switch();
581 4 }
582 3 else
583 3 {
584 4 // Disable the TMDS Hsync & Vsync error correction
585 4 RTDSetByte(TMDS_CORRECTION_FF, 0x00);
586 4 }
587 3 }
588 2 }
589 1 else
590 1 {
591 2 if (ucMode_Found != ucMode_Temp)
592 2 {
593 3 ucMode_Times = 1;
594 3 ucMode_Found = ucMode_Temp;
595 3
596 3 if (SOURCE_VGA == (stGUD1.INPUT_SOURCE & 0x07)) Sync_Type_Confirm();
597 3 }
598 2 else
599 2 {
C51 COMPILER V6.20c MODE_DETECT 04/15/2004 12:59:19 PAGE 11
600 3 Data[0] = (SOURCE_VGA == (stGUD1.INPUT_SOURCE & 0x07)) ? VGA_SEARCH_TIMES : DVI_SEARCH_TIMES;
601 3
602 3 if (Data[0] > ucMode_Times)
603 3 {
604 4 ucMode_Times ++;
605 4 }
606 3 else
607 3 {
608 4 bLIGHT_PWR = LIGHT_OFF; // Turn off BackLight for reset display
609 4
610 4 RTDSetByte(HOSTCTRL_02, 0x00); // Wake RTD up
611 4 RTDSetBit(OVL_CTRL_6D, 0xfe, 0x00); // Disable overlay control
612 4 RTDOSDW(OSD_Reset); // Clear OSD
613 4
614 4 ucMode_Curr = ucMode_Found; // Supported mode found
615 4 ucMode_Times = 0; // Reset mode timer
616 4 bStable = 0; // bStable must be cleared when mode changed
617 4
618 4 if (SOURCE_VGA == (stGUD1.INPUT_SOURCE & 0x07))
619 4 Display_VGA_Set(); // Set VGA Mode registers
620 4 else
621 4 Display_DVI_Set();
622 4 }
623 3 }
624 2 }
625 1 }
626
627 //------------------- Check VGA & DVI Mode -------------------//
628 void Check_Input_Mode(void)
629 {
630 1 // RTDRead(SYNC_POR_4C, 0x05, Y_INC);
631 1 RTDRead(SYNC_POR_4C, bFrameSync ? 1 : 5, Y_INC);
632 1
633 1 if (Data[0] & 0x02)
634 1 {
635 2 RTDSetByte(SYNC_POR_4C, ((stGUD1.INPUT_SOURCE & 0x07) == SOURCE_VGA) ? 0x20 : 0x00); // I
-nput signal time-out. Reset sync-processor
636 2
637 2 ucMode_Found = MODE_NOSUPPORT;
638 2 }
639 1 else
640 1 {
641 2 bVpole_Curr = (bit)(Data[0] & 0x08); // Current usVsync polarity
642 2 bHpole_Curr = (bit)(Data[0] & 0x04); // Current usHsync polarity
643 2
644 2 // Polarity must be correct
645 2 if ((bVpole_Curr != bVpole_Prev) || (bHpole_Curr != bHpole_Prev))
646 2 {
647 3 // Data[1]~Data[4] must remain unchanged in this block because they may contain HSYNC/VSYNC in
-formation
648 3
649 3 RTDRead(VGIP_SIGINV_05, 0x01, N_INC);
650 3
651 3 if (SOURCE_VGA == (stGUD1.INPUT_SOURCE & 0x07))
652 3 {
653 4 Data[0] &= 0xd7; // HS_RAW & VS positive
654 4
655 4 if (!bHpole_Curr) Data[0] |= 0x20;
656 4
657 4 if (!bVpole_Curr && SYNC_SS == ucSync_Type) Data[0] |= 0x08; // Seperate sync
658 4 }
659 3 else // if (SOURCE_DVI == (stGUD1.INPUT_SOURCE & 0x07))
C51 COMPILER V6.20c MODE_DETECT 04/15/2004 12:59:19 PAGE 12
660 3 {
661 4 Data[0] &= 0xf3; // VS & HS positive
662 4
663 4 if (!bHpole_Curr) Data[0] |= 0x04;
664 4 if (!bVpole_Curr) Data[0] |= 0x08;
665 4 }
666 3
667 3 RTDSetByte(VGIP_SIGINV_05, Data[0]);
668 3
669 3 ucMode_Found = MODE_NOSUPPORT;
670 3 }
671 2 else
672 2 {
673 3 if (bFrameSync)
674 3 {
675 4 ucMode_Found = ucMode_Curr;
676 4 }
677 3 else
678 3 {
679 4 Data[5] = Data[3];
680 4 Data[4] = Data[4] & 0x87;
681 4 Data[3] = Data[1];
682 4 Data[2] = Data[2] & 0x8f;
683 4 usHsync = ((unsigned int *)Data)[1]; // Current usHsync timing
684 4 usVsync = ((unsigned int *)Data)[2]; // Current usVsync timing
685 4
686 4 if (0x07ff <= usHsync || 0x07ff <= usVsync || 0 == usHsync || 0 == usVsync) // Check o
-verflow
687 4 {
688 5 ucMode_Found = MODE_NOSUPPORT;
689 5 }
690 4 else
691 4 {
692 5 if ((usHsync < (usStdHS - 1)) || (usHsync > (usStdHS + 3)) ||
693 5 (usVsync < (usStdVS - 1)) || (usVsync > (usStdVS + 3)))
694 5 {
695 6 ucMode_Found = MODE_NOSUPPORT;
696 6 }
697 5 else
698 5 {
699 6 ucMode_Found = ucMode_Curr;
700 6 }
701 5 }
702 4 }
703 3 }
704 2 }
705 1
706 1 if (MODE_NOSUPPORT == ucMode_Found)
707 1 {
708 2 Reset_Mode();
709 2 }
710 1 else
711 1 {
712 2 bStable = 1; // Set bStable to 1 when signal timing is stable.
713 2 }
714 1 }
715
716
717 unsigned char Seek_DVI_Mode()
718 {
719 1 #if (TMDS_ENABLE)
720 1
C51 COMPILER V6.20c MODE_DETECT 04/15/2004 12:59:19 PAGE 13
721 1 unsigned char Wait_Time_Cnt;
722 1
723 1 RTDSetByte(SYNC_POR_4C, 0x03); // Measure data enable width and height
724 1
725 1 Wait_Time_Cnt = 60;
726 1 do
727 1 {
728 2 Delay_Xms(1);
729 2 RTDRead(SYNC_POR_4C, 0x07, Y_INC);
730 2 }
731 1 while ((Data[0] & 0x02) && (--Wait_Time_Cnt));
732 1
733 1 Data[7] = Data[5];
734 1 Data[6] = Data[6] & 0x0f;
735 1 Data[5] = Data[3];
736 1 Data[4] = Data[4] & 0x87;
737 1 Data[3] = Data[1];
738 1 Data[2] = Data[2] & 0x8f;
739 1
740 1 // Measure Failed !!!
741 1 if ((0 == ((unsigned int *)Data)[1]) || (0x07ff <= ((unsigned int *)Data)[1]) ||
742 1 (0 == ((unsigned int *)Data)[2]) || (0x07ff <= ((unsigned int *)Data)[2]) ||
743 1 (0 == Wait_Time_Cnt))
744 1 {
745 2 RTDSetByte(SYNC_POR_4C, 0x00);
746 2
747 2 usADC_Clock = 0;
748 2 usIPV_ACT_LEN = 0;
749 2 usIPH_ACT_WID = 0;
750 2
751 2 return MODE_NOSUPPORT;
752 2 }
753 1
754 1 // Save IH_TOTAL in usADC_Clock
755 1 usADC_Clock = ((unsigned int *)Data)[1] * 2;
756 1
757 1 // Save input data enable width and height
758 1 usIPV_ACT_LEN = ((unsigned int *)Data)[2];
759 1 usIPH_ACT_WID = ((unsigned int *)Data)[3] * 2;
760 1
761 1 // We don't support input image less than 350 active lines
762 1 if (350 > usIPV_ACT_LEN) return MODE_NOSUPPORT;
763 1
764 1 // We only support 8N active width
765 1 usIPH_ACT_WID = (2 < (usIPH_ACT_WID & 0x0007)) ? ((usIPH_ACT_WID + 8) & 0xfff8) : (usIPH_ACT_WID & 0
-xfff8);
766 1
767 1 // We only support active width not larger than 1280
768 1 if (1280 < usIPH_ACT_WID) usIPH_ACT_WID = 1280;
769 1
770 1 // Calculate maximum usIPV_ACT_LEN limitation
771 1 ((unsigned int *)Data)[0] = (unsigned long)(usVsync - 1) * DISP_LEN / MIN_DV_TOTAL;
772 1
773 1 if (((unsigned int *)Data)[0] < usIPV_ACT_LEN) usIPV_ACT_LEN = ((unsigned int *)Data)[0];
774 1
775 1 // First, we try user-mode to fit the undefined mode for full-screen display.
776 1 Wait_Time_Cnt = MODE_USER720x400;
777 1 do
778 1 {
779 2 if (Mode_Preset[Wait_Time_Cnt][2] < CAP_WIN[Wait_Time_Cnt][4]) // V scale-down
780 2 {
781 3 // Larger scale-down ratio may need a larger DH_TOTAL.
C51 COMPILER V6.20c MODE_DETECT 04/15/2004 12:59:19 PAGE 14
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -