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来自「嵌入式risc处理器源码」· 代码 · 共 13 行

# Reading C:/Modeltech_6.1f/tcl/vsim/pref.tcl 
# //  ModelSim SE 6.1f May 12 2006 
# //
# //  Copyright 2006 Mentor Graphics Corporation
# //              All Rights Reserved.
# //
# //  THIS WORK CONTAINS TRADE SECRET AND 
# //  PROPRIETARY INFORMATION WHICH IS THE PROPERTY
# //  OF MENTOR GRAPHICS CORPORATION OR ITS LICENSORS
# //  AND IS SUBJECT TO LICENSE TERMS.
# //
#  OpenFile "C:/Documents and Settings/jerryzhang/Lb/embedded_risc/Verilog/parameter.v"