iom128.h

AVR megal128下的ucos_ii

#ifndef __iom128_h
#define __iom128_h

#warning "This header file may not be current. Please use iom128v.h instead"
#define  DDRF     (*(volatile unsigned char *)0x61)

#define  DDF7     7
#define  DDF6     6
#define  DDF5     5
#define  DDF4     4
#define  DDF3     3
#define  DDF2     2
#define  DDF1     1
#define  DDF0     0

#define  PORTF    (*(volatile unsigned char *)0x62)

#define  PORTF7     7
#define  PORTF6     6
#define  PORTF5     5
#define  PORTF4     4
#define  PORTF3     3
#define  PORTF2     2
#define  PORTF1     1
#define  PORTF0     0

#define  PING     (*(volatile unsigned char *)0x63)

#define  PING4    4
#define  PING3    3
#define  PING2    2
#define  PING1    1
#define  PING0    0

#define  DDRG     (*(volatile unsigned char *)0x64)

#define  DDG4    4
#define  DDG3    3
#define  DDG2    2
#define  DDG1    1
#define  DDG0    0

#define  PORTG    (*(volatile unsigned char *)0x65)

#define  PORTG4    4
#define  PORTG3    3
#define  PORTG2    2
#define  PORTG1    1
#define  PORTG0    0

#define  SPMCSR   (*(volatile unsigned char *)0x68)

#define  SPMIE    7
#define  RWWSB    6
#define  RWWSRE   4
#define  BLBSET   3
#define  PGWRT    2
#define  PGERS    1
#define  SPMEN    0

#define  EICRA    (*(volatile unsigned char *)0x6A)

#define  ISC31    7
#define  ISC30    6
#define  ISC21    5
#define  ISC20    4
#define  ISC11    3
#define  ISC10    2
#define  ISC01    1
#define  ISC00    0

#define  XMCRB    (*(volatile unsigned char *)0x6C)
#define  XMBK     7
#define XMM2    2
#define XMM1    1
#define XMM0    0

#define  XMCRA    (*(volatile unsigned char *)0x6D)

#define  OSCCAL   (*(volatile unsigned char *)0x6F)
#define  TWBR     (*(volatile unsigned char *)0x70)

#define  TWSR     (*(volatile unsigned char *)0x71)

#define  TWAR     (*(volatile unsigned char *)0x72)

#define  TWDR     (*(volatile unsigned char *)0x73)
#define  TWCR     (*(volatile unsigned char *)0x74)

#define  OCR1C    (*(volatile unsigned int *)0x78)
#define  OCR1CL   (*(volatile unsigned char *)0x78)
#define  OCR1CH   (*(volatile unsigned char *)0x79)

#define  TCCR1C   (*(volatile unsigned char *)0x7A)
#define  ETIFR    (*(volatile unsigned char *)0x7C)

#define  ETIMSK   (*(volatile unsigned char *)0x7D)

#define  ICR3     (*(volatile unsigned int *)0x80)
#define  ICR3L    (*(volatile unsigned char *)0x80)
#define  ICR3H    (*(volatile unsigned char *)0x81)

#define  OCR3C    (*(volatile unsigned int *)0x82)
#define  OCR3CL   (*(volatile unsigned char *)0x82)
#define  OCR3CH   (*(volatile unsigned char *)0x83)

#define  OCR3B    (*(volatile unsigned int *)0x84)
#define  OCR3BL   (*(volatile unsigned char *)0x84)
#define  OCR3BH   (*(volatile unsigned char *)0x85)

#define  OCR3A    (*(volatile unsigned int *)0x86)
#define  OCR3AL   (*(volatile unsigned char *)0x86)
#define  OCR3AH   (*(volatile unsigned char *)0x87)

#define  TCNT3    (*(volatile unsigned int *)0x88)
#define  TCNT3L   (*(volatile unsigned char *)0x88)
#define  TCNT3H   (*(volatile unsigned char *)0x89)

#define  TCCR3B   (*(volatile unsigned char *)0x8A)

#define  TCCR3A   (*(volatile unsigned char *)0x8B)

#define  TCCR3C   (*(volatile unsigned char *)0x8C)

#define  UBRR0H   (*(volatile unsigned char *)0x90)
#define  UCSR0C   (*(volatile unsigned char *)0x95)

#define  UBRR1    (*(volatile unsigned int *)0x98)
#define  UBRR1H   (*(volatile unsigned char *)0x98)
#define  UBRR1L   (*(volatile unsigned char *)0x99)

#define  UCSR1B   (*(volatile unsigned char *)0x9A)

#define  UCSR1A   (*(volatile unsigned char *)0x9B)

#define  UDR1     (*(volatile unsigned char *)0x9C)
#define  UCSR1C   (*(volatile unsigned char *)0x9D)

/* Input Pins, Port F */
#define PINF    (*(volatile unsigned char *)0x20)

/* Input Pins, Port E */
#define PINE    (*(volatile unsigned char *)0x21)

/* Data Direction Register, Port E */
#define DDRE    (*(volatile unsigned char *)0x22)

/* Data Register, Port E */
#define PORTE   (*(volatile unsigned char *)0x23)

/* ADC Low Byte */
#define ADC (*(volatile unsigned int *)0x24)
#define ADCL    (*(volatile unsigned char *)0x24)
#define ADCH    (*(volatile unsigned char *)0x25)

/* ADC Control and status register */
#define ADCSR   (*(volatile unsigned char *)0x26)

/* ADC Multiplexer select */
#define ADMUX   (*(volatile unsigned char *)0x27)

/* Analog Comparator Control and Status Register */
#define ACSR    (*(volatile unsigned char *)0x28)

/* UART Baud Rate Register  Low*/
#define UBRR0L    (*(volatile unsigned char *)0x29)

/* UART Baud Rate Register High*/
#define UBRR0H    (*(volatile unsigned char *)0x90)

/* UART Reg C*/
#define UCSR0C    (*(volatile unsigned char *)0x95)

/* UART Status Register B */
#define UCSR0B  (*(volatile unsigned char *)0x2A)

/* UART Status Register  A*/
#define UCSR0A  (*(volatile unsigned char *)0x2B)

/* UART I/O Data Register */
#define UDR0  (*(volatile unsigned char *)0x2C)

/* SPI Control Register */
#define SPCR    (*(volatile unsigned char *)0x2D)

/* SPI Status Register */
#define SPSR    (*(volatile unsigned char *)0x2E)

/* SPI I/O Data Register */
#define SPDR    (*(volatile unsigned char *)0x2F)

/* Input Pins, Port D */
#define PIND    (*(volatile unsigned char *)0x30)

/* Data Direction Register, Port D */
#define DDRD    (*(volatile unsigned char *)0x31)

/* Data Register, Port D */
#define PORTD   (*(volatile unsigned char *)0x32)

#define PINC   (*(volatile unsigned char *)0x33)
#define DDRC   (*(volatile unsigned char *)0x34)
/* Data Register, Port C */
#define PORTC   (*(volatile unsigned char *)0x35)

/* Input Pins, Port B */
#define PINB    (*(volatile unsigned char *)0x36)

/* Data Direction Register, Port B */
#define DDRB    (*(volatile unsigned char *)0x37)

/* Data Register, Port B */
#define PORTB   (*(volatile unsigned char *)0x38)

/* Input Pins, Port A */
#define PINA    (*(volatile unsigned char *)0x39)

/* Data Direction Register, Port A */
#define DDRA    (*(volatile unsigned char *)0x3A)

/* Data Register, Port A */
#define PORTA   (*(volatile unsigned char *)0x3B)

/* EEPROM Control Register */
#define EECR    (*(volatile unsigned char *)0x3C)

/* EEPROM Data Register */
#define EEDR    (*(volatile unsigned char *)0x3D)

/* EEPROM Address Register */
#define EEAR    (*(volatile unsigned int *)0x3E)
#define EEARL   (*(volatile unsigned char *)0x3E)
#define EEARH   (*(volatile unsigned char *)0x3F)

#define SFICR	(*(volatile unsigned char *)0x40)
/* Watchdog Timer Control Register */
#define WDTCR   (*(volatile unsigned char *)0x41)

#define OCDR   (*(volatile unsigned char *)0x42)
/* Timer2 Output Compare Register */
#define OCR2    (*(volatile unsigned char *)0x43)

/* Timer/Counter 2 */
#define TCNT2   (*(volatile unsigned char *)0x44)

/* Timer/Counter 2 Control register */ 
#define TCCR2   (*(volatile unsigned char *)0x45)

/* T/C 1 Input Capture Register */
#define ICR1    (*(volatile unsigned int *)0x46)
#define ICR1L   (*(volatile unsigned char *)0x46)
#define ICR1H   (*(volatile unsigned char *)0x47)

/* Timer/Counter1 Output Compare Register B */ 
#define OCR1B   (*(volatile unsigned int *)0x48)
#define OCR1BL  (*(volatile unsigned char *)0x48)
#define OCR1BH  (*(volatile unsigned char *)0x49)

/* Timer/Counter1 Output Compare Register A */
#define OCR1A   (*(volatile unsigned int *)0x4A)
#define OCR1AL  (*(volatile unsigned char *)0x4A)
#define OCR1AH  (*(volatile unsigned char *)0x4B)

/* Timer/Counter 1 */
#define TCNT1   (*(volatile unsigned int *)0x4C)
#define TCNT1L  (*(volatile unsigned char *)0x4C)
#define TCNT1H  (*(volatile unsigned char *)0x4D)

/* Timer/Counter 1 Control and Status Register */
#define TCCR1B  (*(volatile unsigned char *)0x4E)

/* Timer/Counter 1 Control Register */
#define TCCR1A  (*(volatile unsigned char *)0x4F)

/* Timer/Counter 0 Asynchronous Control & Status Register */
#define ASSR    (*(volatile unsigned char *)0x50)

/* Output Compare Register 0 */
#define OCR0    (*(volatile unsigned char *)0x51)

/* Timer/Counter 0 */
#define TCNT0   (*(volatile unsigned char *)0x52)

/* Timer/Counter 0 Control Register */
#define TCCR0   (*(volatile unsigned char *)0x53)

/* MCU Status Register */
#define MCUCSR   (*(volatile unsigned char *)0x54)

/* MCU general Control Register */
#define MCUCR   (*(volatile unsigned char *)0x55)

/* Timer/Counter Interrupt Flag Register */
#define TIFR    (*(volatile unsigned char *)0x56)

/* Timer/Counter Interrupt MaSK register */
#define TIMSK   (*(volatile unsigned char *)0x57)

/* 葂ternal Interrupt Flag Register */
#define EIFR    (*(volatile unsigned char *)0x58)

/* External Interrupt MaSK register */
#define EIMSK   (*(volatile unsigned char *)0x59)

/* External Interrupt Control Register */
#define EICRB    (*(volatile unsigned char *)0x5A)

/*RAM Page Z select register */
#define RAMPZ   (*(volatile unsigned char *)0x5B)

/* XDIV Divide control register */
#define XDIV    (*(volatile unsigned char *)0x5C)

/* Stack Pointer */
#define SP  (*(volatile unsigned int *)0x5D)
#define SPL (*(volatile unsigned char *)0x5D)
#define SPH (*(volatile unsigned char *)0x5E)

/* Status REGister */
#define SREG    (*(volatile unsigned char *)0x5F)

/* UCSR1C */
#define UMSEL1   6
#define UPM11    5
#define UPM10    4
#define USBS1    3
#define UCSZ11   2
#define UCSZ10   1
#define UCPOL1   0

/* UCSR0C */
#define UMSEL0   6
#define UPM01    5
#define UPM00    4
#define USBS0    3
#define UCSZ01   2
#define UCSZ00   1
#define UCPOL0   0

/* TCCR3C */
#define FOC3A    7
#define FOC3B    6
#define FOC3C    5

/* TCCR3A Timer/Counter A Control Register */ 
#define    COM3A1       7
#define    COM3A0       6
#define    COM3B1       5
#define    COM3B0       4
#define    COM3C1       3
#define    COM3C0       2
#define WGM31   1
#define WGM30   0

/* TCCR3B */
#define ICNC3   7
#define ICES3   6
#define WGM33   4
#define WGM32   3
#define CS32    2
#define CS31    1
#define CS30    0

/* ETIMSK */
#define TICIE3  5
#define OCIE3A  4
#define OCIE3B  3
#define TOIE3   2
#define OCIE3C  1
#define OCIE1C  0

/* ETIFR */
#define ICF3    5
#define OCF3A   4
#define OCF3B   3
#define TOV3    2
#define OCF3C   1
#define OCF1C   0

/* TCCR1C */
#define FOC1A    7
#define FOC1B    6
#define FOC1C    5

/* TWCR 2-wire Serial Interface */
#define TWINT   7
#define TWEA    6
#define TWSTA   5
#define TWSTO   4
#define TWWC    3
#define TWEN    2
#define TWIE    0

/* TWSR */
#define TWS7    7
#define TWS6    6
#define TWS5    5
#define TWS4    4
#define TWS3    3
#define TWPS1   1
#define TWPS0   0

/* TWAR */
#define TWA6    7
#define TWA5    6
#define TWA4    5
#define TWA3    4
#define TWA2    3
#define TWA1    2
#define TWA0    1
#define TWGCE   0

/* XMCRA */
#define SRL2    6
#define SRL1    5
#define SRL0    4
#define SRW01   3
#define SRW00   2
#define SRW11   1

#define BLB12   5
#define BLB11   4
#define BLB02   3
#define BLB01   2

/* XDIV Divide control register*/
#define    XDIVEN       7
#define    XDIV6        6
#define    XDIV5        5
#define    XDIV4        4
#define    XDIV3        3
#define    XDIV2        2
#define    XDIV1        1
#define    XDIV0        0

/* RAM Page Z select register */
#define     RAMPZ0      0

/* EICRB External Interrupt Control Register */ 
#define    ISC71        7
#define    ISC70        6