📄 os_cpu_a.lis
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0472 E990 LD R14,Y+
0474 D990 LD R13,Y+
0476 C990 LD R12,Y+
0478 B990 LD R11,Y+
047A A990 LD R10,Y+
047C 9990 LD R9,Y+
047E 8990 LD R8,Y+
0480 7990 LD R7,Y+
0482 6990 LD R6,Y+
0484 5990 LD R5,Y+
0486 4990 LD R4,Y+
0488 3990 LD R3,Y+
048A 2990 LD R2,Y+
048C 1990 LD R1,Y+
048E 0990 LD R0,Y+
0490
0490 0895 RET ; Note: RET instead of RETI
0492
0492
0492 ;/*$PAGE*/.
0492 ;********************************************************************************************************
0492 ; Uart1 udre ISR
0492 ;
0492 ; Description : This function is the ISR used to notify uC/OS-II that a system tick has occurred.
0492 ;
0492 ; The following C-like pseudo-code describe the operation being performed in the code below.
0492 ;
0492 ; Save all registers on the current task's stack:
0492 ; Use the PUSH_ALL macro
0492 ; Get the SREG, set Bit #7 and save onto the task's stack using -Y addressing
0492 ; Use the PUSH_SP macro to save the task's hardware stack pointer onto the current task's stack
0492 ; OSIntNesting++;
0492 ; if (OSIntNesting == 1) {
0492 ; OSTCBCur->OSTCBStkPtr = SP
0492 ; }
0492 ; Clear the interrupt; Not needed for the timer we used.
0492 ; Notify uC/OS-II that a tick has occured
0492 ; Notify uC/OS-II about end of ISR
0492 ; Restore all registers that were save on the current task's stack:
0492 ; Use the POP_SP macro to restore the task's hardware stack pointer
0492 ; Use the POP_SREG macro to restore the SREG register
0492 ; Use the POP_ALL macro to restore the remaining registers
0492 ; Return (DO NOT use a RETI instruction);
0492 ;********************************************************************************************************
0492 /*
0492 _uart1_udre_isr::
0492 0A92 ST -Y,R0
0494 1A92 ST -Y,R1
0496 2A92 ST -Y,R2
0498 3A92 ST -Y,R3
049A 4A92 ST -Y,R4
049C 5A92 ST -Y,R5
049E 6A92 ST -Y,R6
04A0 7A92 ST -Y,R7
04A2 8A92 ST -Y,R8
04A4 9A92 ST -Y,R9
04A6 AA92 ST -Y,R10
04A8 BA92 ST -Y,R11
04AA CA92 ST -Y,R12
04AC DA92 ST -Y,R13
04AE EA92 ST -Y,R14
04B0 FA92 ST -Y,R15
04B2 0A93 ST -Y,R16
04B4 1A93 ST -Y,R17
04B6 2A93 ST -Y,R18
04B8 3A93 ST -Y,R19
04BA 4A93 ST -Y,R20
04BC 5A93 ST -Y,R21
04BE 6A93 ST -Y,R22
04C0 7A93 ST -Y,R23
04C2 8A93 ST -Y,R24
04C4 9A93 ST -Y,R25
04C6 AA93 ST -Y,R26
04C8 BA93 ST -Y,R27
04CA EA93 ST -Y,R30
04CC FA93 ST -Y,R31
04CE 0BB7 IN R16,RAMPZ
04D0 0A93 ST -Y,R16
04D2 0FB7 IN R16,SREG ; Save the SREG but with interrupts enabled
04D4 0068 SBR R16,BIT07
04D6 0A93 ST -Y,R16
04D8 0EB7 IN R16,SPH
04DA 0A93 ST -Y,R16
04DC 0DB7 IN R16,SPL
04DE 0A93 ST -Y,R16
04E0
04E0 00910000 LDS R16,_OSIntNesting ; Notify uC/OS-II of ISR
04E4 0395 INC R16 ;
04E6 00930000 STS _OSIntNesting,R16 ;
04EA
04EA 0130 CPI R16,1 ; if (OSIntNesting == 1) {
04EC 31F4 BRNE uart1_udre_isr_1
04EE
04EE E0910000 LDS R30,_OSTCBCur ; OSTCBCur->OSTCBStkPtr = Y
04F2 F0910100 LDS R31,_OSTCBCur+1
04F6 C193 ST Z+,R28
04F8 D193 ST Z+,R29 ; }
04FA
04FA uart1_udre_isr_1:
04FA //CALL _Uart1Ud_Handler ; Handle the tick ISR
04FA
04FA 0E940000 CALL _OSIntExit ; Notify uC/OS-II about end of ISR
04FE
04FE 0991 LD R16,Y+
0500 0DBF OUT SPL,R16
0502 0991 LD R16,Y+
0504 0EBF OUT SPH,R16
0506 0991 LD R16,Y+
0508 0FBF OUT SREG,R16
050A 0991 LD R16,Y+
050C 0BBF OUT RAMPZ,R16
050E F991 LD R31,Y+
0510 E991 LD R30,Y+
0512 B991 LD R27,Y+
0514 A991 LD R26,Y+
0516 9991 LD R25,Y+
0518 8991 LD R24,Y+
051A 7991 LD R23,Y+
051C 6991 LD R22,Y+
051E 5991 LD R21,Y+
0520 4991 LD R20,Y+
0522 3991 LD R19,Y+
0524 2991 LD R18,Y+
0526 1991 LD R17,Y+
0528 0991 LD R16,Y+
052A F990 LD R15,Y+
052C E990 LD R14,Y+
052E D990 LD R13,Y+
0530 C990 LD R12,Y+
0532 B990 LD R11,Y+
0534 A990 LD R10,Y+
0536 9990 LD R9,Y+
0538 8990 LD R8,Y+
053A 7990 LD R7,Y+
053C 6990 LD R6,Y+
053E 5990 LD R5,Y+
0540 4990 LD R4,Y+
0542 3990 LD R3,Y+
0544 2990 LD R2,Y+
0546 1990 LD R1,Y+
0548 0990 LD R0,Y+
054A
054A 0895 RET ; Note: RET instead of RETI
054C */
054C ;/*$PAGE*/.
054C /*
054C ;********************************************************************************************************
054C ; Uart1 udre ISR
054C ;
054C ; Description : This function is the ISR used to notify uC/OS-II that a system tick has occurred.
054C ;
054C ; The following C-like pseudo-code describe the operation being performed in the code below.
054C ;
054C ; Save all registers on the current task's stack:
054C ; Use the PUSH_ALL macro
054C ; Get the SREG, set Bit #7 and save onto the task's stack using -Y addressing
054C ; Use the PUSH_SP macro to save the task's hardware stack pointer onto the current task's stack
054C ; OSIntNesting++;
054C ; if (OSIntNesting == 1) {
054C ; OSTCBCur->OSTCBStkPtr = SP
054C ; }
054C ; Clear the interrupt; Not needed for the timer we used.
054C ; Notify uC/OS-II that a tick has occured
054C ; Notify uC/OS-II about end of ISR
054C ; Restore all registers that were save on the current task's stack:
054C ; Use the POP_SP macro to restore the task's hardware stack pointer
054C ; Use the POP_SREG macro to restore the SREG register
054C ; Use the POP_ALL macro to restore the remaining registers
054C ; Return (DO NOT use a RETI instruction);
054C ;********************************************************************************************************
054C
054C ;_adc_isr::
054C ; PUSH_ALL ; Save all registers and status register
054C ; IN R16,SREG ; Save the SREG but with interrupts enabled
054C ; SBR R16,BIT07
054C ; ST -Y,R16
054C ; PUSH_SP ; Save the task's hardware stack pointer onto task's stack
054C ;
054C ; LDS R16,_OSIntNesting ; Notify uC/OS-II of ISR
054C ; INC R16 ;
054C ; STS _OSIntNesting,R16 ;
054C ;
054C ; CPI R16,1 ; if (OSIntNesting == 1) {
054C ; BRNE adc_isr_1
054C ;
054C ; LDS R30,_OSTCBCur ; OSTCBCur->OSTCBStkPtr = Y
054C ; LDS R31,_OSTCBCur+1
054C ; ST Z+,R28
054C ; ST Z+,R29 ; }
054C ;
054C ;adc_isr_1:
054C ; CALL _Adc_isr_Handler ; Handle the tick ISR
054C ;
054C ; CALL _OSIntExit ; Notify uC/OS-II about end of ISR
054C ;
054C ; POP_SP ; Restore the hardware stack pointer from task's stack
054C ; POP_SREG ; Restore the SREG register
054C ; POP_ALL ; Restore all registers
054C ;
054C ; RET ; Note: RET instead of RETI
054C
054C /*
054C //============================================================================//
054C // void int1_isr(void);
054C //============================================================================//
054C ;
054C ;_int1_isr::
054C 0A92 ST -Y,R0
054E 1A92 ST -Y,R1
0550 2A92 ST -Y,R2
0552 3A92 ST -Y,R3
0554 4A92 ST -Y,R4
0556 5A92 ST -Y,R5
0558 6A92 ST -Y,R6
055A 7A92 ST -Y,R7
055C 8A92 ST -Y,R8
055E 9A92 ST -Y,R9
0560 AA92 ST -Y,R10
0562 BA92 ST -Y,R11
0564 CA92 ST -Y,R12
0566 DA92 ST -Y,R13
0568 EA92 ST -Y,R14
056A FA92 ST -Y,R15
056C 0A93 ST -Y,R16
056E 1A93 ST -Y,R17
0570 2A93 ST -Y,R18
0572 3A93 ST -Y,R19
0574 4A93 ST -Y,R20
0576 5A93 ST -Y,R21
0578 6A93 ⌨️ 快捷键说明
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