📄 rt2661.h
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ULONG Rsvd1:29;
} field;
ULONG word;
} MAC_CSR1_STRUC, *PMAC_CSR1_STRUC;
#endif
//
// MAC_CSR2: STA MAC register 0
//
#ifdef BIG_ENDIAN
typedef union _MAC_CSR2_STRUC {
struct {
UCHAR Byte3; // MAC address byte 3
UCHAR Byte2; // MAC address byte 2
UCHAR Byte1; // MAC address byte 1
UCHAR Byte0; // MAC address byte 0
} field;
ULONG word;
} MAC_CSR2_STRUC, *PMAC_CSR2_STRUC;
#else
typedef union _MAC_CSR2_STRUC {
struct {
UCHAR Byte0; // MAC address byte 0
UCHAR Byte1; // MAC address byte 1
UCHAR Byte2; // MAC address byte 2
UCHAR Byte3; // MAC address byte 3
} field;
ULONG word;
} MAC_CSR2_STRUC, *PMAC_CSR2_STRUC;
#endif
//
// MAC_CSR3: STA MAC register 1
//
#ifdef BIG_ENDIAN
typedef union _MAC_CSR3_STRUC {
struct {
UCHAR Rsvd1;
UCHAR U2MeMask;
UCHAR Byte5; // MAC address byte 5
UCHAR Byte4; // MAC address byte 4
} field;
ULONG word;
} MAC_CSR3_STRUC, *PMAC_CSR3_STRUC;
#else
typedef union _MAC_CSR3_STRUC {
struct {
UCHAR Byte4; // MAC address byte 4
UCHAR Byte5; // MAC address byte 5
UCHAR U2MeMask;
UCHAR Rsvd1;
} field;
ULONG word;
} MAC_CSR3_STRUC, *PMAC_CSR3_STRUC;
#endif
//
// MAC_CSR4: BSSID register 0
//
#ifdef BIG_ENDIAN
typedef union _MAC_CSR4_STRUC {
struct {
UCHAR Byte3; // BSSID byte 3
UCHAR Byte2; // BSSID byte 2
UCHAR Byte1; // BSSID byte 1
UCHAR Byte0; // BSSID byte 0
} field;
ULONG word;
} MAC_CSR4_STRUC, *PMAC_CSR4_STRUC;
#else
typedef union _MAC_CSR4_STRUC {
struct {
UCHAR Byte0; // BSSID byte 0
UCHAR Byte1; // BSSID byte 1
UCHAR Byte2; // BSSID byte 2
UCHAR Byte3; // BSSID byte 3
} field;
ULONG word;
} MAC_CSR4_STRUC, *PMAC_CSR4_STRUC;
#endif
//
// MAC_CSR5: BSSID register 1
//
#ifdef BIG_ENDIAN
typedef union _MAC_CSR5_STRUC {
struct {
USHORT Rsvd:14;
USHORT BssIdMask:2; // 11: one BSSID, 00: 4 BSSID, 10 or 01: 2 BSSID
UCHAR Byte5; // BSSID byte 5
UCHAR Byte4; // BSSID byte 4
} field;
ULONG word;
} MAC_CSR5_STRUC, *PMAC_CSR5_STRUC;
#else
typedef union _MAC_CSR5_STRUC {
struct {
UCHAR Byte4; // BSSID byte 4
UCHAR Byte5; // BSSID byte 5
USHORT BssIdMask:2; // 11: one BSSID, 00: 4 BSSID, 10 or 01: 2 BSSID
USHORT Rsvd:14;
} field;
ULONG word;
} MAC_CSR5_STRUC, *PMAC_CSR5_STRUC;
#endif
//
// MAC_CSR8: SIFS/EIFS register
#ifdef BIG_ENDIAN
typedef union _MAC_CSR8_STRUC {
struct {
USHORT Eifs; // in unit of 1-us
UCHAR SifsAfterRxOfdm; // in unit of 1-us
UCHAR Sifs; // in unit of 1-us
} field;
ULONG word;
} MAC_CSR8_STRUC, *PMAC_CSR8_STRUC;
#else
typedef union _MAC_CSR8_STRUC {
struct {
UCHAR Sifs; // in unit of 1-us
UCHAR SifsAfterRxOfdm; // in unit of 1-us
USHORT Eifs; // in unit of 1-us
} field;
ULONG word;
} MAC_CSR8_STRUC, *PMAC_CSR8_STRUC;
#endif
//
// MAC_CSR9: Back-Off control register
//
#ifdef BIG_ENDIAN
typedef union _MAC_CSR9_STRUC {
struct {
ULONG Rsvd:15;
ULONG CWSelect:1; // 1: CWmin/Cwmax select from register, 0:select from TxD
ULONG CWMax:4; // Bit for Cwmax, default Cwmax is 1023 (2^10 - 1).
ULONG CWMin:4; // Bit for Cwmin. default Cwmin is 31 (2^5 - 1).
ULONG SlotTime:8; // Slot time, default is 20us for 802.11B
} field;
ULONG word;
} MAC_CSR9_STRUC, *PMAC_CSR9_STRUC;
#else
typedef union _MAC_CSR9_STRUC {
struct {
ULONG SlotTime:8; // Slot time, default is 20us for 802.11B
ULONG CWMin:4; // Bit for Cwmin. default Cwmin is 31 (2^5 - 1).
ULONG CWMax:4; // Bit for Cwmax, default Cwmax is 1023 (2^10 - 1).
ULONG CWSelect:1; // 1: CWmin/Cwmax select from register, 0:select from TxD
ULONG Rsvd:15;
} field;
ULONG word;
} MAC_CSR9_STRUC, *PMAC_CSR9_STRUC;
#endif
//
// MAC_CSR11: Power saving transition time register
//
#ifdef BG_ENDIAN
typedef union _MAC_CSR11_STRUC {
struct {
ULONG :12;
ULONG Sleep2AwakeLatency:4; // in unit of 1-TU
ULONG bAutoWakeupEnable:1;
ULONG NumOfTBTTBeforeWakeup:7; // Number of beacon before wakeup
ULONG DelayAfterLastTBTTBeforeWakeup:8; // Delay after Tbcn expired in units of 1-TU
} field;
ULONG word;
} MAC_CSR11_STRUC, *PMAC_CSR11_STRUC;
#else
typedef union _MAC_CSR11_STRUC {
struct {
ULONG DelayAfterLastTBTTBeforeWakeup:8; // Delay after Tbcn expired in units of 1-TU
ULONG NumOfTBTTBeforeWakeup:7; // Number of beacon before wakeup
ULONG bAutoWakeupEnable:1;
ULONG Sleep2AwakeLatency:4; // in unit of 1-TU
ULONG :12;
} field;
ULONG word;
} MAC_CSR11_STRUC, *PMAC_CSR11_STRUC;
#endif
//
// MAC_CSR12: Manual power control / status register (merge CSR20 & PWRCSR1)
//
#ifdef BIG_ENDIAN
typedef union _MAC_CSR12_STRUC {
struct {
ULONG :29;
ULONG ForceWakeup:1; // ForceWake has high privilege than PutToSleep when both set
ULONG PutToSleep:1;
ULONG CurrentPowerState:1; // 0:sleep, 1:awake
} field;
ULONG word;
} MAC_CSR12_STRUC, *PMAC_CSR12_STRUC;
#else
typedef union _MAC_CSR12_STRUC {
struct {
ULONG CurrentPowerState:1; // 0:sleep, 1:awake
ULONG PutToSleep:1;
ULONG ForceWakeup:1; // ForceWake has high privilege than PutToSleep when both set
ULONG :29;
} field;
ULONG word;
} MAC_CSR12_STRUC, *PMAC_CSR12_STRUC;
#endif
//
// MAC_CSR14: LED control register
//
#ifdef BIG_ENDIAN
typedef union _MAC_CSR14_STRUC {
struct {
ULONG :12;
ULONG SwLed2:1;
ULONG HwLedPolarity:1; // 0: active low, 1: active high
ULONG SwLed1:1; // s/w LED, 1: ON, 0: OFF
ULONG HwLed:1; // h/w TX activity, 1: normal OFF, blinking upon TX, 0: normal ON, blinking upon TX
ULONG OffPeriod:8; // Off period in unit of 1-ms, default 30ms
ULONG OnPeriod:8; // On period in unit of 1-ms, default 70ms
} field;
ULONG word;
} MAC_CSR14_STRUC, *PMAC_CSR14_STRUC;
#else
typedef union _MAC_CSR14_STRUC {
struct {
ULONG OnPeriod:8; // On period, default 70ms
ULONG OffPeriod:8; // Off period, default 30ms
ULONG HwLed:1; // h/w TX activity, 1: normal OFF, blinking upon TX, 0: normal ON, blinking upon TX
ULONG SwLed1:1; // s/w LED, 1: ON, 0: OFF
ULONG HwLedPolarity:1; // 0: active low, 1: active high
ULONG SwLed2:1;
ULONG :12;
} field;
ULONG word;
} MAC_CSR14_STRUC, *PMAC_CSR14_STRUC;
#endif
//
// TXRX_CSR0: TX/RX configuration register
//
#ifdef BIG_ENDIAN
typedef union TXRX_CSR0_STRUC {
struct {
ULONG :5;
ULONG TxWithoutWaitingSBox:1;
ULONG DropAckCts:1; // 1: drop received ACK and CTS
ULONG DropBcast:1; // Drop broadcast frames
ULONG DropMcast:1; // Drop multicast frames
ULONG DropVerErr:1; // Drop version error frame
ULONG DropToDs:1; // Drop fram ToDs bit is true
ULONG DropNotToMe:1; // Drop not to me unicast frame
ULONG DropControl:1; // Drop control frame
ULONG DropPhyErr:1; // Drop physical error
ULONG DropCRCErr:1; // Drop CRC error
ULONG DisableRx:1; // Disable Rx engine
ULONG AutoTxSeq:1; // 1: ASIC auto replace sequence# in outgoing frame
ULONG TsfOffset:6; // default is 24
ULONG RxAckTimeout:9;
} field;
ULONG word;
} TXRX_CSR0_STRUC, *PTXRX_CSR0_STRUC;
#else
typedef union _TXRX_CSR0_STRUC {
struct {
ULONG RxAckTimeout:9;
ULONG TsfOffset:6; // default is 24
ULONG AutoTxSeq:1; // 1: ASIC auto replace sequence# in outgoing frame
ULONG DisableRx:1; // Disable Rx engine
ULONG DropCRCErr:1; // Drop CRC error
ULONG DropPhyErr:1; // Drop physical error
ULONG DropControl:1; // Drop control frame
ULONG DropNotToMe:1; // Drop not to me unicast frame
ULONG DropToDs:1; // Drop fram ToDs bit is true
ULONG DropVerErr:1; // Drop version error frame
ULONG DropMcast:1; // Drop multicast frames
ULONG DropBcast:1; // Drop broadcast frames
ULONG DropAckCts:1; // 1: drop received ACK and CTS
ULONG TxWithoutWaitingSBox:1;
ULONG :5;
} field;
ULONG word;
} TXRX_CSR0_STRUC, *PTXRX_CSR0_STRUC;
#endif
//
// TXRX_CSR4: Auto-Responder/Tx-retry register
//
#ifdef BIG_ENDIAN
typedef union _TXRX_CSR4_STRUC {
struct {
ULONG ShortRetryLimit:4;
ULONG LongRetryLimit:4;
ULONG Rsv1:2;
ULONG OfdmTxRateDownStep:2; // 0:1-step, 1: 2-step, 2:3-step, 3:4-step
ULONG OfdmTxRateDownEnable:1; // 1:enable
ULONG AutoResponderPreamble:1; // 0:long, 1:short preamble
ULONG AutoResponderEnable:1;
ULONG AckCtsPsmBit:1;
ULONG Rsv2:5;
ULONG CntlFrameAckPolicy:3;
ULONG TxAckTimeout:8;
} field;
ULONG word;
} TXRX_CSR4_STRUC, *PTXRX_CSR4_STRUC;
#else
typedef union _TXRX_CSR4_STRUC {
struct {
ULONG TxAckTimeout:8;
ULONG CntlFrameAckPolicy:3;
ULONG Rsv2:5;
ULONG AckCtsPsmBit:1;
ULONG AutoResponderEnable:1;
ULONG AutoResponderPreamble:1; // 0:long, 1:short preamble
ULONG OfdmTxRateDownEnable:1; // 1:enable
ULONG OfdmTxRateDownStep:2; // 0:1-step, 1: 2-step, 2:3-step, 3:4-step
ULONG Rsv1:2;
ULONG LongRetryLimit:4;
ULONG ShortRetryLimit:4;
} field;
ULONG word;
} TXRX_CSR4_STRUC, *PTXRX_CSR4_STRUC;
#endif
//
// TXRX_CSR9: Synchronization control register
//
#ifdef BIG_ENDIAN
typedef union _TXRX_CSR9_STRUC {
struct {
ULONG TxTimestampCompensate:8;
ULONG :3;
ULONG bBeaconGen:1; // Enable beacon generator
ULONG bTBTTEnable:1;
ULONG TsfSyncMode:2; // Enable TSF sync, 00: disable, 01: infra mode, 10: ad-hoc mode
ULONG bTsfTicking:1; // Enable TSF auto counting
ULONG BeaconInterval:16; // in unit of 1/16 TU
} field;
ULONG word;
} TXRX_CSR9_STRUC, *PTXRX_CSR9_STRUC;
#else
typedef union _TXRX_CSR9_STRUC {
struct {
ULONG BeaconInterval:16; // in unit of 1/16 TU
ULONG bTsfTicking:1; // Enable TSF auto counting
ULONG TsfSyncMode:2; // Enable TSF sync, 00: disable, 01: infra mode, 10: ad-hoc mode
ULONG bTBTTEnable:1;
ULONG bBeaconGen:1; // Enable beacon generator
ULONG :3;
ULONG TxTimestampCompensate:8;
} field;
ULONG word;
} TXRX_CSR9_STRUC, *PTXRX_CSR9_STRUC;
#endif
//
// PHY_CSR3: BBP serial control register
//
#ifdef BIG_ENDIAN
typedef union _PHY_CSR3_STRUC {
struct {
ULONG :15;
ULONG Busy:1; // 1: ASIC is busy execute BBP programming.
ULONG fRead:1; // 0: Write BBP, 1: Read BBP
ULONG RegNum:7; // Selected BBP register
ULONG Value:8; // Register value to program into BBP
} field;
ULONG word;
} PHY_CSR3_STRUC, *PPHY_CSR3_STRUC;
#else
typedef union _PHY_CSR3_STRUC {
struct {
ULONG Value:8; // Register value to program into BBP
ULONG RegNum:7; // Selected BBP register
ULONG fRead:1; // 0: Write BBP, 1: Read BBP
ULONG Busy:1; // 1: ASIC is busy execute BBP programming.
ULONG :15;
} field;
ULONG word;
} PHY_CSR3_STRUC, *PPHY_CSR3_STRUC;
#endif
//
// PHY_CSR4: RF serial control register
//
#ifdef BIG_ENDIAN
typedef union _PHY_CSR4_STRUC {
struct {
ULONG Busy:1; // 1: ASIC is busy execute RF programming.
ULONG PLL_LD:1; // RF PLL_LD status
ULONG IFSelect:1; // 1: select IF to program, 0: select RF to program
ULONG NumberOfBits:5; // Number of bits used in RFRegValue (I:20, RFMD:22)
ULONG RFRegValue:24; // Register value (include register id) serial out to RF/IF chip.
} field;
ULONG word;
} PHY_CSR4_STRUC, *PPHY_CSR4_STRUC;
#else
typedef union _PHY_CSR4_STRUC {
struct {
ULONG RFRegValue:24; // Register value (include register id) serial out to RF/IF chip.
ULONG NumberOfBits:5; // Number of bits used in RFRegValue (I:20, RFMD:22)
ULONG IFSelect:1; // 1: select IF to program, 0: select RF to program
ULONG PLL_LD:1; // RF PLL_LD status
ULONG Busy:1; // 1: ASIC is busy execute RF programming.
} field;
ULONG word;
} PHY_CSR4_STRUC, *PPHY_CSR4_STRUC;
#endif
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