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📄 ofdm_13.mdl

📁 ofdm技术,this simulink is about ofdm .属于无线通信类的仿真
💻 MDL
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	    Open		    off
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	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
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	      OutDataType	      "sfix(16)"
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	    Block {
	      BlockType		      EnablePort
	      Name		      "Enable"
	      Ports		      []
	      Position		      [235, 20, 255, 40]
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	    Block {
	      BlockType		      Reference
	      Name		      "Multipath Rayleigh\nFading Channel"
	      Ports		      [1, 1]
	      Position		      [200, 81, 295, 139]
	      SourceBlock	      "commchan3/Multipath Rayleigh\nFading Channel"
	      SourceType	      "Multipath Rayleigh Fading Channel"
	      ShowPortLabels	      "FromPortIcon"
	      SystemSampleTime	      "-1"
	      FunctionWithSeparateData off
	      RTWMemSecFuncInitTerm   "Inherit from model"
	      RTWMemSecFuncExecute    "Inherit from model"
	      RTWMemSecDataConstants  "Inherit from model"
	      RTWMemSecDataInternal   "Inherit from model"
	      RTWMemSecDataParameters "Inherit from model"
	      maxDopplerShift	      " 100"
	      pathDelays	      "[0 1e-6, 3e-6]"
	      avgPathGaindB	      " [0 -3, -6]"
	      normalizePathGains      on
	      seed		      "73"
	      enableProbe	      "0"
	      openVisAtStart	      off
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	      Position		      [360, 103, 390, 117]
	      IconDisplay	      "Port number"
	      OutDataType	      "sfix(16)"
	      OutScaling	      "2^0"
	      OutputWhenDisabled      "reset"
	      InitialOutput	      "0+j*eps"
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	    Line {
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	      DstBlock		      "Multipath Rayleigh\nFading Channel"
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	  ParameterDataTypeMode	  "Inherit via internal rule"
	  ParameterDataType	  "sfix(16)"
	  ParameterScaling	  "2^0"
	  OutDataTypeMode	  "Inherit via internal rule"
	  OutDataType		  "sfix(16)"
	  OutScaling		  "2^0"
	  SaturateOnIntegerOverflow off
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	Block {
	  BlockType		  Reference
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	  Ports			  [2, 1]
	  Position		  [160, 190, 245, 230]
	  SourceBlock		  "dspsigops/Variable\nInteger Delay"
	  SourceType		  "Variable Integer Delay"
	  dmax			  "2*516"
	  ic			  "0"
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	  BlockType		  Outport
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	  IconDisplay		  "Port number"
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	Line {
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	  DstPort		  2
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	Line {
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	  DstBlock		  "Add"
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	Line {
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	Line {
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	  DstPort		  2
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	  DstBlock		  "Out1"
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	Line {
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	  DstBlock		  "Channel Enable \nGeneration"
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	  DstPort		  enable
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	  DstPort		  enable
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	  DstPort		  2
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	  Position		  [305, 361]
	  FontName		  "Arial"
	  FontSize		  16
	  FontWeight		  "bold"
	}
	Annotation {
	  Name			  "Note: The channel subsystems output ports are set so that \nwhen a subsytem is not enabled, it produces zeros."
	  Position		  [582, 385]
	}
      }
    }
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      Name		      "Channel Select"
      Ports		      [1, 1]
      Position		      [490, 140, 555, 170]
      BackgroundColor	      "magenta"
      SourceBlock	      "simulink/Math\nOperations/Slider\nGain"
      SourceType	      "Slider Gain"
      ShowPortLabels	      "FromPortIcon"
      SystemSampleTime	      "-1"
      FunctionWithSeparateData off
      RTWMemSecFuncInitTerm   "Inherit from model"
      RTWMemSecFuncExecute    "Inherit from model"
      RTWMemSecDataConstants  "Inherit from model"
      RTWMemSecDataInternal   "Inherit from model"
      RTWMemSecDataParameters "Inherit from model"
      low		      "0"
      gain		      "0"
      high		      "5"
    }
    Block {
      BlockType		      Product
      Name		      "De-rotate"
      Ports		      [2, 1]
      Position		      [425, 372, 455, 403]
      Orientation	      "left"
      BackgroundColor	      "cyan"
      CollapseMode	      "All dimensions"
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      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      SaturateOnIntegerOverflow	off
    }
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      Name		      "Discrete\nConstant1"
      Ports		      [0, 1]
      Position		      [145, 572, 225, 598]
      ShowName		      off
      SourceBlock	      "dspsrcs4/DSP\nConstant"
      SourceType	      "DSP Constant"
      ShowPortLabels	      "FromPortIcon"
      SystemSampleTime	      "-1"
      FunctionWithSeparateData off
      RTWMemSecFuncInitTerm   "Inherit from model"
      RTWMemSecFuncExecute    "Inherit from model"
      RTWMemSecDataConstants  "Inherit from model"
      RTWMemSecDataInternal   "Inherit from model"
      RTWMemSecDataParameters "Inherit from model"
      Value		      "nco_nominal"
      SampleMode	      "Discrete"
      discreteOutput	      "Sample-based (interpret vectors as 1-D)"
      continuousOutput	      "Sample-based"
      sampTime		      "2/F_nco"
      framePeriod	      "2/F_nco"
      additionalParams	      on
      allowOverrides	      on
      dataType		      "Inherit via back propagation"
      isSigned		      on
      wordLen		      "16"
      udDataType	      "sfix(16)"
      fracBitsMode	      "Best precision"
      numFracBits	      "15"
      InterpretAs1D	      "on"
      Ts		      "2/F_nco"
      FramebasedOutput	      "off"
    }
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      Name		      "Discrete\nConstant2"
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      Position		      [350, 51, 375, 79]
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      SourceBlock	      "dspsrcs4/DSP\nConstant"
      SourceType	      "DSP Constant"
      ShowPortLabels	      "FromPortIcon"
      SystemSampleTime	      "-1"
      FunctionWithSeparateData off
      RTWMemSecFuncInitTerm   "Inherit from model"
      RTWMemSecFuncExecute    "Inherit from model"
      RTWMemSecDataConstants  "Inherit from model"
      RTWMemSecDataInternal   "Inherit from model"
      RTWMemSecDataParameters "Inherit from model"
      Value		      "1"
      SampleMode	      "Discrete"
      discreteOutput	      "Sample-based (interpret vectors as 1-D)"
      continuousOutput	      "Sample-based"
      sampTime		      "inf"
      framePeriod	      "inf"
      additionalParams	      on
      allowOverrides	      on
      dataType		      "Inherit via back propagation"
      isSigned		      on
      wordLen		      "16"
      udDataType	      "sfix(16)"
      fracBitsMode	      "Best precision"
      numFracBits	      "15"
      InterpretAs1D	      "on"
      Ts		      "inf"
      FramebasedOutput	      "off"
    }
    Block {
      BlockType		      Reference
      Name		      "Discrete\nConstant3"
      Ports		      [0, 1]
      Position		      [290, 446, 315, 474]
      Orientation	      "left"
      ShowName		      off
      SourceBlock	      "dspsrcs4/DSP\nConstant"
      SourceType	      "DSP Constant"
      ShowPortLabels	      "FromPortIcon"
      SystemSampleTime	      "-1"
      FunctionWithSeparateData off
      RTWMemSecFuncInitTerm   "Inherit from model"
      RTWMemSecFuncExecute    "Inherit from model"
      RTWMemSecDataConstants  "Inherit from model"
      RTWMemSecDataInternal   "Inherit from model"
      RTWMemSecDataParameters "Inherit from model"
      Value		      "1"
      SampleMode	      "Discrete"
      discreteOutput	      "Sample-based (interpret vectors as 1-D)"
      continuousOutput	      "Sample-based"
      sampTime		      "inf"
      framePeriod	      "inf"
      additionalParams	      on
      allowOverrides	      on
      dataType		      "Inherit via back propagation"
      isSigned		      on
      wo

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