📄 75x_mrcc.c
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case MRCC_CKSYS_RTC:
if((MRCC_PLL == MRCC_PLL_Disabled) || (MRCC_PLL == MRCC_PLL_NoChange))
{
Status = SetCKSYS_RTC(MRCC_PLL);
}
break;
default:
Status = ERROR;
break;
}
return Status;
}
/*******************************************************************************
* Function Name : MRCC_HCLKConfig
* Description : Configures the AHB clock (HCLK).
* Input : - MRCC_HCLK: defines the AHB clock. This clock is derived
* from the system clock(CK_SYS).
* This parameter can be one of the following values:
* - MRCC_CKSYS_Div1: AHB clock = CK_SYS
* - MRCC_CKSYS_Div2: AHB clock = CK_SYS/2
* - MRCC_CKSYS_Div4: AHB clock = CK_SYS/4
* - MRCC_CKSYS_Div8: AHB clock = CK_SYS/8
* Output : None
* Return : None
*******************************************************************************/
void MRCC_HCLKConfig(u32 MRCC_HCLK)
{
u32 Temp = 0;
/* Clear HPRESC[1:0] bits */
Temp = MRCC->CLKCTL & MRCC_HPRESC_Reset_Mask;
/* Set HPRESC[1:0] bits according to MRCC_HCLK value */
Temp |= MRCC_HCLK;
/* Store the new value */
MRCC->CLKCTL = Temp;
}
/*******************************************************************************
* Function Name : MRCC_CKTIMConfig
* Description : Configures the TIM clock (CK_TIM).
* Input : - MRCC_CKTIM: defines the TIM clock. This clock is derived
* from the AHB clock(HCLK).
* This parameter can be one of the following values:
* - MRCC_HCLK_Div1: TIM clock = HCLK
* - MRCC_HCLK_Div2: TIM clock = HCLK/2
* - MRCC_HCLK_Div4: TIM clock = HCLK/4
* - MRCC_HCLK_Div8: TIM clock = HCLK/8
* Output : None
* Return : None
*******************************************************************************/
void MRCC_CKTIMConfig(u32 MRCC_CKTIM)
{
u32 Temp = 0;
/* Clear PPRESC[1:0] bits */
Temp = MRCC->CLKCTL & MRCC_PPRESC_Reset_Mask;
/* Set PPRESC[1:0] bits according to MRCC_CKTIM value */
Temp |= MRCC_CKTIM;
/* Store the new value */
MRCC->CLKCTL = Temp;
}
/*******************************************************************************
* Function Name : MRCC_PCLKConfig
* Description : Configures the APB clock (PCLK).
* Input : - MRCC_PCLK: defines the APB clock. This clock is derived
* from the TIM clock(CK_TIM).
* This parameter can be one of the following values:
* - MRCC_CKTIM_Div1: APB clock = CKTIM
* - MRCC_CKTIM_Div2: APB clock = CKTIM/2
* Output : None
* Return : None
*******************************************************************************/
void MRCC_PCLKConfig(u32 MRCC_PCLK)
{
if(MRCC_PCLK == MRCC_CKTIM_Div2)
{
MRCC->CLKCTL |= MRCC_CKTIM_Div2;
}
else
{
MRCC->CLKCTL &= MRCC_CKTIM_Div1;
}
}
/*******************************************************************************
* Function Name : MRCC_CKRTCConfig
* Description : Configures the RTC clock (CK_RTC).
* Input : - MRCC_CKRTC: specifies the clock source to be used as RTC
* clock.
* This parameter can be one of the following values:
* - MRCC_CKRTC_OSC4M_Div128
* - MRCC_CKRTC_OSC32K (OSC32K must be previously enabled
* using MRCC_OSC32KConfig() function)
* - MRCC_CKRTC_LPOSC (LPOSC must be previously enabled
* using MRCC_LPOSCConfig() function)
* Output : None
* Return : An ErrorStatus enumuration value:
* - SUCCESS: Clock configuration succeeded
* - ERROR: Clock configuration failed
*******************************************************************************/
ErrorStatus MRCC_CKRTCConfig(u32 MRCC_CKRTC)
{
u32 Tmp = 0;
if(((MRCC->CLKCTL & MRCC_CKOSCSEL_Set_Mask) != RESET) &&
((MRCC->CLKCTL & MRCC_CKSEL_Set_Mask) != RESET))
{
/* CK_RTC used as CK_SYS clock source */
return ERROR;
}
else
{
/* Clear CKRTCSEL[1:0] bits */
Tmp = MRCC->PWRCTRL & MRCC_CKRTCSEL_Reset_Mask;
/* Set CKRTCSEL[1:0] bits according to MRCC_CKRTC value */
Tmp |= MRCC_CKRTC;
/* Store the new value */
MRCC->PWRCTRL = Tmp;
}
return SUCCESS;
}
/*******************************************************************************
* Function Name : MRCC_CKUSBConfig
* Description : Configures the USB clock(CK_USB).
* Input : - MRCC_CKUSB: specifies the clock source to be used as USB
* clock.
* This parameter can be one of the following values:
* - MRCC_CKUSB_Internal(CK_PLL2 enabled)
* - MRCC_CKUSB_External(CK_PLL2 disabled)
* Output : None
* Return : An ErrorStatus enumuration value:
* - SUCCESS: Clock configuration succeeded
* - ERROR: Clock configuration failed
*******************************************************************************/
ErrorStatus MRCC_CKUSBConfig(u32 MRCC_CKUSB)
{
if(MRCC_CKUSB == MRCC_CKUSB_External)
{
/* Disable CK_PLL2 */
MRCC->CLKCTL &= MRCC_PLL2EN_Reset_Mask;
/* External USB clock selected */
MRCC->CLKCTL |= MRCC_CKUSB_External;
}
else
{
if((MRCC->CLKCTL & MRCC_PLLEN_LOCK_Mask) != RESET)
{ /* PLL enabled and locked */
/* Enable CK_PLL2 */
MRCC->CLKCTL |= MRCC_PLL2EN_Set_Mask;
/* Internal USB clock selected */
MRCC->CLKCTL &= MRCC_CKUSB_Internal;
}
else
{
/* PLL not enabled */
return ERROR;
}
}
return SUCCESS;
}
/*******************************************************************************
* Function Name : MRCC_ITConfig
* Description : Enables or disables the specified MRCC interrupts.
* Input : - MRCC_IT: specifies the MRCC interrupts sources to be
* enabled or disabled. This parameter can be any combination
* of the following values:
* - MRCC_IT_LOCK: PLL lock interrupt
* - MRCC_IT_NCKD: No Clock detected interrupt
* - NewState: new state of the MRCC interrupts.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void MRCC_ITConfig(u32 MRCC_IT, FunctionalState NewState)
{
if(NewState == ENABLE)
{
MRCC->CLKCTL |= MRCC_IT;
}
else
{
MRCC->CLKCTL &= ~MRCC_IT;
}
}
/*******************************************************************************
* Function Name : MRCC_PeripheralClockConfig
* Description : Enables or disables the specified peripheral clock.
* Input : - MRCC_Peripheral: specifies the peripheral to gates its
* clock. More than one peripheral can be selected using
* the 搢
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