📄 75x_dma.c
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/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
* File Name : 75x_dma.c
* Author : MCD Application Team
* Date First Issued : 03/10/2006 : V0.1
* Description : This file provides all the DMA software functions.
********************************************************************************
* History:
* 03/10/2006 : V0.1
********************************************************************************
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Includes ------------------------------------------------------------------*/
#include "75x_dma.h"
#include "75x_mrcc.h"
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* DMA enable */
#define DMA_Enable 0x0001
#define DMA_Disable 0xFFFE
/* DMA Last Buffer Sweep */
#define DMA_Last0_Enable_Mask 0x0001
#define DMA_Last0_Disable_Mask 0xFFFE
#define DMA_Last1_Enable_Mask 0x0002
#define DMA_Last1_Disable_Mask 0xFFFD
#define DMA_Last2_Enable_Mask 0x0004
#define DMA_Last2_Disable_Mask 0xFFFB
#define DMA_Last3_Enable_Mask 0x0008
#define DMA_Last3_Disable_Mask 0xFFF7
/* DMA Masks */
#define DMA_Stream0_MASK_Mask 0xFFEE
#define DMA_Stream0_CLR_Mask 0x0011
#define DMA_Stream0_LAST_Mask 0xFFFE
#define DMA_Stream1_MASK_Mask 0xFFDD
#define DMA_Stream1_CLR_Mask 0x0022
#define DMA_Stream1_LAST_Mask 0xFFFD
#define DMA_Stream2_MASK_Mask 0xFFBB
#define DMA_Stream2_CLR_Mask 0x0044
#define DMA_Stream2_LAST_Mask 0xFFFB
#define DMA_Stream3_MASK_Mask 0xFF77
#define DMA_Stream3_CLR_Mask 0x0088
#define DMA_Stream3_LAST_Mask 0xFFF7
#define DMA_SRCSize_Mask 0xFFE7
#define DMA_SRCBurst_Mask 0xFF9F
#define DMA_DSTSize_Mask 0xFE7F
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/*******************************************************************************
* Function Name : DMA_DeInit
* Description : Deinitializes the DMA streamX registers to their default reset
* values.
* Input : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
* Stream.
* Output : None
* Return : None
*******************************************************************************/
void DMA_DeInit(DMA_Stream_TypeDef* DMA_Streamx)
{
/* Reset streamx source base address register */
DMA_Streamx->SOURCEL = 0;
DMA_Streamx->SOURCEH = 0;
/* Reset streamx destination base address register */
DMA_Streamx->DESTL = 0;
DMA_Streamx->DESTH = 0;
/* Reset streamx maximum count register */
DMA_Streamx->MAX = 0;
/* Reset streamx control register */
DMA_Streamx->CTRL = 0;
/* Reset streamx last used buffer location register */
DMA_Streamx->LUBUFF = 0;
switch(*(u32*)&DMA_Streamx)
{
case DMA_Stream0_BASE:
/* Reset interrupt mask, clear and flag bits for stream0 */
DMA->MASK &= DMA_Stream0_MASK_Mask;
DMA->CLR |= DMA_Stream0_CLR_Mask;
DMA->LAST &= DMA_Stream0_LAST_Mask;
break;
case DMA_Stream1_BASE:
/* Reset interrupt mask, clear and flag bits for stream1 */
DMA->MASK &= DMA_Stream1_MASK_Mask;
DMA->CLR |= DMA_Stream1_CLR_Mask;
DMA->LAST &= DMA_Stream1_LAST_Mask;
break;
case DMA_Stream2_BASE:
/* Reset interrupt mask, clear and flag bits for stream2 */
DMA->MASK &= DMA_Stream2_MASK_Mask;
DMA->CLR |= DMA_Stream2_CLR_Mask;
DMA->LAST &= DMA_Stream2_LAST_Mask;
break;
case DMA_Stream3_BASE:
/* Reset interrupt mask, clear and flag bits for stream3 */
DMA->MASK &= DMA_Stream3_MASK_Mask;
DMA->CLR |= DMA_Stream3_CLR_Mask;
DMA->LAST &= DMA_Stream3_LAST_Mask;
break;
default:
break;
}
}
/*******************************************************************************
* Function Name : DMA_Init
* Description : Initializes the DMAx stream according to the specified
* parameters in the DMA_InitStruct.
* Input : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
* Stream.
* - DMA_InitStruct: pointer to a DMA_InitTypeDef structure that
* contains the configuration information for the specified
* DMA stream.
* Output : None
* Return : None
******************************************************************************/
void DMA_Init(DMA_Stream_TypeDef* DMA_Streamx, DMA_InitTypeDef* DMA_InitStruct)
{
/* set the buffer Size */
DMA_Streamx->MAX = DMA_InitStruct->DMA_BufferSize ;
/* Configure the incrementation of the current source Register */
if(DMA_InitStruct->DMA_SRC == DMA_SRC_INCR)
{
/* Increment current source register */
DMA_Streamx->CTRL |= DMA_SRC_INCR;
}
else
{
/* Current source register unchanged */
DMA_Streamx->CTRL &= DMA_SRC_NOT_INCR;
}
/* Configure the incrementation of the current destination Register */
if(DMA_InitStruct->DMA_DST == DMA_DST_INCR)
{
/* Increment current source register */
DMA_Streamx->CTRL |= DMA_DST_INCR;
}
else
{
/* Current source register unchanged */
DMA_Streamx->CTRL &= DMA_DST_NOT_INCR;
}
/* Clear source to DMA data width SOSIZE[1:0] bits */
DMA_Streamx->CTRL &= DMA_SRCSize_Mask;
/* Set the source to DMA data width */
DMA_Streamx->CTRL |= DMA_InitStruct->DMA_SRCSize;
/* Clear the DMA peripheral burst size SOBURST[1:0] bits */
DMA_Streamx->CTRL &= DMA_SRCBurst_Mask;
/* Set the DMA peripheral burst size */
DMA_Streamx->CTRL |= DMA_InitStruct->DMA_SRCBurst;
/* Clear destination to DMA dat width DESIZE[1:0] bits */
DMA_Streamx->CTRL &= DMA_DSTSize_Mask;
/* Set the destination to DMA data width */
DMA_Streamx->CTRL |= DMA_InitStruct->DMA_DSTSize;
/* Configure the circular mode */
if(DMA_InitStruct->DMA_Mode == DMA_Mode_Circular)
{
/* Set circular mode */
DMA_Streamx->CTRL |= DMA_Mode_Circular;
}
else
{
/* Set normal mode */
DMA_Streamx->CTRL &= DMA_Mode_Normal;
}
/* Configure the direction transfer */
if(DMA_InitStruct->DMA_DIR == DMA_DIR_PeriphDST)
{
/* Set peripheral as destination */
DMA_Streamx->CTRL |= DMA_DIR_PeriphDST;
}
else
{
/* Set peripheral as source */
DMA_Streamx->CTRL &= DMA_DIR_PeriphSRC;
}
/* Configure the memory to memory transfer only for stream3 */
if(DMA_Streamx == DMA_Stream3)
{
if(DMA_InitStruct->DMA_M2M == DMA_M2M_Enable)
{
/* Enable memory to memory transfer for stream3 */
DMA_Streamx->CTRL |= DMA_M2M_Enable;
}
else
{
/* Disable memory to memory transfer for stream3 */
DMA_Streamx->CTRL &= DMA_M2M_Disable;
}
}
/* Configure the source base address */
DMA_Streamx->SOURCEL = DMA_InitStruct->DMA_SRCBaseAddr;
DMA_Streamx->SOURCEH = DMA_InitStruct->DMA_SRCBaseAddr >> 16;
/* Configure the destination base address */
DMA_Streamx->DESTL = DMA_InitStruct->DMA_DSTBaseAddr;
DMA_Streamx->DESTH = DMA_InitStruct->DMA_DSTBaseAddr >> 16;
}
/*******************************************************************************
* Function Name : DMA_StructInit
* Description : Fills each DMA_InitStruct member with its default value.
* Input : DMA_InitStruct : pointer to a DMA_InitTypeDef structure
* which will be initialized.
* Output : None
* Return : None
*******************************************************************************/
void DMA_StructInit(DMA_InitTypeDef* DMA_InitStruct)
{
/* Initialize the DMA_BufferSize member */
DMA_InitStruct->DMA_BufferSize = 0;
/* initialize the DMA_SRCBaseAddr member */
DMA_InitStruct->DMA_SRCBaseAddr = 0;
/* Initialize the DMA_DSTBaseAddr member */
DMA_InitStruct ->DMA_DSTBaseAddr = 0;
/* Initialize the DMA_SRC member */
DMA_InitStruct->DMA_SRC = DMA_SRC_NOT_INCR;
/* Initialize the DMA_DST member */
DMA_InitStruct->DMA_DST = DMA_DST_NOT_INCR;
/* Initialize the DMA_SRCSize member */
DMA_InitStruct->DMA_SRCSize = DMA_SRCSize_Byte;
/* Initialize the DMA_SRCBurst member */
DMA_InitStruct->DMA_SRCBurst = DMA_SRCBurst_1Data;
/* Initialize the DMA_DSTSize member */
DMA_InitStruct->DMA_DSTSize = DMA_DSTSize_Byte;
/* Initialize the DMA_Mode member */
DMA_InitStruct->DMA_Mode = DMA_Mode_Normal;
/* Initialize the DMA_M2M member */
DMA_InitStruct->DMA_M2M = DMA_M2M_Disable;
/* Initialize the DMA_DIR member */
DMA_InitStruct->DMA_DIR = DMA_DIR_PeriphSRC;
}
/*******************************************************************************
* Function Name : DMA_Cmd
* Description : Enables or disables the specified DMA stream.
* Input : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
* Stream.
* - NewState: new state of the DMAx stream. This parameter can
* be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void DMA_Cmd(DMA_Stream_TypeDef* DMA_Streamx, FunctionalState NewState)
{
if(NewState == ENABLE)
{
/* Enable the selected DMA streamx */
DMA_Streamx->CTRL |= DMA_Enable;
}
else
{
/* Disable the selected DMA streamx */
DMA_Streamx->CTRL &= DMA_Disable;
}
}
/*******************************************************************************
* Function Name : DMA_ITConfig
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