📄 compositeimage.mdl
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LogVarNameModifier "rt_"
MatFileLogging on
MultiInstanceERTCode off
SupportNonFinite on
SupportComplex on
PurelyIntegerCode off
SupportContinuousTime on
SupportNonInlinedSFcns on
EnableShiftOperators on
ParenthesesLevel "Nominal"
PortableWordSizes off
ModelStepFunctionPrototypeControlCompliant off
CPPClassGenCompliant off
AutosarCompliant off
ExtMode off
ExtModeStaticAlloc off
ExtModeTesting off
ExtModeStaticAllocSize 1000000
ExtModeTransport 0
ExtModeMexFile "ext_comm"
ExtModeIntrfLevel "Level1"
RTWCAPISignals off
RTWCAPIParams off
RTWCAPIStates off
GenerateASAP2 off
}
PropName "Components"
}
}
hdlcoderui.hdlcc {
$ObjectID 12
Version "1.4.0"
Description "HDL Coder custom configuration component"
Name "HDL Coder"
Array {
Type "Cell"
Dimension 1
Cell ""
PropName "HDLConfigFile"
}
HDLCActiveTab "0"
}
PropName "Components"
}
Name "Configuration"
CurrentDlgPage "Solver"
ConfigPrmDlgPosition " [ 520, 285, 1400, 915 ] "
}
PropName "ConfigurationSets"
}
Simulink.ConfigSet {
$PropName "ActiveConfigurationSet"
$ObjectID 1
}
BlockDefaults {
Orientation "right"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
NamePlacement "normal"
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
ShowName on
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
}
LineDefaults {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
BlockParameterDefaults {
Block {
BlockType DataTypeConversion
OutMin "[]"
OutMax "[]"
OutDataTypeMode "Inherit via back propagation"
OutDataType "fixdt(1,16,0)"
OutScaling "[]"
OutDataTypeStr "Inherit: Inherit via back propagation"
LockScale off
ConvertRealWorld "Real World Value (RWV)"
RndMeth "Zero"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
}
System {
Name compositeImage
Location [265, 202, 1057, 711]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
ReportName "simulink-default.rpt"
Block {
BlockType Reference
Name "Compositing"
Ports [3, 1]
Position [445, 88, 550, 162]
DialogController "vipDDGCreate"
DialogControllerArgs "DataTag0"
SourceBlock "viptextngfix/Compositing"
SourceType "Compositing"
operation "Binary mask"
bFacSrc "Specify via dialog"
mFacSrc "Input port"
bFactor "0.75"
mFactor "1"
source "Specify via dialog"
coordinates "[0 0]"
firstCoeffMode "Same word length as input"
firstCoeffWordLength "16"
firstCoeffFracLength "15"
outputMode "Same as first input"
outputWordLength "32"
outputFracLength "10"
accumMode "Same as product output"
accumWordLength "32"
accumFracLength "10"
prodOutputMode "Binary point scaling"
prodOutputWordLength "32"
prodOutputFracLength "10"
roundingMode "Floor"
overflowMode off
LockScale off
}
Block {
BlockType Reference
Name "Compositing1"
Ports [3, 1]
Position [445, 218, 550, 292]
DialogController "vipDDGCreate"
DialogControllerArgs "DataTag1"
SourceBlock "viptextngfix/Compositing"
SourceType "Compositing"
operation "Binary mask"
bFacSrc "Specify via dialog"
mFacSrc "Input port"
bFactor "0.75"
mFactor "1"
source "Specify via dialog"
coordinates "[0 0]"
firstCoeffMode "Same word length as input"
firstCoeffWordLength "16"
firstCoeffFracLength "15"
outputMode "Same as first input"
outputWordLength "32"
outputFracLength "10"
accumMode "Same as product output"
accumWordLength "32"
accumFracLength "10"
prodOutputMode "Binary point scaling"
prodOutputWordLength "32"
prodOutputFracLength "10"
roundingMode "Floor"
overflowMode off
LockScale off
}
Block {
BlockType Reference
Name "Compositing2"
Ports [3, 1]
Position [450, 348, 555, 422]
DialogController "vipDDGCreate"
DialogControllerArgs "DataTag2"
SourceBlock "viptextngfix/Compositing"
SourceType "Compositing"
operation "Binary mask"
bFacSrc "Specify via dialog"
mFacSrc "Input port"
bFactor "0.75"
mFactor "1"
source "Specify via dialog"
coordinates "[0 0]"
firstCoeffMode "Same word length as input"
firstCoeffWordLength "16"
firstCoeffFracLength "15"
outputMode "Same as first input"
outputWordLength "32"
outputFracLength "10"
accumMode "Same as product output"
accumWordLength "32"
accumFracLength "10"
prodOutputMode "Binary point scaling"
prodOutputWordLength "32"
prodOutputFracLength "10"
roundingMode "Floor"
overflowMode off
LockScale off
}
Block {
BlockType DataTypeConversion
Name "Data Type Conversion"
Position [320, 107, 360, 143]
ShowName off
OutDataType "sfix(16)"
OutScaling "2^0"
RndMeth "Floor"
SaturateOnIntegerOverflow off
}
Block {
BlockType DataTypeConversion
Name "Data Type Conversion1"
Position [315, 237, 355, 273]
ShowName off
OutDataType "sfix(16)"
OutScaling "2^0"
RndMeth "Floor"
SaturateOnIntegerOverflow off
}
Block {
BlockType DataTypeConversion
Name "Data Type Conversion2"
Position [315, 367, 355, 403]
ShowName off
OutDataType "sfix(16)"
OutScaling "2^0"
RndMeth "Floor"
SaturateOnIntegerOverflow off
}
Block {
BlockType Reference
Name "Image From Workspace"
Tag "vipblks_nd"
Ports [0, 3]
Position [25, 89, 190, 151]
SourceBlock "vipsrcs/Image From Workspace"
SourceType "Image From Workspace"
ShowPortLabels "FromPortIcon"
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
ImageValue "myResults4"
Ts "inf"
imagePorts "Separate color signals"
ImageDataType "Inherit from 'Value'"
Signed on
WordLength "16"
sdImageDataType "sfix(16)"
FractionLengthMode "User-defined"
FractionLength "15"
OutPortLabels "R|G|B"
}
Block {
BlockType Reference
Name "Image From Workspace1"
Tag "vipblks_nd"
Ports [0, 1]
Position [20, 209, 185, 271]
SourceBlock "vipsrcs/Image From Workspace"
SourceType "Image From Workspace"
ShowPortLabels "FromPortIcon"
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
ImageValue "~registered"
Ts "inf"
imagePorts "One multidimensional signal"
ImageDataType "Inherit from 'Value'"
Signed on
WordLength "16"
sdImageDataType "sfix(16)"
FractionLengthMode "User-defined"
FractionLength "15"
OutPortLabels "R|G|B"
}
Block {
BlockType Reference
Name "Video To Workspace"
Ports [3]
Position [635, 220, 735, 290]
DialogController "vipDDGCreate"
DialogControllerArgs "DataTag3"
SourceBlock "vipsnks/Video To Workspace"
SourceType "Video To Workspace"
VariableName "vout"
NumInputs "3"
DataLimit "10"
DecimationFactor "1"
LogFi off
InPortLabels "R|G|B"
}
Line {
SrcBlock "Image From Workspace"
SrcPort 1
DstBlock "Compositing"
DstPort 1
}
Line {
SrcBlock "Image From Workspace1"
SrcPort 1
Points [55, 0]
Branch {
Points [0, -90]
Branch {
DstBlock "Compositing"
DstPort 3
}
Branch {
Points [0, -25]
DstBlock "Data Type Conversion"
DstPort 1
}
}
Branch {
Points [0, 15]
Branch {
Points [0, 25]
Branch {
DstBlock "Compositing1"
DstPort 3
}
Branch {
Points [0, 105]
Branch {
DstBlock "Data Type Conversion2"
DstPort 1
}
Branch {
Points [0, 25]
DstBlock "Compositing2"
DstPort 3
}
}
}
Branch {
DstBlock "Data Type Conversion1"
DstPort 1
}
}
}
Line {
SrcBlock "Data Type Conversion2"
SrcPort 1
DstBlock "Compositing2"
DstPort 2
}
Line {
SrcBlock "Image From Workspace"
SrcPort 2
Points [35, 0; 0, 110]
DstBlock "Compositing1"
DstPort 1
}
Line {
SrcBlock "Image From Workspace"
SrcPort 3
Points [30, 0; 0, 220]
DstBlock "Compositing2"
DstPort 1
}
Line {
SrcBlock "Compositing"
SrcPort 1
Points [45, 0; 0, 105]
DstBlock "Video To Workspace"
DstPort 1
}
Line {
SrcBlock "Compositing1"
SrcPort 1
DstBlock "Video To Workspace"
DstPort 2
}
Line {
SrcBlock "Compositing2"
SrcPort 1
Points [45, 0; 0, -105]
DstBlock "Video To Workspace"
DstPort 3
}
Line {
SrcBlock "Data Type Conversion1"
SrcPort 1
DstBlock "Compositing1"
DstPort 2
}
Line {
SrcBlock "Data Type Conversion"
SrcPort 1
DstBlock "Compositing"
DstPort 2
}
Annotation {
Name "Overlay Simulation Results with\nOdenwalder Results"
Position [37, 39]
HorizontalAlignment "left"
BackgroundColor "darkGreen"
DropShadow on
FontName "Arial"
FontSize 18
FontWeight "bold"
}
Annotation {
Name "See model callback functions for\ndetails on how data is loaded."
Position [124, 455]
FontName "Arial"
FontSize 14
}
}
}
MatData {
NumRecords 4
DataRecord {
Tag DataTag3
Data " %)30 . R 8 ( 0 % \" $ \" 0 . 2 8 ( ! "
" % \" $ ) 0 $ $@ %8 :0!D &4 ;P!4 &\\ 5P!3 X !( !@ @ $ "
" 4 ( 0 D ! 0 2 =@!I ' 9 !I &$ ; !O &< "
}
DataRecord {
Tag DataTag2
Data " %)30 . > 8 ( 0 % \" $ ! 0 . 2 8 ( ! "
" % \" $ ) 0 $ $@ $, ;P!M ' ;P!S &D = !E "
}
DataRecord {
Tag DataTag1
Data " %)30 . > 8 ( 0 % \" $ ! 0 . 2 8 ( ! "
" % \" $ ) 0 $ $@ $, ;P!M ' ;P!S &D = !E "
}
DataRecord {
Tag DataTag0
Data " %)30 . > 8 ( 0 % \" $ ! 0 . 2 8 ( ! "
" % \" $ ) 0 $ $@ $, ;P!M ' ;P!S &D = !E "
}
}
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