max1142.c

MAX1142是一款高性能的模入芯片

// MAX1142 模入芯片 14-Bit ADC, 200ksps, +5V Single-Supply
// ICC V6.13

#include <iom128v.h>
#include <macros.h>
#include "COMMON.h"

#define MAX1142_External_MODE	0xC0		//	只采集-12V－12V＋外部时钟＋24个脉冲
#define MAX1142_Internal_MODE	0xE0		//	只采集-12V－12V＋内部时钟＋24个脉冲

const unsigned char _Exchange_[8] = {0,4,2,6,1,5,3,7};//正常对位表
const unsigned char Exchange[8]   = {4,2,6,1,5,3,7,0};



////////////////////////////////////////////////////////////////////////////////////////////////
//(1)SCLK
//Serial Data Clock Input. Serial data on DIN is loaded on the rising edge of SCLK, 
//and serial data is updated on DOUT on the falling edge of SCLK. In external clock 
//mode, SCLK sets the conversion speed.
//(2)DIN
//Serial Data Input. Serial data on DIN is latched on the rising edge of SCLK.
//(3)CS
//Chip Select Input. Drive CS low to enable the serial interface. When CS is high, 
//DOUT is high-impedance.
//In external clock mode SSTRB is high-impedance when CS is high.
///////////////////////////////////////////////////////////////////////////////
//BIT7   BIT6    BIT5   BIT4 BIT3 BIT2 BIT1 BIT0
//(MSB) 		 	  	   			        (LSB)
//START UNI/BIP INT/EXT M1    M0   P2   P1   P0
///////////////////////////////////////////////////////////////////////////////
//7 (MSB) START The first logic “1” bit, after CS goes low, defines the beginning 
//	of the Control-Byte
//6 UNI/BIP 1 = unipolar, 0 = bipolar. Selects unipolar or bipolar conversion mode. 
//	In unipolar mode, analog input signals from 0 to +12V (MAX1142) or 0 to VREF 
//	(MAX1143) can be converted. In bipolar mode analog input signals from -12V to +12V
//	(MAX1142) or -VREF to +VREF (MAX1143) can be converted.
//5 INT/EXT Selects the internal or external conversion clock. 1=Internal,0=External.
//4,3 M1 M1 MODE
//	0 0 24 External clocks per conversion (short acquisition mode)
//	0 1 Start Calibration. Starts internal calibration
//	1 0 Software power-down mode
//  1 1 32 External clocks per conversion (long acquisition mode)
//2,1,0 P2 P1 P0
//	These three bits are stored in a port register and output to pins P2–P0 for use 
//	in addressing a MUX or PGA. These three bits are updated in the port register 
//	simultaneously when a new Control-Byte is written.

///////////////////////////////////////////////////////////////////////////
// 采用外部时钟模式
///////////////////////////////////////////////////////////////////////////
unsigned int MAX1142_external(unsigned char channel)
{
 	unsigned char i;
	unsigned char control;
	unsigned int num = 0;

	control = MAX1142_External_MODE + _Exchange_[channel];
	MAX1142_CS_0();							//	选择模入芯片
	for (i = 0 ; i < 8 ; i++)
	{
		if (control & 0x80)
		   MAX1142_DIN_1();
		else
		   MAX1142_DIN_0();
		MAX1142_SCLK_0();
		NOP();
		NOP();
		NOP();
		MAX1142_SCLK_1();	 				//	产生时钟上升沿通知MAX1142输入位数据								 	
		control <<= 1;
	}
	NOP();
	NOP();
	NOP();
	MAX1142_SCLK_0();
	for (i = 0 ; i < 16 ; i++)
	{
		num <<= 1;
		if (MAX1142_DOUT())
			num |= 0x01;
		MAX1142_SCLK_1();					//	Each bit is clocked out of DOUT at the falling edge of SCLK.
		NOP();	
		NOP();
		NOP();
		MAX1142_SCLK_0();
	}
	MAX1142_CS_1();									//	不选择模入芯片；
	num >>= 2;								//	bit0,bit1无效
	return (num);
}

///////////////////////////////////////////////////////////////////////////
// 采用内部时钟模式
///////////////////////////////////////////////////////////////////////////
unsigned int MAX1142_internal(unsigned char channel)
{
 	unsigned char i;
	unsigned char control = (channel&0x07)|MAX1142_Internal_MODE;
	unsigned int num = 0;

	MAX1142_CS_0();							//	选择模入芯片
	for (i = 0 ; i < 8 ; i++)
	{
		if (control & 0x80)
		   MAX1142_DIN_1();
		else
		   MAX1142_DIN_0();
		MAX1142_SCLK_0();
		NOP();
		NOP();
		NOP();
		MAX1142_SCLK_1();	 				//	产生时钟上升沿通知MAX1142输入位数据								 	
		control <<= 1;
	}
	MAX1142_CS_1();									//	不选择模入芯片；
	NOP();
	NOP();
	NOP();
	NOP();
	NOP();
	NOP();
	MAX1142_SCLK_0();
	while (!MAX1142_SSRTB());				//	等待SSRTB出现上升沿
	MAX1142_CS_0();							//	选择模入芯片
	MAX1142_SCLK_0();
	for (i = 0 ; i < 16 ; i++)
	{
		num <<= 1;
		if (MAX1142_DOUT())
			num |= 0x01;
		MAX1142_SCLK_1();					//	Each bit is clocked out of DOUT at the falling edge of SCLK.
		NOP();	
		NOP();	
		NOP();
		MAX1142_SCLK_0();
	}
	MAX1142_CS_1();									//	不选择模入芯片；
	num >>= 2;								//	bit0,bit1无效
	return (num);
}