📄 filter.csf.rpt
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| |muxlut:$00018| | 1 (1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 (1) | 0 (0) | 0 (0) | |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|lpm_mux:rom_mux|muxlut:$00036|muxlut:$00018 |
| |muxlut:$00020| | 9 (9) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9 (9) | 0 (0) | 0 (0) | |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|lpm_mux:rom_mux|muxlut:$00036|muxlut:$00020 |
| |muxlut:$00038| | 13 (0) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13 (0) | 0 (0) | 0 (0) | |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|lpm_mux:rom_mux|muxlut:$00038 |
| |muxlut:$00012| | 1 (1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 (1) | 0 (0) | 0 (0) | |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|lpm_mux:rom_mux|muxlut:$00038|muxlut:$00012 |
| |muxlut:$00014| | 1 (1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 (1) | 0 (0) | 0 (0) | |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|lpm_mux:rom_mux|muxlut:$00038|muxlut:$00014 |
| |muxlut:$00016| | 1 (1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 (1) | 0 (0) | 0 (0) | |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|lpm_mux:rom_mux|muxlut:$00038|muxlut:$00016 |
| |muxlut:$00018| | 1 (1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 (1) | 0 (0) | 0 (0) | |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|lpm_mux:rom_mux|muxlut:$00038|muxlut:$00018 |
| |muxlut:$00020| | 9 (9) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9 (9) | 0 (0) | 0 (0) | |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|lpm_mux:rom_mux|muxlut:$00038|muxlut:$00020 |
| |muxlut:$00040| | 13 (0) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13 (0) | 0 (0) | 0 (0) | |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|lpm_mux:rom_mux|muxlut:$00040 |
| |muxlut:$00012| | 1 (1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 (1) | 0 (0) | 0 (0) | |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|lpm_mux:rom_mux|muxlut:$00040|muxlut:$00012 |
| |muxlut:$00014| | 1 (1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 (1) | 0 (0) | 0 (0) | |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|lpm_mux:rom_mux|muxlut:$00040|muxlut:$00014 |
| |muxlut:$00016| | 1 (1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 (1) | 0 (0) | 0 (0) | |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|lpm_mux:rom_mux|muxlut:$00040|muxlut:$00016 |
| |muxlut:$00018| | 1 (1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 (1) | 0 (0) | 0 (0) | |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|lpm_mux:rom_mux|muxlut:$00040|muxlut:$00018 |
| |muxlut:$00020| | 9 (9) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9 (9) | 0 (0) | 0 (0) | |filter|filter_coef:rom_coef|altsyncram:altsyncram_component|lpm_mux:rom_mux|muxlut:$00040|muxlut:$00020 |
| |filter_con:cont| | 19 (19) | 18 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 (1) | 18 (18) | 0 (0) | |filter|filter_con:cont |
| |filter_shift:shift_reg| | 192 (192) | 192 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 (0) | 192 (192) | 0 (0) | |filter|filter_shift:shift_reg |
| |s_term:p_s_c| | 192 (0) | 192 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 (0) | 0 (0) | 192 (0) | |filter|s_term:p_s_c |
| |p_s:regs[10]| | 12 (12) | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 (0) | 0 (0) | 12 (12) | |filter|s_term:p_s_c|p_s:regs[10] |
| |p_s:regs[11]| | 12 (12) | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 (0) | 0 (0) | 12 (12) | |filter|s_term:p_s_c|p_s:regs[11] |
| |p_s:regs[12]| | 12 (12) | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 (0) | 0 (0) | 12 (12) | |filter|s_term:p_s_c|p_s:regs[12] |
| |p_s:regs[13]| | 12 (12) | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 (0) | 0 (0) | 12 (12) | |filter|s_term:p_s_c|p_s:regs[13] |
| |p_s:regs[14]| | 12 (12) | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 (0) | 0 (0) | 12 (12) | |filter|s_term:p_s_c|p_s:regs[14] |
| |p_s:regs[15]| | 12 (12) | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 (0) | 0 (0) | 12 (12) | |filter|s_term:p_s_c|p_s:regs[15] |
| |p_s:regs[16]| | 12 (12) | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 (0) | 0 (0) | 12 (12) | |filter|s_term:p_s_c|p_s:regs[16] |
| |p_s:regs[1]| | 12 (12) | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 (0) | 0 (0) | 12 (12) | |filter|s_term:p_s_c|p_s:regs[1] |
| |p_s:regs[2]| | 12 (12) | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 (0) | 0 (0) | 12 (12) | |filter|s_term:p_s_c|p_s:regs[2] |
| |p_s:regs[3]| | 12 (12) | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 (0) | 0 (0) | 12 (12) | |filter|s_term:p_s_c|p_s:regs[3] |
| |p_s:regs[4]| | 12 (12) | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 (0) | 0 (0) | 12 (12) | |filter|s_term:p_s_c|p_s:regs[4] |
| |p_s:regs[5]| | 12 (12) | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 (0) | 0 (0) | 12 (12) | |filter|s_term:p_s_c|p_s:regs[5] |
| |p_s:regs[6]| | 12 (12) | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 (0) | 0 (0) | 12 (12) | |filter|s_term:p_s_c|p_s:regs[6] |
| |p_s:regs[7]| | 12 (12) | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 (0) | 0 (0) | 12 (12) | |filter|s_term:p_s_c|p_s:regs[7] |
| |p_s:regs[8]| | 12 (12) | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 (0) | 0 (0) | 12 (12) | |filter|s_term:p_s_c|p_s:regs[8] |
| |p_s:regs[9]| | 12 (12) | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 (0) | 0 (0) | 12 (12) | |filter|s_term:p_s_c|p_s:regs[9] |
+----------------------------------------------+-------------+-----------+-------------+--------------+---------+-----------+-----------+------+--------------+--------------+-------------------+------------------+----------------------------------------------------------------------------------------------------------+
+-----------------------------------------------------------------------------+
| Equations |
+-----------------------------------------------------------------------------+
The equations can be found in E:\w_fir\Quartus\filter.eqn.htm.
+-----------------------------------------------------------------------------+
| Device Options |
+-----------------------------------------------------------------------------+
+------------------------------------------------------------------+--------------------------+
| Option | Setting |
+------------------------------------------------------------------+--------------------------+
| Auto-restart configuration after error | Off |
| Release clears before tri-states | Off |
| Enable user-supplied start-up clock (CLKUSR) | Off |
| Enable device-wide reset (DEV_CLRn) | Off |
| Enable device-wide output enable (DEV_OE) | Off |
| Enable INIT_DONE output | Off |
| Auto-increment JTAG user code for multiple configuration devices | On |
| Disable CONF_DONE and nSTATUS pull-ups on configuration device | Off |
| Generate compressed bitstreams | Off |
| Generate Tabular Text File (.ttf) | Off |
| Generate Raw Binary File (.rbf) | Off |
| Generate Hexadecimal Output File (.hexout) | Off |
| Configuration scheme | Passive Serial |
| Hexadecimal Output File count direction | Up |
| Hexadecimal Output File start address | 0 |
| Reserve all unused pins | As output driving ground |
| Configuration device | EPC2 |
| Base pin-out file on sameframe device | Off |
| Auto user code | Off |
| Configuration device auto user code | Off |
+------------------------------------------------------------------+--------------------------+
+-----------------------------------------------------------------------------+
| Resource Usage Summary |
+-----------------------------------------------------------------------------+
+----------------------------+--------------------------------+
| Resource | Usage |
+----------------------------+--------------------------------+
| Logic cells | 672 / 25,660 ( 2 % ) |
| Registers | 446 / 27,451 ( 1 % ) |
| User inserted logic cells | 0 |
| I/O pins | 49 / 597 ( 8 % ) |
| Clock pins | 0 |
| Dedicated input pins | 0 |
| Global signals | 0 |
| M512s | 0 / 224 ( 0 % ) |
| M4Ks | 0 / 138 ( 0 % ) |
| M-RAMs | 0 / 2 ( 0 % ) |
| <name not available>s | 256 |
| Total memory bits | 1,048,576 / 1,944,576 ( 53 % ) |
| Total RAM block bits | 0 / 1,944,576 ( 0 % ) |
| DSP block 9-bit elements | 0 / 80 ( 0 % ) |
| PLLs | 0 / 6 ( 0 % ) |
| Global clocks | 0 / 16 ( 0 % ) |
| Regional clocks | 0 / 16 ( 0 % ) |
| Fast regional clocks | 0 / 8 ( 0 % ) |
| DIFFIOCLKs | 0 / 16 ( 0 % ) |
| SERDES transmitters | 0 / 78 ( 0 % ) |
| SERDES receivers | 0 / 78 ( 0 % ) |
| Maximum fan-out node | g_clk |
| Maximum fan-out | 702 |
| Total fan-out | 6142 |
| Average fan-out | 6.29 |
+----------------------------+--------------------------------+
+-----------------------------------------------------------------------------+
| Resource Utilization by Entity |
+-----------------------------------------------------------------------------+
+----------------------------------------------+-------------+-----------+-------------+--------------+---------+-----------+-----------+------+--------------+--------------+-------------------+------------------+-------------------------------------------------------------------⌨️ 快捷键说明
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