hubni.h

上传linux-jx2410的源代码

	struct  {
		bdrkreg_t	pr_link_reset_out         :	 1;
                bdrkreg_t       pr_port_reset             :      1;
                bdrkreg_t       pr_local_reset            :      1;
                bdrkreg_t       pr_rsvd                   :     61;
	} ni_port_reset_fld_s;
} ni_port_reset_u_t;

#else

typedef union ni_port_reset_u {
	bdrkreg_t	ni_port_reset_regval;
	struct	{
		bdrkreg_t	pr_rsvd			  :	61;
		bdrkreg_t	pr_local_reset		  :	 1;
		bdrkreg_t	pr_port_reset		  :	 1;
		bdrkreg_t	pr_link_reset_out	  :	 1;
	} ni_port_reset_fld_s;
} ni_port_reset_u_t;

#endif



/************************************************************************
 *                                                                      *
 *  This register contains the warm reset enable bit.                   *
 *                                                                      *
 ************************************************************************/




#ifdef LITTLE_ENDIAN

typedef union ni_reset_enable_u {
	bdrkreg_t	ni_reset_enable_regval;
	struct  {
		bdrkreg_t	re_reset_ok               :	 1;
                bdrkreg_t       re_rsvd                   :     63;
	} ni_reset_enable_fld_s;
} ni_reset_enable_u_t;

#else

typedef union ni_reset_enable_u {
	bdrkreg_t	ni_reset_enable_regval;
	struct	{
		bdrkreg_t	re_rsvd			  :	63;
		bdrkreg_t	re_reset_ok		  :	 1;
	} ni_reset_enable_fld_s;
} ni_reset_enable_u_t;

#endif




/************************************************************************
 *                                                                      *
 *  This register contains parameters for diagnostics.                  *
 *                                                                      *
 ************************************************************************/




#ifdef LITTLE_ENDIAN

typedef union ni_diag_parms_u {
	bdrkreg_t	ni_diag_parms_regval;
	struct  {
		bdrkreg_t	dp_send_data_error        :	 1;
                bdrkreg_t       dp_port_disable           :      1;
                bdrkreg_t       dp_send_err_off           :      1;
                bdrkreg_t       dp_rsvd                   :     61;
	} ni_diag_parms_fld_s;
} ni_diag_parms_u_t;

#else

typedef union ni_diag_parms_u {
	bdrkreg_t	ni_diag_parms_regval;
	struct	{
		bdrkreg_t	dp_rsvd			  :	61;
		bdrkreg_t	dp_send_err_off		  :	 1;
		bdrkreg_t	dp_port_disable		  :	 1;
		bdrkreg_t	dp_send_data_error	  :	 1;
	} ni_diag_parms_fld_s;
} ni_diag_parms_u_t;

#endif




/************************************************************************
 *                                                                      *
 *  This register contains the virtual channel selection control for    *
 * outgoing messages from the Bedrock.                                  *
 *                                                                      *
 ************************************************************************/




#ifdef LITTLE_ENDIAN

typedef union ni_channel_control_u {
	bdrkreg_t	ni_channel_control_regval;
	struct  {
		bdrkreg_t	cc_vch_one_request        :	 1;
                bdrkreg_t       cc_vch_two_request        :      1;
                bdrkreg_t       cc_vch_nine_request       :      1;
                bdrkreg_t       cc_vch_vector_request     :      1;
                bdrkreg_t       cc_vch_one_reply          :      1;
                bdrkreg_t       cc_vch_two_reply          :      1;
                bdrkreg_t       cc_vch_nine_reply         :      1;
                bdrkreg_t       cc_vch_vector_reply       :      1;
                bdrkreg_t       cc_send_vch_sel           :      1;
                bdrkreg_t       cc_rsvd                   :     55;
	} ni_channel_control_fld_s;
} ni_channel_control_u_t;

#else

typedef union ni_channel_control_u {
	bdrkreg_t	ni_channel_control_regval;
	struct	{
		bdrkreg_t	cc_rsvd			  :	55;
		bdrkreg_t	cc_send_vch_sel		  :	 1;
		bdrkreg_t	cc_vch_vector_reply	  :	 1;
		bdrkreg_t	cc_vch_nine_reply	  :	 1;
		bdrkreg_t	cc_vch_two_reply	  :	 1;
		bdrkreg_t	cc_vch_one_reply	  :	 1;
		bdrkreg_t	cc_vch_vector_request	  :	 1;
		bdrkreg_t	cc_vch_nine_request	  :	 1;
		bdrkreg_t	cc_vch_two_request	  :	 1;
		bdrkreg_t	cc_vch_one_request	  :	 1;
	} ni_channel_control_fld_s;
} ni_channel_control_u_t;

#endif




/************************************************************************
 *                                                                      *
 *  This register allows access to the LLP test logic.                  *
 *                                                                      *
 ************************************************************************/




#ifdef LITTLE_ENDIAN

typedef union ni_channel_test_u {
	bdrkreg_t	ni_channel_test_regval;
	struct  {
		bdrkreg_t	ct_testseed               :	20;
                bdrkreg_t       ct_testmask               :      8;
                bdrkreg_t       ct_testdata               :     20;
                bdrkreg_t       ct_testvalid              :      1;
                bdrkreg_t       ct_testcberr              :      1;
                bdrkreg_t       ct_testflit               :      3;
                bdrkreg_t       ct_testclear              :      1;
                bdrkreg_t       ct_testerrcapture         :      1;
                bdrkreg_t       ct_rsvd                   :      9;
	} ni_channel_test_fld_s;
} ni_channel_test_u_t;

#else

typedef union ni_channel_test_u {
	bdrkreg_t	ni_channel_test_regval;
	struct	{
		bdrkreg_t	ct_rsvd			  :	 9;
		bdrkreg_t	ct_testerrcapture	  :	 1;
		bdrkreg_t	ct_testclear		  :	 1;
		bdrkreg_t	ct_testflit		  :	 3;
		bdrkreg_t	ct_testcberr		  :	 1;
		bdrkreg_t	ct_testvalid		  :	 1;
		bdrkreg_t	ct_testdata		  :	20;
		bdrkreg_t	ct_testmask		  :	 8;
		bdrkreg_t	ct_testseed		  :	20;
	} ni_channel_test_fld_s;
} ni_channel_test_u_t;

#endif




/************************************************************************
 *                                                                      *
 *  This register contains LLP port parameters and enables for the      *
 * capture of header data.                                              *
 *                                                                      *
 ************************************************************************/




#ifdef LITTLE_ENDIAN

typedef union ni_port_parms_u {
	bdrkreg_t	ni_port_parms_regval;
	struct  {
		bdrkreg_t	pp_max_burst              :	10;
                bdrkreg_t       pp_null_timeout           :      6;
                bdrkreg_t       pp_max_retry              :     10;
                bdrkreg_t       pp_d_avail_sel            :      2;
                bdrkreg_t       pp_rsvd_1                 :      1;
                bdrkreg_t       pp_first_err_enable       :      1;
                bdrkreg_t       pp_squash_err_enable      :      1;
                bdrkreg_t       pp_vch_err_enable         :      4;
                bdrkreg_t       pp_rsvd                   :     29;
	} ni_port_parms_fld_s;
} ni_port_parms_u_t;

#else

typedef union ni_port_parms_u {
	bdrkreg_t	ni_port_parms_regval;
	struct	{
		bdrkreg_t	pp_rsvd			  :	29;
		bdrkreg_t	pp_vch_err_enable	  :	 4;
		bdrkreg_t	pp_squash_err_enable	  :	 1;
		bdrkreg_t	pp_first_err_enable	  :	 1;
		bdrkreg_t	pp_rsvd_1		  :	 1;
		bdrkreg_t	pp_d_avail_sel		  :	 2;
		bdrkreg_t	pp_max_retry		  :	10;
		bdrkreg_t	pp_null_timeout		  :	 6;
		bdrkreg_t	pp_max_burst		  :	10;
	} ni_port_parms_fld_s;
} ni_port_parms_u_t;

#endif




/************************************************************************
 *                                                                      *
 *  This register contains the age at which request and reply packets   *
 * are injected into the network. This feature allows replies to be     *
 * given a higher fixed priority than requests, which can be            *
 * important in some network saturation situations.                     *
 *                                                                      *
 ************************************************************************/




#ifdef LITTLE_ENDIAN

typedef union ni_channel_age_u {
	bdrkreg_t	ni_channel_age_regval;
	struct  {
		bdrkreg_t	ca_request_inject_age     :	 8;
                bdrkreg_t       ca_reply_inject_age       :      8;
                bdrkreg_t       ca_rsvd                   :     48;
	} ni_channel_age_fld_s;
} ni_channel_age_u_t;

#else

typedef union ni_channel_age_u {
	bdrkreg_t	ni_channel_age_regval;
	struct	{
		bdrkreg_t	ca_rsvd			  :	48;
		bdrkreg_t	ca_reply_inject_age	  :	 8;
		bdrkreg_t	ca_request_inject_age	  :	 8;
	} ni_channel_age_fld_s;
} ni_channel_age_u_t;

#endif




/************************************************************************
 *                                                                      *
 *  This register contains latched LLP port and problematic message     *
 * errors. The contents are the same information as the                 *
 * NI_PORT_ERROR_CLEAR register, but, in this register read accesses    *
 * are non-destructive. Bits [52:24] assert the NI interrupt.           *
 *                                                                      *
 ************************************************************************/




#ifdef LITTLE_ENDIAN

typedef union ni_port_errors_u {
	bdrkreg_t	ni_port_errors_regval;
	struct  {
		bdrkreg_t	pe_sn_error_count         :	 8;
                bdrkreg_t       pe_cb_error_count         :      8;
                bdrkreg_t       pe_retry_count            :      8;
                bdrkreg_t       pe_tail_timeout           :      4;
                bdrkreg_t       pe_fifo_overflow          :      4;
                bdrkreg_t       pe_external_short         :      4;
                bdrkreg_t       pe_external_long          :      4;
                bdrkreg_t       pe_external_bad_header    :      4;
                bdrkreg_t       pe_internal_short         :      4;
                bdrkreg_t       pe_internal_long          :      4;
                bdrkreg_t       pe_link_reset_in          :      1;
                bdrkreg_t       pe_rsvd                   :     11;
	} ni_port_errors_fld_s;
} ni_port_errors_u_t;

#else

typedef union ni_port_errors_u {
	bdrkreg_t	ni_port_errors_regval;
	struct	{
		bdrkreg_t	pe_rsvd			  :	11;
		bdrkreg_t	pe_link_reset_in	  :	 1;
		bdrkreg_t	pe_internal_long	  :	 4;
		bdrkreg_t	pe_internal_short	  :	 4;
		bdrkreg_t	pe_external_bad_header	  :	 4;
		bdrkreg_t	pe_external_long	  :	 4;
		bdrkreg_t	pe_external_short	  :	 4;
		bdrkreg_t	pe_fifo_overflow	  :	 4;
		bdrkreg_t	pe_tail_timeout		  :	 4;
		bdrkreg_t	pe_retry_count		  :	 8;
		bdrkreg_t	pe_cb_error_count	  :	 8;
		bdrkreg_t	pe_sn_error_count	  :	 8;
	} ni_port_errors_fld_s;
} ni_port_errors_u_t;

#endif




/************************************************************************
 *                                                                      *
 *  This register provides the sideband data associated with the        *
 * NI_PORT_HEADER registers and also additional data for error          *
 * processing. This register is not cleared on reset.                   *
 *                                                                      *
 ************************************************************************/