pic18fxx2.h

首先pic和铁电24c02通讯

static volatile	near bit	LD3		@ ((unsigned)&LATD*8)+3;
static volatile	near bit	LD4		@ ((unsigned)&LATD*8)+4;
static volatile	near bit	LD5		@ ((unsigned)&LATD*8)+5;
static volatile	near bit	LD6		@ ((unsigned)&LATD*8)+6;
static volatile	near bit	LD7		@ ((unsigned)&LATD*8)+7;
//Alternate definitions
static volatile	near bit	LATD0		@ ((unsigned)&LATD*8)+0;
static volatile	near bit	LATD1		@ ((unsigned)&LATD*8)+1;
static volatile	near bit	LATD2		@ ((unsigned)&LATD*8)+2;
static volatile	near bit	LATD3		@ ((unsigned)&LATD*8)+3;
static volatile	near bit	LATD4		@ ((unsigned)&LATD*8)+4;
static volatile	near bit	LATD5		@ ((unsigned)&LATD*8)+5;
static volatile	near bit	LATD6		@ ((unsigned)&LATD*8)+6;
static volatile	near bit	LATD7		@ ((unsigned)&LATD*8)+7;
#endif

//Latch C LATC
static volatile	near bit	LC0		@ ((unsigned)&LATC*8)+0;
static volatile	near bit	LC1		@ ((unsigned)&LATC*8)+1;
static volatile	near bit	LC2		@ ((unsigned)&LATC*8)+2;
static volatile	near bit	LC3		@ ((unsigned)&LATC*8)+3;
static volatile	near bit	LC4		@ ((unsigned)&LATC*8)+4;
static volatile	near bit	LC5		@ ((unsigned)&LATC*8)+5;
static volatile	near bit	LC6		@ ((unsigned)&LATC*8)+6;
static volatile	near bit	LC7		@ ((unsigned)&LATC*8)+7;
//Alternate definitions
static volatile	near bit	LATC0		@ ((unsigned)&LATC*8)+0;
static volatile	near bit	LATC1		@ ((unsigned)&LATC*8)+1;
static volatile	near bit	LATC2		@ ((unsigned)&LATC*8)+2;
static volatile	near bit	LATC3		@ ((unsigned)&LATC*8)+3;
static volatile	near bit	LATC4		@ ((unsigned)&LATC*8)+4;
static volatile	near bit	LATC5		@ ((unsigned)&LATC*8)+5;
static volatile	near bit	LATC6		@ ((unsigned)&LATC*8)+6;
static volatile	near bit	LATC7		@ ((unsigned)&LATC*8)+7;

//Latch B LATB
static volatile	near bit	LB0		@ ((unsigned)&LATB*8)+0;
static volatile	near bit	LB1		@ ((unsigned)&LATB*8)+1;
static volatile	near bit	LB2		@ ((unsigned)&LATB*8)+2;
static volatile	near bit	LB3		@ ((unsigned)&LATB*8)+3;
static volatile	near bit	LB4		@ ((unsigned)&LATB*8)+4;
static volatile	near bit	LB5		@ ((unsigned)&LATB*8)+5;
static volatile	near bit	LB6		@ ((unsigned)&LATB*8)+6;
static volatile	near bit	LB7		@ ((unsigned)&LATB*8)+7;
//Alternate definitions
static volatile near bit	LATB0		@ ((unsigned)&LATB*8)+0;
static volatile near bit	LATB1		@ ((unsigned)&LATB*8)+1;
static volatile near bit	LATB2		@ ((unsigned)&LATB*8)+2;
static volatile near bit	LATB3		@ ((unsigned)&LATB*8)+3;
static volatile near bit	LATB4		@ ((unsigned)&LATB*8)+4;
static volatile near bit	LATB5		@ ((unsigned)&LATB*8)+5;
static volatile near bit	LATB6		@ ((unsigned)&LATB*8)+6;
static volatile near bit	LATB7		@ ((unsigned)&LATB*8)+7;

//Latch A LATA
static volatile near bit	LA0		@ ((unsigned)&LATA*8)+0;
static volatile near bit	LA1		@ ((unsigned)&LATA*8)+1;
static volatile near bit	LA2		@ ((unsigned)&LATA*8)+2;
static volatile near bit	LA3		@ ((unsigned)&LATA*8)+3;
static volatile near bit	LA4		@ ((unsigned)&LATA*8)+4;
static volatile near bit	LA5		@ ((unsigned)&LATA*8)+5;
static volatile near bit	LA6		@ ((unsigned)&LATA*8)+6;
//Alternate definitions
static volatile near bit	LATA0		@ ((unsigned)&LATA*8)+0;
static volatile near bit	LATA1		@ ((unsigned)&LATA*8)+1;
static volatile near bit	LATA2		@ ((unsigned)&LATA*8)+2;
static volatile near bit	LATA3		@ ((unsigned)&LATA*8)+3;
static volatile near bit	LATA4		@ ((unsigned)&LATA*8)+4;
static volatile near bit	LATA5		@ ((unsigned)&LATA*8)+5;
static volatile near bit	LATA6		@ ((unsigned)&LATA*8)+6;

#if defined(_18F442) || defined(_18F452)
//PortE
static volatile near bit	RE0		@ ((unsigned)&PORTE*8)+0;
static volatile near bit	RE1		@ ((unsigned)&PORTE*8)+1;
static volatile near bit	RE2		@ ((unsigned)&PORTE*8)+2;

//PortD
static volatile near bit	RD0		@ ((unsigned)&PORTD*8)+0;
static volatile near bit	RD1		@ ((unsigned)&PORTD*8)+1;
static volatile near bit	RD2		@ ((unsigned)&PORTD*8)+2;
static volatile near bit	RD3		@ ((unsigned)&PORTD*8)+3;
static volatile near bit	RD4		@ ((unsigned)&PORTD*8)+4;
static volatile near bit	RD5		@ ((unsigned)&PORTD*8)+5;
static volatile near bit	RD6		@ ((unsigned)&PORTD*8)+6;
static volatile near bit	RD7		@ ((unsigned)&PORTD*8)+7;
#endif

//PortC
static volatile near bit	RC0		@ ((unsigned)&PORTC*8)+0;
static volatile near bit	RC1		@ ((unsigned)&PORTC*8)+1;
static volatile near bit	RC2		@ ((unsigned)&PORTC*8)+2;
static volatile near bit	RC3		@ ((unsigned)&PORTC*8)+3;
static volatile near bit	RC4		@ ((unsigned)&PORTC*8)+4;
static volatile near bit	RC5		@ ((unsigned)&PORTC*8)+5;
static volatile near bit	RC6		@ ((unsigned)&PORTC*8)+6;
static volatile near bit	RC7		@ ((unsigned)&PORTC*8)+7;

//PortB
static volatile near bit	RB0		@ ((unsigned)&PORTB*8)+0;
static volatile near bit	RB1		@ ((unsigned)&PORTB*8)+1;
static volatile near bit	RB2		@ ((unsigned)&PORTB*8)+2;
static volatile near bit	RB3		@ ((unsigned)&PORTB*8)+3;
static volatile near bit	RB4		@ ((unsigned)&PORTB*8)+4;
static volatile near bit	RB5		@ ((unsigned)&PORTB*8)+5;
static volatile near bit	RB6		@ ((unsigned)&PORTB*8)+6;
static volatile near bit	RB7		@ ((unsigned)&PORTB*8)+7;

//PortA
static volatile near bit	RA0		@ ((unsigned)&PORTA*8)+0;
static volatile near bit	RA1		@ ((unsigned)&PORTA*8)+1;
static volatile near bit	RA2		@ ((unsigned)&PORTA*8)+2;
static volatile near bit	RA3		@ ((unsigned)&PORTA*8)+3;
static volatile near bit	RA4		@ ((unsigned)&PORTA*8)+4;
static volatile near bit	RA5		@ ((unsigned)&PORTA*8)+5;
static volatile near bit	RA6		@ ((unsigned)&PORTA*8)+6;

#define EEPROM_SIZE	256

#if defined(_18F242) || defined(_18F442)
#define ROMSIZE 16384
#else
#define ROMSIZE 32768
#endif

// Configuration bit values
// Config. Register 1
#define OSCSEN		0xDFFF		// enable oscillator system clock
#define OSCSDIS		0xFFFF
// oscilator types
#define RCRA6		0xFFFF		// RC w/OSC2 config as RA6
#define HSPLL		0xFEFF		// HS w/PLL Enabled, Clk Freq = 4xFreq Osc.
#define ECRA6		0xFDFF		// EC w/OSC2 config. as RA6
#define ECDB4		0xFCFF		// EC w/OSC2 as divide by 4 clock output
#define RC		0xFBFF
#define HS		0xFAFF
#define	XT		0xF9FF		
#define	LP		0xF8FF

// Config. Register 2
// Brown Out reset
#define	BOREN		0xFFFF		// Brown-out reset enable
#define	BORDIS		0xFFFD
#define BORV45		0xFFF3		// Brown Out Reset Voltage = 4.5 Volts
#define BORV42		0xFFF7		// Brown Out Reset Voltage = 4.2 Volts
#define BORV27		0xFFFB		// Brown Out Reset Voltage = 2.7 Volts
#define BORV25		0xFFFF		// Brown Out Reset Voltage = 2.5 Volts
// Power-Up Timer Enable
#define	PWRTEN		0xFFFE		// Power-out reset timer enable
#define	PWRTDIS		0xFFFF
// Watchdog
#define WDTPS128	0xFFFF		// 1:128 Watchdog postscale
#define WDTPS64		0xFDFF		// 1:64
#define WDTPS32		0xFBFF		// 1:32
#define WDTPS16		0xF9FF		// 1:16
#define WDTPS8		0xF7FF		// 1:8
#define WDTPS4		0xF5FF		// 1:4
#define WDTPS2		0xF3FF		// 1:2
#define WDTPS1		0xF1FF		// 1:1
#define WDTEN		0xFFFF		// Watchdog Timer enable
#define WDTDIS		0xFEFF		

// Config. Register 3
#define CCP2RC1		0xFFFF		// CCP2 i/o multiplexed with RC1
#define CCP2RB3		0xFEFF		// CCP2 i/o multiplexed with RB3

// Config. Register 4
// Background Debugger
#define DEBUGEN		0xFF7F
#define DEBUGDIS	0xFFFF
// Low Voltage ICSP
#define LVPEN		0xFFFF		// enabled
#define LVPDIS		0xFFFB		// disabled
// Stack Full/Underflow Reset enable
#define STVREN		0xFFFF
#define STVRDIS		0xFFFE

// Config. Register 5
// Code Protection
#define CPALL		0x3FF0		// Protect All Blocks including EEPROM and BOOT
#define CPA		0xFFF0		// Protect All Blocks excluding EEPROM and BOOT
#define CP3		0xFFF7		// Protect Block 3 (6000-7FFF)
#define CP2		0xFFFB		// Protect Block 2 (4000-5FFF)
#define CP1		0xFFFD		// Protect Block 1 (2000-3FFF)
#define CP0		0xFFFE		// Protect Block 0 (0200-1FFF)
#define CPD		0x7FFF		// Protect EEPROM Data
#define CPB		0xBFFF		// Protect Boot Block
#define UNPROTECT	0xFFFF

// Config. Register 6
// Write Protection
#define WP3		0xFFF7		// Write Protect Block 3 (6000-7FFF)
#define WP2		0xFFFB		// Write Protect Block 2 (4000-5FFF)
#define WP1		0xFFFD		// Write Protect Block 1 (2000-3FFF)
#define WP0		0xFFFE		// Write Protect Block 0 (0000-1FFF)
#define WPD		0x7FFF		// Write Protect EEPROM Data
#define WPB		0xBFFF		// Write Protect Boot Block
#define WPC		0xDFFF		// Write Protect Config. Register
#define WPA		0x1FF0		// Write Protection All Blocks
// Alternative
#define WPALL		0x1FF0		// Write Protection All Blocks
#define WRTEN		0xFFFF		// Write Enable

// Config. Register 7
// Table Read Protection, Reads executed from other blocks
#define TRP3		0xFFF7		// Protect Block 3 (6000-7FFF)
#define TRP2		0xFFFB		// Protect Block 2 (4000-5FFF)
#define TRP1		0xFFFD		// Protect Block 1 (2000-3FFF)
#define TRP0		0xFFFE		// Protect Block 0 (0000-1FFF)
#define TRPB		0xBFFF		// Protect Boot Block
#define TRPA		0xBFF0		// Protect All Blocks including Boot
// Alternative
#define TRPALL		0xBFF0		// Protect All Blocks including Boot
#define TRU		0xFFFF		// Unprotected

// Software Watchdog Enable
#define SWDTE		0xFF
#define SWDTDIS		0xFE