📄 nios2.h
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#ifndef __NIOS2_H__
#define __NIOS2_H__
/******************************************************************************
* *
* License Agreement *
* *
* Copyright (c) 2003 Altera Corporation, San Jose, California, USA. *
* All rights reserved. *
* *
* Permission is hereby granted, free of charge, to any person obtaining a *
* copy of this software and associated documentation files (the "Software"), *
* to deal in the Software without restriction, including without limitation *
* the rights to use, copy, modify, merge, publish, distribute, sublicense, *
* and/or sell copies of the Software, and to permit persons to whom the *
* Software is furnished to do so, subject to the following conditions: *
* *
* The above copyright notice and this permission notice shall be included in *
* all copies or substantial portions of the Software. *
* *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR *
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, *
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE *
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER *
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING *
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER *
* DEALINGS IN THE SOFTWARE. *
* *
* This agreement shall be governed in all respects by the laws of the State *
* of California and by the laws of the United States of America. *
* *
******************************************************************************/
/*
* This header provides processor specific macros for accessing the Nios2
* control registers.
*/
#ifdef __cplusplus
extern "C"
{
#endif /* __cplusplus */
/*
* Macros for accessing selected processor registers
*/
#define NIOS2_READ_ET(et) \
do { __asm ("mov %0, et" : "=r" (et) ); } while (0)
#define NIOS2_WRITE_ET(et) \
do { __asm volatile ("mov et, %z0" : : "rM" (et)); } while (0)
#define NIOS2_READ_SP(sp) \
do { __asm ("mov %0, sp" : "=r" (sp) ); } while (0)
/*
* Macros for useful processor instructions
*/
#define NIOS2_BREAK() \
do { __asm volatile ("break"); } while (0)
#define NIOS2_REPORT_STACK_OVERFLOW() \
do { __asm volatile("break 3"); } while (0)
/*
* Macros for accessing the control registers.
*/
#define NIOS2_READ_STATUS(dest) \
do { dest = __builtin_rdctl(0); } while (0)
#define NIOS2_WRITE_STATUS(src) \
do { __builtin_wrctl(0, src); } while (0)
#define NIOS2_READ_ESTATUS(dest) \
do { dest = __builtin_rdctl(1); } while (0)
#define NIOS2_READ_BSTATUS(dest) \
do { dest = __builtin_rdctl(2); } while (0)
#define NIOS2_READ_IENABLE(dest) \
do { dest = __builtin_rdctl(3); } while (0)
#define NIOS2_WRITE_IENABLE(src) \
do { __builtin_wrctl(3, src); } while (0)
#define NIOS2_READ_IPENDING(dest) \
do { dest = __builtin_rdctl(4); } while (0)
#define NIOS2_READ_CPUID(dest) \
do { dest = __builtin_rdctl(5); } while (0)
/*
* Values of bits within control registers
*/
#define NIOS2_STATUS status
#define NIOS2_ESTATUS estatus
#define NIOS2_BSTATUS bstatus
#define NIOS2_IENABLE ienable
#define NIOS2_IPENDING ipending
#define NIOS2_CPUID cpuid
#define NIOS2_STATUS_PIE_MSK 0x1
#define NIOS2_STATUS_PIE_OFST 0
#define NIOS2_STATUS_U_MSK 0x2
#define NIOS2_STATUS_U_OFST 1
#define NIOS2_NIRQ 32
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* __NIOS2_H__ */
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