cycloneiii_3c25_start_niosii_standard_sopc.qip

nios里面用自定义指令集来实现三角函数

set_global_assignment -name SOURCE_FILE [file join $::quartus(qip_path) C:/work/rod_designs/alu_nios2_dpfp/fpu_hw_3c25_standard/ip/spdp_cast_comp_custom_instruction/SPDP_CAST_COMP_top_hw.tcl]
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) C:/work/rod_designs/alu_nios2_dpfp/fpu_hw_3c25_standard/ip/spdp_cast_comp_custom_instruction/SPDP_CAST_COMP_top.v]
 set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) C:/work/rod_designs/alu_nios2_dpfp/fpu_hw_3c25_standard/ip/spdp_cast_comp_custom_instruction/SPDP_Engine.vhd]
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) C:/work/rod_designs/alu_nios2_dpfp/fpu_hw_3c25_standard/ip/spdp_cast_comp_custom_instruction/alt_cusp72_addsubcarry.vhd]
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) C:/work/rod_designs/alu_nios2_dpfp/fpu_hw_3c25_standard/ip/spdp_cast_comp_custom_instruction/alt_cusp72_au.vhd]
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) C:/work/rod_designs/alu_nios2_dpfp/fpu_hw_3c25_standard/ip/spdp_cast_comp_custom_instruction/alt_cusp72_clock_reset.vhd]
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) C:/work/rod_designs/alu_nios2_dpfp/fpu_hw_3c25_standard/ip/spdp_cast_comp_custom_instruction/alt_cusp72_cmp.vhd]
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) C:/work/rod_designs/alu_nios2_dpfp/fpu_hw_3c25_standard/ip/spdp_cast_comp_custom_instruction/alt_cusp72_gpi.vhd]
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) C:/work/rod_designs/alu_nios2_dpfp/fpu_hw_3c25_standard/ip/spdp_cast_comp_custom_instruction/alt_cusp72_gpo.vhd]
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) C:/work/rod_designs/alu_nios2_dpfp/fpu_hw_3c25_standard/ip/spdp_cast_comp_custom_instruction/alt_cusp72_mult.vhd]
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) C:/work/rod_designs/alu_nios2_dpfp/fpu_hw_3c25_standard/ip/spdp_cast_comp_custom_instruction/alt_cusp72_muxbin2.vhd]
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) C:/work/rod_designs/alu_nios2_dpfp/fpu_hw_3c25_standard/ip/spdp_cast_comp_custom_instruction/alt_cusp72_muxbin2_wire.vhd]
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) C:/work/rod_designs/alu_nios2_dpfp/fpu_hw_3c25_standard/ip/spdp_cast_comp_custom_instruction/alt_cusp72_muxfast4.vhd]
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) C:/work/rod_designs/alu_nios2_dpfp/fpu_hw_3c25_standard/ip/spdp_cast_comp_custom_instruction/alt_cusp72_muxfast8.vhd]
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) C:/work/rod_designs/alu_nios2_dpfp/fpu_hw_3c25_standard/ip/spdp_cast_comp_custom_instruction/alt_cusp72_muxhot16_wire.vhd]
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) C:/work/rod_designs/alu_nios2_dpfp/fpu_hw_3c25_standard/ip/spdp_cast_comp_custom_instruction/alt_cusp72_muxhot32.vhd]
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) C:/work/rod_designs/alu_nios2_dpfp/fpu_hw_3c25_standard/ip/spdp_cast_comp_custom_instruction/alt_cusp72_muxhot64_wire.vhd]
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) C:/work/rod_designs/alu_nios2_dpfp/fpu_hw_3c25_standard/ip/spdp_cast_comp_custom_instruction/alt_cusp72_pc.vhd]
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) C:/work/rod_designs/alu_nios2_dpfp/fpu_hw_3c25_standard/ip/spdp_cast_comp_custom_instruction/alt_cusp72_reg.vhd]
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) C:/work/rod_designs/alu_nios2_dpfp/fpu_hw_3c25_standard/ip/spdp_cast_comp_custom_instruction/alt_cusp72_shift.vhd]
set_global_assignment -name SOURCE_FILE [file join $::quartus(qip_path) C:/work/rod_designs/alu_nios2_dpfp/fpu_hw_3c25_standard/ip/spdp_cast_comp_custom_instruction/hopt_mult_l3.vqm]
set_global_assignment -name SOURCE_FILE [file join $::quartus(qip_path) C:/work/rod_designs/alu_nios2_dpfp/fpu_hw_3c25_standard/ip/spdp_cast_comp_custom_instruction/hopt_mult_l4.vqm]
set_global_assignment -name SOURCE_FILE [file join $::quartus(qip_path) C:/work/rod_designs/alu_nios2_dpfp/fpu_hw_3c25_standard/ip/spdp_cast_comp_custom_instruction/hopt_mult_l5.vqm]
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) C:/work/rod_designs/alu_nios2_dpfp/fpu_hw_3c25_standard/ip/spdp_cast_comp_custom_instruction/fp_double_to_single.v]
 set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) C:/work/rod_designs/alu_nios2_dpfp/fpu_hw_3c25_standard/ip/spdp_cast_comp_custom_instruction/fp_float_to_int.v]
 set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) C:/work/rod_designs/alu_nios2_dpfp/fpu_hw_3c25_standard/ip/spdp_cast_comp_custom_instruction/fp_int_to_float.v]
 set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) C:/work/rod_designs/alu_nios2_dpfp/fpu_hw_3c25_standard/ip/spdp_cast_comp_custom_instruction/fp_single_to_double.v]