wave_presets.do

nios里面用自定义指令集来实现三角函数

# Display signals from module onchip_ram
add wave -noupdate -divider {onchip_ram}
add wave -noupdate -format Logic /test_bench/DUT/the_onchip_ram/chipselect
add wave -noupdate -format Logic /test_bench/DUT/the_onchip_ram/write
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_onchip_ram/address
add wave -noupdate -format Literal -radix binary /test_bench/DUT/the_onchip_ram/byteenable
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_onchip_ram/readdata
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_onchip_ram/writedata


# Display signals from module jtag_uart
add wave -noupdate -divider {jtag_uart}
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_jtag_uart/av_address
add wave -noupdate -format Logic /test_bench/DUT/the_jtag_uart/av_chipselect
add wave -noupdate -format Logic /test_bench/DUT/the_jtag_uart/av_irq
add wave -noupdate -format Logic /test_bench/DUT/the_jtag_uart/av_read_n
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_jtag_uart/av_readdata
add wave -noupdate -format Logic /test_bench/DUT/the_jtag_uart/av_waitrequest
add wave -noupdate -format Logic /test_bench/DUT/the_jtag_uart/av_write_n
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_jtag_uart/av_writedata
add wave -noupdate -format Logic /test_bench/DUT/the_jtag_uart/dataavailable
add wave -noupdate -format Logic /test_bench/DUT/the_jtag_uart/readyfordata


# Display signals from module cpu
add wave -noupdate -divider {cpu}
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/i_readdata
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/i_readdatavalid
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/i_waitrequest
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/i_address
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/i_read
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/clk
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/reset_n
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/d_readdata
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/d_waitrequest
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/d_irq
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/d_address
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/d_byteenable
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/d_read
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/d_write
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/d_writedata
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/the_cpu_test_bench/W_pcb
add wave -noupdate -format Logic -radix ascii /test_bench/DUT/the_cpu/the_cpu_test_bench/W_vinst
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/the_cpu_test_bench/W_valid
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/the_cpu_test_bench/W_iw


# Display signals from module altmemddr
add wave -noupdate -divider {altmemddr}
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_altmemddr/pll_ref_clk
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_altmemddr/mem_cke
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_altmemddr/soft_reset_n
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_altmemddr/global_reset_n
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_altmemddr/reset_phy_clk_n
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_altmemddr/reset_request_n
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_altmemddr/phy_clk
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_altmemddr/local_address
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_altmemddr/local_size
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_altmemddr/local_burstbegin
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_altmemddr/local_read_req
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_altmemddr/local_write_req
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_altmemddr/local_ready
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_altmemddr/local_wdata
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_altmemddr/local_be
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_altmemddr/local_rdata_valid
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_altmemddr/local_rdata
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_altmemddr/mem_clk
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_altmemddr/mem_cs_n
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_altmemddr/mem_addr
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_altmemddr/mem_ba
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_altmemddr/mem_ras_n
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_altmemddr/mem_cas_n
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_altmemddr/mem_we_n
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_altmemddr/mem_dm
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_altmemddr/mem_dq
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_altmemddr/mem_dqs


configure wave -justifyvalue right
configure wave -signalnamewidth 1
TreeUpdate [SetDefaultTree]