📄 main.c.bak
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//###########################################################################
// FILE: main.c
// RealSYS 2003/9/16
//###########################################################################
#include "..\DSP281x_Device.h"
#include "..\def28x.h"
#define ON_LED GpioDataRegs.GPFCLEAR.bit.GPIOF14=1
#define OFF_LED GpioDataRegs.GPFSET.bit.GPIOF14=1
#define T_LED GpioDataRegs.GPFTOGGLE.bit.GPIOF14=1
// Prototype statements for functions found within this file.
interrupt void cpu_timer0_isr(void);
extern interrupt void scia_rx_isr(void);
extern interrupt void scia_tx_isr(void);
void key_check(void);
int mcnt=0,t0_cnt=0,key,tmp;
int xcnt1=0,xcnt2=0;
enum key_code {SW1_CODE,SW2_CODE,SW3_CODE,SW4_CODE,SW5_CODE,SW6_CODE,SW7_CODE,SW8_CODE};
#define KEY_MASK 0xff
#define NOKEY_CODE 0x0f
#define CODE_MASK 0x0f
#define KEY_PRESSED 0x80
#define KEY_CONT 0x40
BYTE key_code=NOKEY_CODE;
BYTE prev_key_code=NOKEY_CODE;
int key_count=0;
BYTE cont_key_cnt=0;
void init_gpio(void){
EALLOW;
GpioMuxRegs.GPAMUX.all=0x0000;
/* GPAMUX: GPIO_A function 0=IOP,1=FUN I(0)/O(1)
bit15 0: C3TRIP,PA15 ;IOP 1
bit14 0: C2TRIP,PA14 ;IOP 1
bit13 0: C1TRIP,PA13 ;IOP 1
bit12 0: TCLKINA,PA12 ;IOP 1
bit11 0: TDIRA,PA11 ;IOP 1
bit10 0: CAP3_QEPI1,PA10 ;IOP 1
bit9 0: CAP2_QEP2,PA9 ;IOP 0
bit8 0: CAP1_QEP1,PA8 ;IOP 0
bit7 0: T2PWM_T2CMP,PA7 ;IOP 1
bit6 0: T1PWM_T1CMP,PA6 ;IOP 1
bit5 0: PWM6,PA5 ;IOP 1
bit4 0: PWM5,PA4 ;IOP 1
bit3 0: PWM4,PA3 ;IOP 1
bit2 0: PWM3,PA2 ;IOP 1
bit1 0: PWM2,PA1 ;IOP 1
bit0 0: PWM1,PA0 ;IOP 1
*/
GpioMuxRegs.GPADIR.all=0xfcff; // PA DIR: 1=output,0=input
GpioMuxRegs.GPAQUAL.all=0x0000; // PA Input Qualification:
/* 0x00=No, 0x01=SYSCLK/2, 0x02=SYSCLK/4, 0xff=SYSCLK/510 */
GpioMuxRegs.GPBMUX.all=0x0000;
/* GPBMUX: GPIO_B function 0=IOP,1=FUN I(0)/O(1)
bit15 0: C6TRIP,PB15 ;IOP 1
bit14 0: C5TRIP,PB14 ;IOP 1
bit13 0: C4TRIP,PB13 ;IOP 1
bit12 0: TCLKINB,PB12 ;IOP 1
bit11 0: TDIRB,PB11 ;IOP 1
bit10 0: CAP6_QEPI2,PB10 ;IOP 1
bit9 0: CAP5_QEP4,PB9 ;IOP 1
bit8 0: CAP4_QEP3,PB8 ;IOP 1
bit7 0: T4PWM_T4CMP,PB7 ;IOP 1
bit6 0: T3PWM_T3CMP,PB6 ;IOP 1
bit5 0: PWM12,PB5 ;IOP 1
bit4 0: PWM11,PB4 ;IOP 1
bit3 0: PWM10,PB3 ;IOP 1
bit2 0: PWM9,PB2 ;IOP 1
bit1 0: PWM8,PB1 ;IOP 1
bit0 0: PWM7,PB0 ;IOP 1
*/
GpioMuxRegs.GPBDIR.all=0xffff; // PB DIR: 1=output,0=input
GpioMuxRegs.GPAQUAL.all=0x0000; // PB Input Qualification:
/* 0x00=No, 0x01=SYSCLK/2, 0x02=SYSCLK/4, 0xff=SYSCLK/510 */
GpioMuxRegs.GPDMUX.all=0x0021;
/* GPDMUX: GPIO_D function 0=IOP,1=FUN
bit6 0: T4CTRIP,PD6 ;IOP
bit5 1: T3CTRIP_PDPINTB,PD5 ;FUN
bit4 0: res
bit3 0: res
bit2 0: res
bit1 0: T2CTRIP,PD1 ;IOP
bit0 1: T1CTRIP_PDPINTA,PD0 ;FUN
*/
GpioMuxRegs.GPDDIR.all=0x5e; // DIR: 1=output,0=input
// 6(PD6),5(PDPINTB),4,3,2,1(PD1),0(PDPINTA)
// 1 0 1 1 1 1 0 = 0x5e
GpioMuxRegs.GPDQUAL.all=0x0000; // PD Input Qualification:
/* 0x00=No, 0x01=SYSCLK/2, 0x02=SYSCLK/4, 0xff=SYSCLK/510 */
GpioMuxRegs.GPEMUX.all=0x0003;
/* GPEMUX: GPIO_E function 0=IOP,1=FUN I(0)/O(1)
bit2 0: XNMI_XINT13,PE2 ;IOP 1
bit1 1: XINT2_ADCSOC,PE1 ;FUN 0
bit0 1: XINT1_XBIO,PE0 ;FUN 0
*/
GpioMuxRegs.GPEDIR.all=0x04; // DIR: 1=output,0=input
GpioMuxRegs.GPEQUAL.all=0x0002; // PE Input Qualification:
/* 0x00=No, 0x01=SYSCLK/2, 0x02=SYSCLK/4, 0xff=SYSCLK/510 */
GpioMuxRegs.GPFMUX.all=0x00f0;
/* GPFMUX: GPIO_F function 0=IOP,1=FUN I(0)/O(1)
bit14 0: XF,PF14 ;IOP 1(CPU_LED)
bit13 0: MDR,PF13 ;IOP 1
bit12 0: MDX,PF12 ;IOP 1
bit11 0: MFSR,PF11 ;IOP 1
bit10 0: MFSX,PF10 ;IOP 1
bit9 0: MCLKR,PF9 ;IOP 1
bit8 0: MCLKX,PF8 ;IOP 1
bit7 1: CANRX,PF7 ;FUN 0
bit6 1: CANTX,PF6 ;FUN 1
bit5 1: SCIRXDA,PF5 ;FUN 0
bit4 1: SCITXDA,PF4 ;FUN 1
bit3 0: SPISTE,PF3 ;IOP 1
bit2 0: SPICLK,PF2 ;IOP 1
bit1 0: SPISOMI,PF1 ;IOP 1
bit0 0: SPISIMO,PF0 ;IOP 1
*/
GpioMuxRegs.GPFDIR.all=0xff5f; // DIR: 1=output,0=input
GpioMuxRegs.GPGMUX.all=0x0030;
/* GPGMUX: GPIO_G function 0=IOP,1=FUN
bit5 1: SCIRXDB,PG5 ;FUN
bit4 1: SCITXDB,PG4 ;FUN
*/
GpioMuxRegs.GPGDIR.all=0x10; // DIR: 1=output,0=input
// 5(RXDB),4(TXDB),3,2,1,0
// 0 1 0 0 0 0 = 0x10
EDIS;
}
interrupt void cpu_timer0_isr(void){
CpuTimer0.InterruptCount++;
t0_cnt++;
if((t0_cnt % 10) == 0) key_check(); // 10 msec interval key check
// Acknowledge this interrupt to recieve more interrupts from group 1
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
}
interrupt void xint1_isr(void){
xcnt1++;
lcd_gotoxy(0,0);
lcd_puts("EXT1=");
lcd_hex2(xcnt1);
lcd_putc(' ');
// Acknowledge this interrupt to recieve more interrupts from group 1
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
}
interrupt void xint2_isr(void){
xcnt2++;
lcd_gotoxy(8,0);
lcd_puts(" EXT2=");
lcd_hex2(xcnt2);
// Acknowledge this interrupt to recieve more interrupts from group 1
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
}
void key_check(void){
BYTE tmp_key_code;
BYTE key;
key = IN_KEY & KEY_MASK;
if(key == KEY_MASK){
prev_key_code = key_code = NOKEY_CODE;
return;
}
if((key & BIT0) == 0) tmp_key_code = SW1_CODE;
else if((key & BIT1) == 0) tmp_key_code = SW2_CODE;
else if((key & BIT2) == 0) tmp_key_code = SW3_CODE;
else if((key & BIT3) == 0) tmp_key_code = SW4_CODE;
else if((key & BIT4) == 0) tmp_key_code = SW5_CODE;
else if((key & BIT5) == 0) tmp_key_code = SW6_CODE;
else if((key & BIT6) == 0) tmp_key_code = SW7_CODE;
else if((key & BIT7) == 0) tmp_key_code = SW8_CODE;
if(tmp_key_code != (prev_key_code & CODE_MASK)){
prev_key_code = tmp_key_code;
key_code = KEY_PRESSED | tmp_key_code;
key_count = 0;
}
else{
if(key_count < 100) key_count++;
else key_code |= KEY_CONT;
}
}
void key_process(){
lcd_gotoxy(7,1);
switch(key_code & CODE_MASK){
case SW1_CODE :
lcd_puts("SW1");
break;
case SW2_CODE :
lcd_puts("SW2");
break;
case SW3_CODE :
lcd_puts("SW3");
break;
case SW4_CODE :
lcd_puts("SW4");
break;
case SW5_CODE :
lcd_puts("SW5");
break;
case SW6_CODE :
lcd_puts("SW6");
break;
case SW7_CODE :
lcd_puts("SW7");
break;
case SW8_CODE :
lcd_puts("SW8");
break;
default:
lcd_puts("???");
break;
}
key_code &= ~KEY_PRESSED; /* Clear key flag */
}
void cont_key_process(){
cont_key_cnt++;
}
void main(void){
// Initialize System Control registers, PLL, WatchDog, Clocks to default state:
// This function is found in the DSP28_SysCtrl.c file.
InitSysCtrl();
// Init.GPIO
init_gpio();
// Disable and clear all CPU interrupts:
DINT;
IER = 0x0000;
IFR = 0x0000;
// Initialize Pie Control Registers To Default State:
InitPieCtrl();
// Initialize the PIE Vector Table To a Known State:
// This function populates the PIE vector table with pointers
// to the shell ISR functions found in DSP28_DefaultIsr.c.
InitPieVectTable();
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.TINT0 = &cpu_timer0_isr; // for TINT0
PieVectTable.XINT1 = &xint1_isr; // for XINT1
PieVectTable.XINT2 = &xint2_isr; // for XINT2
EDIS; // This is needed to disable write to EALLOW protected registers
InitCpuTimers();
// ConfigCpuTimer(&CpuTimer0, 100, 1000000); // 100MHz CPU Freq, 1 second Period (in uSeconds)
// ConfigCpuTimer(&CpuTimer0, 150, 500000); // 150MHz CPU Freq, 0.5 sec Period (in uSeconds)
// ConfigCpuTimer(&CpuTimer0, 150, 10); // 150MHz CPU Freq, 10 usec Period (in uSeconds)
ConfigCpuTimer(&CpuTimer0, 150, 1000); // 150MHz CPU Freq, 1 msec Period (in uSeconds)
StartCpuTimer0();
// Interrupt Enable Register
IER |= M_INT1; // for TINT0, XINT1, XINT2
// PIE : Peripheral Interrupts setting
PieCtrlRegs.PIEIER1.bit.INTx7 = 1; // for TINT0
PieCtrlRegs.PIEIER1.bit.INTx4 = 1; // for XINT1
PieCtrlRegs.PIEIER1.bit.INTx5 = 1; // for XINT2
XIntruptRegs.XINT1CR.bit.POLARITY = 0; // 0=falling,1=rising
// XIntruptRegs.XINT1CR.bit.POLARITY = 1; // 0=falling,1=rising
XIntruptRegs.XINT1CR.bit.ENABLE = 1; // 1=enable
XIntruptRegs.XINT2CR.bit.POLARITY = 0; // 0=falling,1=rising
// XIntruptRegs.XINT2CR.bit.POLARITY = 1; // 0=falling,1=rising
XIntruptRegs.XINT2CR.bit.ENABLE = 1; // 1=enable
// for SCI debug
sci_debug_init();
// for XINTF: External Interface
InitXintf();
// for LCD
init_lcd();
// Enable global Interrupts and higher priority real-time debug events:
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
lcd_gotoxy(0,0);
lcd_puts("External int");
while(1){
mcnt++;
lcd_gotoxy(0,1);
lcd_hex4(mcnt);
key = IN_KEY;
OUT_LED(key);
if(key_code & KEY_PRESSED) key_process();
if(key_code & KEY_CONT) cont_key_process();
delay_ms(100);
}
}
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