startup.a51

C 语言实习

$NOMOD51
;------------------------------------------------------------------------------
;  This file is part of the C51 Compiler package
;  Copyright (c) 1988-2002 Keil Elektronik GmbH and Keil Software, Inc.
;------------------------------------------------------------------------------
;  STARTUP.A51:  This code is executed after processor reset.
;
;  To translate this file use A51 with the following invocation:
;
;     A51 STARTUP.A51
;
;  To link the modified STARTUP.OBJ file to your application use the following
;  BL51 invocation:
;
;     BL51 <your object file list>, STARTUP.OBJ <controls>
;
;------------------------------------------------------------------------------
;
;  User-defined Power-On Initialization of Memory
;
;  With the following EQU statements the initialization of memory
;  at processor reset can be defined:
;
;               ; the absolute start-address of IDATA memory is always 0
IDATALEN        EQU     80H     ; the length of IDATA memory in bytes.
;
XDATASTART      EQU     0H      ; the absolute start-address of XDATA memory
XDATALEN        EQU     0H      ; the length of XDATA memory in bytes.
;
PDATASTART      EQU     0H      ; the absolute start-address of PDATA memory
PDATALEN        EQU     0H      ; the length of PDATA memory in bytes.
;
;  Notes:  The IDATA space overlaps physically the DATA and BIT areas of the
;          8051 CPU. At minimum the memory space occupied from the C51 
;          run-time routines must be set to zero.
;------------------------------------------------------------------------------
;
;  Reentrant Stack Initilization
;
;  The following EQU statements define the stack pointer for reentrant
;  functions and initialized it:
;
;  Stack Space for reentrant functions in the SMALL model.
IBPSTACK        EQU     0       ; set to 1 if small reentrant is used.
IBPSTACKTOP     EQU     0FFH+1  ; set top of stack to highest location+1.
;
;  Stack Space for reentrant functions in the LARGE model.      
XBPSTACK        EQU     0       ; set to 1 if large reentrant is used.
XBPSTACKTOP     EQU     0FFFFH+1; set top of stack to highest location+1.
;
;  Stack Space for reentrant functions in the COMPACT model.    
PBPSTACK        EQU     0       ; set to 1 if compact reentrant is used.
PBPSTACKTOP     EQU     0FFFFH+1; set top of stack to highest location+1.
;
;------------------------------------------------------------------------------
;
;  Page Definition for Using the Compact Model with 64 KByte xdata RAM
;
;  The following EQU statements define the xdata page used for pdata
;  variables. The EQU PPAGE must conform with the PPAGE control used
;  in the linker invocation.
;
PPAGEENABLE     EQU     0       ; set to 1 if pdata object are used.
;
PPAGE           EQU     0       ; define PPAGE number.
;
PPAGE_SFR       DATA    0A0H    ; SFR that supplies uppermost address byte
;               (most 8051 variants use P2 as uppermost address byte)
;
;------------------------------------------------------------------------------

; Standard SFR Symbols 
ACC     DATA    0E0H
B       DATA    0F0H
SP      DATA    81H
DPL     DATA    82H
DPH     DATA    83H
INT3_	BIT	090H.5
P0	DATA	080H
INT5_	BIT	090H.7
P1	DATA	090H
P2	DATA	0A0H
P3	DATA	0B0H
AC	BIT	0D0H.6
T0	BIT	0B0H.4
T1	BIT	0B0H.5
EA	BIT	0A8H.7
T2	BIT	090H.0
DPH1	DATA	085H
IE	DATA	0A8H
P0_0	BIT	080H.0
P1_0	BIT	090H.0
P0_1	BIT	080H.1
DPL1	DATA	084H
P2_0	BIT	0A0H.0
P1_1	BIT	090H.1
P0_2	BIT	080H.2
P3_0	BIT	0B0H.0
P2_1	BIT	0A0H.1
P1_2	BIT	090H.2
P0_3	BIT	080H.3
P3_1	BIT	0B0H.1
P2_2	BIT	0A0H.2
P1_3	BIT	090H.3
P0_4	BIT	080H.4
TA	DATA	0C7H
P3_2	BIT	0B0H.2
P2_3	BIT	0A0H.3
P1_4	BIT	090H.4
P0_5	BIT	080H.5
EXF2	BIT	0C8H.6
P3_3	BIT	0B0H.3
RD	BIT	0B0H.7
P2_4	BIT	0A0H.4
P1_5	BIT	090H.5
P0_6	BIT	080H.6
P3_4	BIT	0B0H.4
P2_5	BIT	0A0H.5
P1_6	BIT	090H.6
P0_7	BIT	080H.7
P3_5	BIT	0B0H.5
ES	BIT	0A8H.4
P2_6	BIT	0A0H.6
P1_7	BIT	090H.7
IP	DATA	0B8H
P3_6	BIT	0B0H.6
P2_7	BIT	0A0H.7
P3_0	BIT	0B0H.0
P3_7	BIT	0B0H.7
RI	BIT	098H.0
CY	BIT	0D0H.7
INT0	BIT	0B0H.2
INT1	BIT	0B0H.3
TI	BIT	098H.1
SADEN1	DATA	0BAH
INT2	BIT	090H.4
INT4	BIT	090H.6
RXD1	BIT	090H.2
SADDR1	DATA	0AAH
RCAP2H	DATA	0CBH
TXD1	BIT	090H.3

PS	BIT	0B8H.4
T2EX	BIT	090H.1
OV	BIT	0D0H.2
RCAP2L	DATA	0CAH
C_T2	BIT	0C8H.1
WR	BIT	0B0H.6
RI_1	BIT	0C0H.0
EXIF	DATA	091H
RCLK	BIT	0C8H.5
TI_1	BIT	0C0H.1
TCLK	BIT	0C8H.4
SBUF	DATA	099H
PCON	DATA	087H
SCON	DATA	098H
TMOD	DATA	089H
TCON	DATA	088H
IE0	BIT	088H.1
IE1	BIT	088H.3

CP_RL2	BIT	0C8H.0

ET0	BIT	0A8H.1
ES1	BIT	0A8H.6
ET1	BIT	0A8H.3
TF0	BIT	088H.5
ET2	BIT	0A8H.5
TF1	BIT	088H.7
TH0	DATA	08CH
TF2	BIT	0C8H.7
RB8	BIT	098H.2
TH1	DATA	08DH
EX0	BIT	0A8H.0
IT0	BIT	088H.0
TH2	DATA	0CDH
T2H	DATA	0CDH
ROMMAP	DATA	0C2H
EX1	BIT	0A8H.2
TB8	BIT	098H.3
IT1	BIT	088H.2
P	BIT	0D0H.0
TL0	DATA	08AH
SM0	BIT	098H.7
TL1	DATA	08BH
SM1	BIT	098H.6
TL2	DATA	0CCH
T2L	DATA	0CCH
SM2	BIT	098H.5
EIE	DATA	0E8H
PT0	BIT	0B8H.1
PS1	BIT	0B8H.6
RS0	BIT	0D0H.3
PT1	BIT	0B8H.3
RS1	BIT	0D0H.4
PT2	BIT	0B8H.5
TR0	BIT	088H.4
TR1	BIT	088H.6
TR2	BIT	0C8H.2
PX0	BIT	0B8H.0
PX1	BIT	0B8H.2

RB8_1	BIT	0C0H.2
EIP	DATA	0F8H
TB8_1	BIT	0C0H.3

SM0_1	BIT	0C0H.7
SBUF1	DATA	0C1H
SM1_1	BIT	0C0H.6
EXEN2	BIT	0C8H.3
SM2_1	BIT	0C0H.5
SCON1	DATA	0C0H
REN	BIT	098H.4
STATUS	DATA	0C5H
T2MOD	DATA	0C9H
DPS	DATA	086H
T2CON	DATA	0C8H
SADEN	DATA	0B9H
RXD	BIT	0B0H.0
PMR	DATA	0C4H
SADDR	DATA	0A9H
CKCON	DATA	08EH
TXD	BIT	0B0H.1
F0	BIT	0D0H.5
REN_1	BIT	0C0H.4
SCONF	DATA	0BFH
PSW	DATA	0D0H
WDCON	DATA	0D8H

                NAME    ?C_STARTUP


?C_C51STARTUP   SEGMENT   CODE
?STACK          SEGMENT   IDATA

                RSEG    ?STACK
                DS      1

                EXTRN CODE (?C_START)
                PUBLIC  ?C_STARTUP

                CSEG    AT      0
?C_STARTUP:     LJMP    STARTUP1

                RSEG    ?C_C51STARTUP

STARTUP1:

IF IDATALEN <> 0
                MOV     R0,#IDATALEN - 1
                CLR     A
IDATALOOP:      MOV     @R0,A
                DJNZ    R0,IDATALOOP
ENDIF

IF XDATALEN <> 0
                MOV     DPTR,#XDATASTART
                MOV     R7,#LOW (XDATALEN)
  IF (LOW (XDATALEN)) <> 0
                MOV     R6,#(HIGH (XDATALEN)) +1
  ELSE
                MOV     R6,#HIGH (XDATALEN)
  ENDIF
                CLR     A
XDATALOOP:      MOVX    @DPTR,A
                INC     DPTR
                DJNZ    R7,XDATALOOP
                DJNZ    R6,XDATALOOP
ENDIF

IF PPAGEENABLE <> 0
                MOV     PPAGE_SFR,#PPAGE
ENDIF

IF PDATALEN <> 0
                MOV     R0,#LOW (PDATASTART)
                MOV     R7,#LOW (PDATALEN)
                CLR     A
PDATALOOP:      MOVX    @R0,A
                INC     R0
                DJNZ    R7,PDATALOOP
ENDIF

IF IBPSTACK <> 0
EXTRN DATA (?C_IBP)

                MOV     ?C_IBP,#LOW IBPSTACKTOP
ENDIF

IF XBPSTACK <> 0
EXTRN DATA (?C_XBP)

                MOV     ?C_XBP,#HIGH XBPSTACKTOP
                MOV     ?C_XBP+1,#LOW XBPSTACKTOP
ENDIF

IF PBPSTACK <> 0
EXTRN DATA (?C_PBP)
                MOV     ?C_PBP,#LOW PBPSTACKTOP
ENDIF

                MOV     SP,#?STACK-1
; This code is required if you use L51_BANK.A51 with Banking Mode 4
; EXTRN CODE (?B_SWITCH0)
;               CALL    ?B_SWITCH0      ; init bank mechanism to code bank 0
                LJMP    ?C_START

                END