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📄 cyrix.c

📁 xen虚拟机源代码安装包
💻 C
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#include <xen/config.h>#include <xen/init.h>#include <xen/irq.h>#include <xen/bitops.h>#include <xen/delay.h>#include <asm/io.h>#include <asm/processor.h>#include "cpu.h"/* * Read NSC/Cyrix DEVID registers (DIR) to get more detailed info. about the CPU */void __init do_cyrix_devid(unsigned char *dir0, unsigned char *dir1){	unsigned char ccr2, ccr3;	unsigned long flags;		/* we test for DEVID by checking whether CCR3 is writable */	local_irq_save(flags);	ccr3 = getCx86(CX86_CCR3);	setCx86(CX86_CCR3, ccr3 ^ 0x80);	getCx86(0xc0);   /* dummy to change bus */	if (getCx86(CX86_CCR3) == ccr3) {       /* no DEVID regs. */		ccr2 = getCx86(CX86_CCR2);		setCx86(CX86_CCR2, ccr2 ^ 0x04);		getCx86(0xc0);  /* dummy */		if (getCx86(CX86_CCR2) == ccr2) /* old Cx486SLC/DLC */			*dir0 = 0xfd;		else {                          /* Cx486S A step */			setCx86(CX86_CCR2, ccr2);			*dir0 = 0xfe;		}	}	else {		setCx86(CX86_CCR3, ccr3);  /* restore CCR3 */		/* read DIR0 and DIR1 CPU registers */		*dir0 = getCx86(CX86_DIR0);		*dir1 = getCx86(CX86_DIR1);	}	local_irq_restore(flags);}/* * Cx86_dir0_msb is a HACK needed by check_cx686_cpuid/slop in bugs.h in * order to identify the Cyrix CPU model after we're out of setup.c * * Actually since bugs.h doesn't even reference this perhaps someone should * fix the documentation ??? */static unsigned char Cx86_dir0_msb __initdata = 0;static char Cx86_model[][9] __initdata = {	"Cx486", "Cx486", "5x86 ", "6x86", "MediaGX ", "6x86MX ",	"M II ", "Unknown"};static char Cx486_name[][5] __initdata = {	"SLC", "DLC", "SLC2", "DLC2", "SRx", "DRx",	"SRx2", "DRx2"};static char Cx486S_name[][4] __initdata = {	"S", "S2", "Se", "S2e"};static char Cx486D_name[][4] __initdata = {	"DX", "DX2", "?", "?", "?", "DX4"};static char Cx86_cb[] __initdata = "?.5x Core/Bus Clock";static char cyrix_model_mult1[] __initdata = "12??43";static char cyrix_model_mult2[] __initdata = "12233445";/* * Reset the slow-loop (SLOP) bit on the 686(L) which is set by some old * BIOSes for compatibility with DOS games.  This makes the udelay loop * work correctly, and improves performance. * * FIXME: our newer udelay uses the tsc. We don't need to frob with SLOP */static void __init check_cx686_slop(struct cpuinfo_x86 *c){	unsigned long flags;		if (Cx86_dir0_msb == 3) {		unsigned char ccr3, ccr5;		local_irq_save(flags);		ccr3 = getCx86(CX86_CCR3);		setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN  */		ccr5 = getCx86(CX86_CCR5);		if (ccr5 & 2)			setCx86(CX86_CCR5, ccr5 & 0xfd);  /* reset SLOP */		setCx86(CX86_CCR3, ccr3);                 /* disable MAPEN */		local_irq_restore(flags);	}}static void __init set_cx86_reorder(void){	u8 ccr3;	printk(KERN_INFO "Enable Memory access reorder on Cyrix/NSC processor.\n");	ccr3 = getCx86(CX86_CCR3);	setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN

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