iwmmxt_helper.c
来自「xen虚拟机源代码安装包」· C语言 代码 · 共 683 行 · 第 1/2 页
C
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/* * iwMMXt micro operations for XScale. * * Copyright (c) 2007 OpenedHand, Ltd. * Written by Andrzej Zaborowski <andrew@openedhand.com> * Copyright (c) 2008 CodeSourcery * * This library is free software; you can redistribute it and/or * modify it under the terms of the GNU Lesser General Public * License as published by the Free Software Foundation; either * version 2 of the License, or (at your option) any later version. * * This library is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * Lesser General Public License for more details. * * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */#include <stdlib.h>#include <stdio.h>#include "cpu.h"#include "exec-all.h"#include "helpers.h"/* iwMMXt macros extracted from GNU gdb. *//* Set the SIMD wCASF flags for 8, 16, 32 or 64-bit operations. */#define SIMD8_SET( v, n, b) ((v != 0) << ((((b) + 1) * 4) + (n)))#define SIMD16_SET(v, n, h) ((v != 0) << ((((h) + 1) * 8) + (n)))#define SIMD32_SET(v, n, w) ((v != 0) << ((((w) + 1) * 16) + (n)))#define SIMD64_SET(v, n) ((v != 0) << (32 + (n)))/* Flags to pass as "n" above. */#define SIMD_NBIT -1#define SIMD_ZBIT -2#define SIMD_CBIT -3#define SIMD_VBIT -4/* Various status bit macros. */#define NBIT8(x) ((x) & 0x80)#define NBIT16(x) ((x) & 0x8000)#define NBIT32(x) ((x) & 0x80000000)#define NBIT64(x) ((x) & 0x8000000000000000ULL)#define ZBIT8(x) (((x) & 0xff) == 0)#define ZBIT16(x) (((x) & 0xffff) == 0)#define ZBIT32(x) (((x) & 0xffffffff) == 0)#define ZBIT64(x) (x == 0)/* Sign extension macros. */#define EXTEND8H(a) ((uint16_t) (int8_t) (a))#define EXTEND8(a) ((uint32_t) (int8_t) (a))#define EXTEND16(a) ((uint32_t) (int16_t) (a))#define EXTEND16S(a) ((int32_t) (int16_t) (a))#define EXTEND32(a) ((uint64_t) (int32_t) (a))uint64_t HELPER(iwmmxt_maddsq)(uint64_t a, uint64_t b){ a = (( EXTEND16S((a >> 0) & 0xffff) * EXTEND16S((b >> 0) & 0xffff) + EXTEND16S((a >> 16) & 0xffff) * EXTEND16S((b >> 16) & 0xffff) ) & 0xffffffff) | ((uint64_t) ( EXTEND16S((a >> 32) & 0xffff) * EXTEND16S((b >> 32) & 0xffff) + EXTEND16S((a >> 48) & 0xffff) * EXTEND16S((b >> 48) & 0xffff) ) << 32); return a;}uint64_t HELPER(iwmmxt_madduq)(uint64_t a, uint64_t b){ a = (( ((a >> 0) & 0xffff) * ((b >> 0) & 0xffff) + ((a >> 16) & 0xffff) * ((b >> 16) & 0xffff) ) & 0xffffffff) | (( ((a >> 32) & 0xffff) * ((b >> 32) & 0xffff) + ((a >> 48) & 0xffff) * ((b >> 48) & 0xffff) ) << 32); return a;}uint64_t HELPER(iwmmxt_sadb)(uint64_t a, uint64_t b){#define abs(x) (((x) >= 0) ? x : -x)#define SADB(SHR) abs((int) ((a >> SHR) & 0xff) - (int) ((b >> SHR) & 0xff)) return SADB(0) + SADB(8) + SADB(16) + SADB(24) + SADB(32) + SADB(40) + SADB(48) + SADB(56);#undef SADB}uint64_t HELPER(iwmmxt_sadw)(uint64_t a, uint64_t b){#define SADW(SHR) \ abs((int) ((a >> SHR) & 0xffff) - (int) ((b >> SHR) & 0xffff)) return SADW(0) + SADW(16) + SADW(32) + SADW(48);#undef SADW}uint64_t HELPER(iwmmxt_mulslw)(uint64_t a, uint64_t b){#define MULS(SHR) ((uint64_t) ((( \ EXTEND16S((a >> SHR) & 0xffff) * EXTEND16S((b >> SHR) & 0xffff) \ ) >> 0) & 0xffff) << SHR) return MULS(0) | MULS(16) | MULS(32) | MULS(48);#undef MULS}uint64_t HELPER(iwmmxt_mulshw)(uint64_t a, uint64_t b){#define MULS(SHR) ((uint64_t) ((( \ EXTEND16S((a >> SHR) & 0xffff) * EXTEND16S((b >> SHR) & 0xffff) \ ) >> 16) & 0xffff) << SHR) return MULS(0) | MULS(16) | MULS(32) | MULS(48);#undef MULS}uint64_t HELPER(iwmmxt_mululw)(uint64_t a, uint64_t b){#define MULU(SHR) ((uint64_t) ((( \ ((a >> SHR) & 0xffff) * ((b >> SHR) & 0xffff) \ ) >> 0) & 0xffff) << SHR) return MULU(0) | MULU(16) | MULU(32) | MULU(48);#undef MULU}uint64_t HELPER(iwmmxt_muluhw)(uint64_t a, uint64_t b){#define MULU(SHR) ((uint64_t) ((( \ ((a >> SHR) & 0xffff) * ((b >> SHR) & 0xffff) \ ) >> 16) & 0xffff) << SHR) return MULU(0) | MULU(16) | MULU(32) | MULU(48);#undef MULU}uint64_t HELPER(iwmmxt_macsw)(uint64_t a, uint64_t b){#define MACS(SHR) ( \ EXTEND16((a >> SHR) & 0xffff) * EXTEND16S((b >> SHR) & 0xffff)) return (int64_t) (MACS(0) + MACS(16) + MACS(32) + MACS(48));#undef MACS}uint64_t HELPER(iwmmxt_macuw)(uint64_t a, uint64_t b){#define MACU(SHR) ( \ (uint32_t) ((a >> SHR) & 0xffff) * \ (uint32_t) ((b >> SHR) & 0xffff)) return MACU(0) + MACU(16) + MACU(32) + MACU(48);#undef MACU}#define NZBIT8(x, i) \ SIMD8_SET(NBIT8((x) & 0xff), SIMD_NBIT, i) | \ SIMD8_SET(ZBIT8((x) & 0xff), SIMD_ZBIT, i)#define NZBIT16(x, i) \ SIMD16_SET(NBIT16((x) & 0xffff), SIMD_NBIT, i) | \ SIMD16_SET(ZBIT16((x) & 0xffff), SIMD_ZBIT, i)#define NZBIT32(x, i) \ SIMD32_SET(NBIT32((x) & 0xffffffff), SIMD_NBIT, i) | \ SIMD32_SET(ZBIT32((x) & 0xffffffff), SIMD_ZBIT, i)#define NZBIT64(x) \ SIMD64_SET(NBIT64(x), SIMD_NBIT) | \ SIMD64_SET(ZBIT64(x), SIMD_ZBIT)#define IWMMXT_OP_UNPACK(S, SH0, SH1, SH2, SH3) \uint64_t HELPER(glue(iwmmxt_unpack, glue(S, b)))(CPUState *env, \ uint64_t a, uint64_t b) \{ \ a = \ (((a >> SH0) & 0xff) << 0) | (((b >> SH0) & 0xff) << 8) | \ (((a >> SH1) & 0xff) << 16) | (((b >> SH1) & 0xff) << 24) | \ (((a >> SH2) & 0xff) << 32) | (((b >> SH2) & 0xff) << 40) | \ (((a >> SH3) & 0xff) << 48) | (((b >> SH3) & 0xff) << 56); \ env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \ NZBIT8(a >> 0, 0) | NZBIT8(a >> 8, 1) | \ NZBIT8(a >> 16, 2) | NZBIT8(a >> 24, 3) | \ NZBIT8(a >> 32, 4) | NZBIT8(a >> 40, 5) | \ NZBIT8(a >> 48, 6) | NZBIT8(a >> 56, 7); \ return a; \} \uint64_t HELPER(glue(iwmmxt_unpack, glue(S, w)))(CPUState *env, \ uint64_t a, uint64_t b) \{ \ a = \ (((a >> SH0) & 0xffff) << 0) | \ (((b >> SH0) & 0xffff) << 16) | \ (((a >> SH2) & 0xffff) << 32) | \ (((b >> SH2) & 0xffff) << 48); \ env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \ NZBIT8(a >> 0, 0) | NZBIT8(a >> 16, 1) | \ NZBIT8(a >> 32, 2) | NZBIT8(a >> 48, 3); \ return a; \} \uint64_t HELPER(glue(iwmmxt_unpack, glue(S, l)))(CPUState *env, \ uint64_t a, uint64_t b) \{ \ a = \ (((a >> SH0) & 0xffffffff) << 0) | \ (((b >> SH0) & 0xffffffff) << 32); \ env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \ NZBIT32(a >> 0, 0) | NZBIT32(a >> 32, 1); \ return a; \} \uint64_t HELPER(glue(iwmmxt_unpack, glue(S, ub)))(CPUState *env, \ uint64_t x) \{ \ x = \ (((x >> SH0) & 0xff) << 0) | \ (((x >> SH1) & 0xff) << 16) | \ (((x >> SH2) & 0xff) << 32) | \ (((x >> SH3) & 0xff) << 48); \ env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \ NZBIT16(x >> 0, 0) | NZBIT16(x >> 16, 1) | \ NZBIT16(x >> 32, 2) | NZBIT16(x >> 48, 3); \ return x; \} \uint64_t HELPER(glue(iwmmxt_unpack, glue(S, uw)))(CPUState *env, \ uint64_t x) \{ \ x = \ (((x >> SH0) & 0xffff) << 0) | \ (((x >> SH2) & 0xffff) << 32); \ env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \ NZBIT32(x >> 0, 0) | NZBIT32(x >> 32, 1); \ return x; \} \uint64_t HELPER(glue(iwmmxt_unpack, glue(S, ul)))(CPUState *env, \ uint64_t x) \{ \ x = (((x >> SH0) & 0xffffffff) << 0); \ env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = NZBIT64(x >> 0); \ return x; \} \uint64_t HELPER(glue(iwmmxt_unpack, glue(S, sb)))(CPUState *env, \ uint64_t x) \{ \ x = \ ((uint64_t) EXTEND8H((x >> SH0) & 0xff) << 0) | \ ((uint64_t) EXTEND8H((x >> SH1) & 0xff) << 16) | \ ((uint64_t) EXTEND8H((x >> SH2) & 0xff) << 32) | \ ((uint64_t) EXTEND8H((x >> SH3) & 0xff) << 48); \ env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \ NZBIT16(x >> 0, 0) | NZBIT16(x >> 16, 1) | \ NZBIT16(x >> 32, 2) | NZBIT16(x >> 48, 3); \ return x; \} \uint64_t HELPER(glue(iwmmxt_unpack, glue(S, sw)))(CPUState *env, \ uint64_t x) \{ \ x = \ ((uint64_t) EXTEND16((x >> SH0) & 0xffff) << 0) | \ ((uint64_t) EXTEND16((x >> SH2) & 0xffff) << 32); \ env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \ NZBIT32(x >> 0, 0) | NZBIT32(x >> 32, 1); \ return x; \} \uint64_t HELPER(glue(iwmmxt_unpack, glue(S, sl)))(CPUState *env, \ uint64_t x) \{ \ x = EXTEND32((x >> SH0) & 0xffffffff); \ env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = NZBIT64(x >> 0); \ return x; \}IWMMXT_OP_UNPACK(l, 0, 8, 16, 24)IWMMXT_OP_UNPACK(h, 32, 40, 48, 56)#define IWMMXT_OP_CMP(SUFF, Tb, Tw, Tl, O) \uint64_t HELPER(glue(iwmmxt_, glue(SUFF, b)))(CPUState *env, \ uint64_t a, uint64_t b) \{ \ a = \ CMP(0, Tb, O, 0xff) | CMP(8, Tb, O, 0xff) | \ CMP(16, Tb, O, 0xff) | CMP(24, Tb, O, 0xff) | \ CMP(32, Tb, O, 0xff) | CMP(40, Tb, O, 0xff) | \ CMP(48, Tb, O, 0xff) | CMP(56, Tb, O, 0xff); \ env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \ NZBIT8(a >> 0, 0) | NZBIT8(a >> 8, 1) | \ NZBIT8(a >> 16, 2) | NZBIT8(a >> 24, 3) | \ NZBIT8(a >> 32, 4) | NZBIT8(a >> 40, 5) | \ NZBIT8(a >> 48, 6) | NZBIT8(a >> 56, 7); \ return a; \} \uint64_t HELPER(glue(iwmmxt_, glue(SUFF, w)))(CPUState *env, \ uint64_t a, uint64_t b) \{ \ a = CMP(0, Tw, O, 0xffff) | CMP(16, Tw, O, 0xffff) | \ CMP(32, Tw, O, 0xffff) | CMP(48, Tw, O, 0xffff); \ env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \ NZBIT16(a >> 0, 0) | NZBIT16(a >> 16, 1) | \ NZBIT16(a >> 32, 2) | NZBIT16(a >> 48, 3); \ return a; \} \uint64_t HELPER(glue(iwmmxt_, glue(SUFF, l)))(CPUState *env, \ uint64_t a, uint64_t b) \{ \ a = CMP(0, Tl, O, 0xffffffff) | \ CMP(32, Tl, O, 0xffffffff); \ env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \ NZBIT32(a >> 0, 0) | NZBIT32(a >> 32, 1); \ return a; \}#define CMP(SHR, TYPE, OPER, MASK) ((((TYPE) ((a >> SHR) & MASK) OPER \ (TYPE) ((b >> SHR) & MASK)) ? (uint64_t) MASK : 0) << SHR)IWMMXT_OP_CMP(cmpeq, uint8_t, uint16_t, uint32_t, ==)IWMMXT_OP_CMP(cmpgts, int8_t, int16_t, int32_t, >)IWMMXT_OP_CMP(cmpgtu, uint8_t, uint16_t, uint32_t, >)#undef CMP#define CMP(SHR, TYPE, OPER, MASK) ((((TYPE) ((a >> SHR) & MASK) OPER \ (TYPE) ((b >> SHR) & MASK)) ? a : b) & ((uint64_t) MASK << SHR))IWMMXT_OP_CMP(mins, int8_t, int16_t, int32_t, <)IWMMXT_OP_CMP(minu, uint8_t, uint16_t, uint32_t, <)IWMMXT_OP_CMP(maxs, int8_t, int16_t, int32_t, >)IWMMXT_OP_CMP(maxu, uint8_t, uint16_t, uint32_t, >)#undef CMP#define CMP(SHR, TYPE, OPER, MASK) ((uint64_t) (((TYPE) ((a >> SHR) & MASK) \ OPER (TYPE) ((b >> SHR) & MASK)) & MASK) << SHR)IWMMXT_OP_CMP(subn, uint8_t, uint16_t, uint32_t, -)IWMMXT_OP_CMP(addn, uint8_t, uint16_t, uint32_t, +)#undef CMP/* TODO Signed- and Unsigned-Saturation */#define CMP(SHR, TYPE, OPER, MASK) ((uint64_t) (((TYPE) ((a >> SHR) & MASK) \ OPER (TYPE) ((b >> SHR) & MASK)) & MASK) << SHR)IWMMXT_OP_CMP(subu, uint8_t, uint16_t, uint32_t, -)IWMMXT_OP_CMP(addu, uint8_t, uint16_t, uint32_t, +)IWMMXT_OP_CMP(subs, int8_t, int16_t, int32_t, -)IWMMXT_OP_CMP(adds, int8_t, int16_t, int32_t, +)#undef CMP#undef IWMMXT_OP_CMP#define AVGB(SHR) ((( \ ((a >> SHR) & 0xff) + ((b >> SHR) & 0xff) + round) >> 1) << SHR)#define IWMMXT_OP_AVGB(r) \uint64_t HELPER(iwmmxt_avgb##r)(CPUState *env, uint64_t a, uint64_t b) \{ \ const int round = r; \ a = AVGB(0) | AVGB(8) | AVGB(16) | AVGB(24) | \ AVGB(32) | AVGB(40) | AVGB(48) | AVGB(56); \ env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \ SIMD8_SET(ZBIT8((a >> 0) & 0xff), SIMD_ZBIT, 0) | \ SIMD8_SET(ZBIT8((a >> 8) & 0xff), SIMD_ZBIT, 1) | \ SIMD8_SET(ZBIT8((a >> 16) & 0xff), SIMD_ZBIT, 2) | \ SIMD8_SET(ZBIT8((a >> 24) & 0xff), SIMD_ZBIT, 3) | \
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