vga.c

xen虚拟机源代码安装包

            return ret;
    }

    qemu_get_be32s(f, &s->latch);
    qemu_get_8s(f, &s->sr_index);
    qemu_get_buffer(f, s->sr, 8);
    qemu_get_8s(f, &s->gr_index);
    qemu_get_buffer(f, s->gr, 16);
    qemu_get_8s(f, &s->ar_index);
    qemu_get_buffer(f, s->ar, 21);
    qemu_get_be32s(f, &s->ar_flip_flop);
    qemu_get_8s(f, &s->cr_index);
    qemu_get_buffer(f, s->cr, 256);
    qemu_get_8s(f, &s->msr);
    qemu_get_8s(f, &s->fcr);
    qemu_get_8s(f, &s->st00);
    qemu_get_8s(f, &s->st01);

    qemu_get_8s(f, &s->dac_state);
    qemu_get_8s(f, &s->dac_sub_index);
    qemu_get_8s(f, &s->dac_read_index);
    qemu_get_8s(f, &s->dac_write_index);
    qemu_get_buffer(f, s->dac_cache, 3);
    qemu_get_buffer(f, s->palette, 768);

    qemu_get_be32s(f, &s->bank_offset);
    is_vbe = qemu_get_byte(f);
#ifdef CONFIG_BOCHS_VBE
    if (!is_vbe)
        return -EINVAL;
    qemu_get_be16s(f, &s->vbe_index);
    for(i = 0; i < VBE_DISPI_INDEX_NB; i++)
        qemu_get_be16s(f, &s->vbe_regs[i]);
    qemu_get_be32s(f, &s->vbe_start_addr);
    qemu_get_be32s(f, &s->vbe_line_offset);
    qemu_get_be32s(f, &s->vbe_bank_mask);
#else
    if (is_vbe)
        return -EINVAL;
#endif
    if (version_id >= 3) {
	/* people who restore old images may be lucky ... */
	qemu_get_be32s(f, &vram_size);
	if (vram_size != s->vram_size)
	    return -EINVAL;
	qemu_get_buffer(f, s->vram_ptr, s->vram_size); 
    }

    /* force refresh */
    s->graphic_mode = -1;
    return 0;
}

typedef struct PCIVGAState {
    PCIDevice dev;
    VGAState vga_state;
} PCIVGAState;

static void vga_map(PCIDevice *pci_dev, int region_num, 
                    uint32_t addr, uint32_t size, int type)
{
    PCIVGAState *d = (PCIVGAState *)pci_dev;
    VGAState *s = &d->vga_state;
    if (region_num == PCI_ROM_SLOT) {
        cpu_register_physical_memory(addr, s->bios_size, s->bios_offset);
    } else {
        cpu_register_physical_memory(addr, s->vram_size, s->vram_offset);
    }
}

/* do the same job as vgabios before vgabios get ready - yeah */
void vga_bios_init(VGAState *s)
{
    uint8_t palette_model[192] = {
        0,   0,   0,   0,   0, 170,   0, 170,
	0,   0, 170, 170, 170,   0,   0, 170,
        0, 170, 170,  85,   0, 170, 170, 170,
       85,  85,  85,  85,  85, 255,  85, 255,
       85,  85, 255, 255, 255,  85,  85, 255, 
       85, 255, 255, 255,  85, 255, 255, 255,
        0,  21,   0,   0,  21,  42,   0,  63,
        0,   0,  63,  42,  42,  21,   0,  42,
       21,  42,  42,  63,   0,  42,  63,  42,
        0,  21,  21,   0,  21,  63,   0,  63, 
       21,   0,  63,  63,  42,  21,  21,  42,
       21,  63,  42,  63,  21,  42,  63,  63,
       21,   0,   0,  21,   0,  42,  21,  42,
        0,  21,  42,  42,  63,   0,   0,  63,
        0,  42,  63,  42,   0,  63,  42,  42,
       21,   0,  21,  21,   0,  63,  21,  42,
       21,  21,  42,  63,  63,   0,  21,  63,
        0,  63,  63,  42,  21,  63,  42,  63,
       21,  21,   0,  21,  21,  42,  21,  63,
        0,  21,  63,  42,  63,  21,   0,  63,
       21,  42,  63,  63,   0,  63,  63,  42,
       21,  21,  21,  21,  21,  63,  21,  63,
       21,  21,  63,  63,  63,  21,  21,  63,
       21,  63,  63,  63,  21,  63,  63,  63
    };

    s->latch = 0; 

    s->sr_index = 3; 
    s->sr[0] = 3;
    s->sr[1] = 0;
    s->sr[2] = 3;
    s->sr[3] = 0;
    s->sr[4] = 2;
    s->sr[5] = 0;
    s->sr[6] = 0;
    s->sr[7] = 0;

    s->gr_index = 5; 
    s->gr[0] = 0;
    s->gr[1] = 0;
    s->gr[2] = 0;
    s->gr[3] = 0;
    s->gr[4] = 0;
    s->gr[5] = 16;
    s->gr[6] = 14;
    s->gr[7] = 15;
    s->gr[8] = 255;

    /* changed by out 0x03c0 */
    s->ar_index = 32;
    s->ar[0] = 0;
    s->ar[1] = 1;
    s->ar[2] = 2;
    s->ar[3] = 3;
    s->ar[4] = 4;
    s->ar[5] = 5;
    s->ar[6] = 6;
    s->ar[7] = 7;
    s->ar[8] = 8;
    s->ar[9] = 9;
    s->ar[10] = 10;
    s->ar[11] = 11;
    s->ar[12] = 12;
    s->ar[13] = 13;
    s->ar[14] = 14;
    s->ar[15] = 15;
    s->ar[16] = 12;
    s->ar[17] = 0;
    s->ar[18] = 15;
    s->ar[19] = 8;
    s->ar[20] = 0;

    s->ar_flip_flop = 1; 

    s->cr_index = 15; 
    s->cr[0] = 95;
    s->cr[1] = 79;
    s->cr[2] = 80;
    s->cr[3] = 130;
    s->cr[4] = 85;
    s->cr[5] = 129;
    s->cr[6] = 191;
    s->cr[7] = 31;
    s->cr[8] = 0;
    s->cr[9] = 79;
    s->cr[10] = 14;
    s->cr[11] = 15;
    s->cr[12] = 0;
    s->cr[13] = 0;
    s->cr[14] = 5;
    s->cr[15] = 160;
    s->cr[16] = 156;
    s->cr[17] = 142;
    s->cr[18] = 143;
    s->cr[19] = 40;
    s->cr[20] = 31;
    s->cr[21] = 150;
    s->cr[22] = 185;
    s->cr[23] = 163;
    s->cr[24] = 255;

    s->msr = 103; 
    s->fcr = 0; 
    s->st00 = 0; 
    s->st01 = 0; 

    /* dac_* & palette will be initialized by os through out 0x03c8 &
     * out 0c03c9(1:3) */
    s->dac_state = 0; 
    s->dac_sub_index = 0; 
    s->dac_read_index = 0; 
    s->dac_write_index = 16; 
    s->dac_cache[0] = 255;
    s->dac_cache[1] = 255;
    s->dac_cache[2] = 255;

    /* palette */
    memcpy(s->palette, palette_model, 192);

    s->bank_offset = 0;
    s->graphic_mode = -1;

    /* TODO: add vbe support if enabled */
}

/* when used on xen environment, the vga_ram_base is not used */
void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base, 
                     unsigned long vga_ram_offset, int vga_ram_size)
{
    int i, j, v, b;

    for(i = 0;i < 256; i++) {
        v = 0;
        for(j = 0; j < 8; j++) {
            v |= ((i >> j) & 1) << (j * 4);
        }
        expand4[i] = v;

        v = 0;
        for(j = 0; j < 4; j++) {
            v |= ((i >> (2 * j)) & 3) << (j * 4);
        }
        expand2[i] = v;
    }
    for(i = 0; i < 16; i++) {
        v = 0;
        for(j = 0; j < 4; j++) {
            b = ((i >> j) & 1);
            v |= b << (2 * j);
            v |= b << (2 * j + 1);
        }
        expand4to8[i] = v;
    }

    vga_reset(s);

    /* Video RAM must be page-aligned for PVFB memory sharing */
    s->vram_ptr = s->vram_alloc = qemu_memalign(TARGET_PAGE_SIZE, vga_ram_size);

#ifdef CONFIG_STUBDOM
    if (!cirrus_vga_enabled)
        xenfb_pv_display_start(s->vram_ptr);
#endif

    s->vram_offset = vga_ram_offset;
    s->vram_size = vga_ram_size;
    s->ds = ds;
    ds->palette = s->last_palette;
    s->get_bpp = vga_get_bpp;
    s->get_offsets = vga_get_offsets;
    s->get_resolution = vga_get_resolution;
    graphic_console_init(s->ds, vga_update_display, vga_invalidate_display,
                         vga_screen_dump, s);

    vga_bios_init(s);
}

/* used by both ISA and PCI */
static void vga_init(VGAState *s)
{
    int vga_io_memory;

    register_savevm("vga", 0, 3, vga_save, vga_load, s);

    register_ioport_write(0x3c0, 16, 1, vga_ioport_write, s);

    register_ioport_write(0x3b4, 2, 1, vga_ioport_write, s);
    register_ioport_write(0x3d4, 2, 1, vga_ioport_write, s);
    register_ioport_write(0x3ba, 1, 1, vga_ioport_write, s);
    register_ioport_write(0x3da, 1, 1, vga_ioport_write, s);

    register_ioport_read(0x3c0, 16, 1, vga_ioport_read, s);

    register_ioport_read(0x3b4, 2, 1, vga_ioport_read, s);
    register_ioport_read(0x3d4, 2, 1, vga_ioport_read, s);
    register_ioport_read(0x3ba, 1, 1, vga_ioport_read, s);
    register_ioport_read(0x3da, 1, 1, vga_ioport_read, s);
    s->bank_offset = 0;

#ifdef CONFIG_BOCHS_VBE
    s->vbe_regs[VBE_DISPI_INDEX_ID] = VBE_DISPI_ID0;
    s->vbe_bank_mask = ((s->vram_size >> 16) - 1);
#if defined (TARGET_I386)
    register_ioport_read(0x1ce, 1, 2, vbe_ioport_read_index, s);
    register_ioport_read(0x1cf, 1, 2, vbe_ioport_read_data, s);

    register_ioport_write(0x1ce, 1, 2, vbe_ioport_write_index, s);
    register_ioport_write(0x1cf, 1, 2, vbe_ioport_write_data, s);

    /* old Bochs IO ports */
    register_ioport_read(0xff80, 1, 2, vbe_ioport_read_index, s);
    register_ioport_read(0xff81, 1, 2, vbe_ioport_read_data, s);

    register_ioport_write(0xff80, 1, 2, vbe_ioport_write_index, s);
    register_ioport_write(0xff81, 1, 2, vbe_ioport_write_data, s); 
#else
    register_ioport_read(0x1ce, 1, 2, vbe_ioport_read_index, s);
    register_ioport_read(0x1d0, 1, 2, vbe_ioport_read_data, s);

    register_ioport_write(0x1ce, 1, 2, vbe_ioport_write_index, s);
    register_ioport_write(0x1d0, 1, 2, vbe_ioport_write_data, s);
#endif
#endif /* CONFIG_BOCHS_VBE */

    vga_io_memory = cpu_register_io_memory(0, vga_mem_read, vga_mem_write, s);
    cpu_register_physical_memory(isa_mem_base + 0x000a0000, 0x20000, 
                                 vga_io_memory);
}

int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base, 
                 unsigned long vga_ram_offset, int vga_ram_size)
{
    VGAState *s;

    s = qemu_mallocz(sizeof(VGAState));
    if (!s)
        return -1;

    vga_common_init(s, ds, vga_ram_base, vga_ram_offset, vga_ram_size);
    vga_init(s);

#ifdef CONFIG_BOCHS_VBE
    /* XXX: use optimized standard vga accesses */
    cpu_register_physical_memory(VBE_DISPI_LFB_PHYSICAL_ADDRESS, 
                                 vga_ram_size, vga_ram_offset);
#endif
    return 0;
}

int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, 
                 unsigned long vga_ram_offset, int vga_ram_size,
                 unsigned long vga_bios_offset, int vga_bios_size)
{
    PCIVGAState *d;
    VGAState *s;
    uint8_t *pci_conf;
    
    d = (PCIVGAState *)pci_register_device(bus, "VGA", 
                                           sizeof(PCIVGAState),
                                           -1, NULL, NULL);
    if (!d)
        return -1;
    s = &d->vga_state;
    
    vga_common_init(s, ds, vga_ram_base, vga_ram_offset, vga_ram_size);
    vga_init(s);
    s->pci_dev = &d->dev;
    
    pci_conf = d->dev.config;
    pci_conf[0x00] = 0x34; // dummy VGA (same as Bochs ID)
    pci_conf[0x01] = 0x12;
    pci_conf[0x02] = 0x11;
    pci_conf[0x03] = 0x11;
    pci_conf[0x0a] = 0x00; // VGA controller 
    pci_conf[0x0b] = 0x03;
    pci_conf[0x0e] = 0x00; // header_type
    
    /* XXX: vga_ram_size must be a power of two */
    pci_register_io_region(&d->dev, 0, vga_ram_size, 
                           PCI_ADDRESS_SPACE_MEM_PREFETCH, vga_map);
    if (vga_bios_size != 0) {
        unsigned int bios_total_size;
        s->bios_offset = vga_bios_offset;
        s->bios_size = vga_bios_size;
        /* must be a power of two */
        bios_total_size = 1;
        while (bios_total_size < vga_bios_size)
            bios_total_size <<= 1;
        pci_register_io_region(&d->dev, PCI_ROM_SLOT, bios_total_size, 
                               PCI_ADDRESS_SPACE_MEM_PREFETCH, vga_map);
    }
    return 0;
}

void *vga_update_vram(VGAState *s, void *vga_ram_base, int vga_ram_size)
{
    uint8_t *old_pointer;

    if (s->vram_size != vga_ram_size) {
        fprintf(stderr, "No support to change vga_ram_size\n");
        return NULL;
    }

    if (!vga_ram_base) {
        vga_ram_base = qemu_memalign(TARGET_PAGE_SIZE, vga_ram_size + TARGET_PAGE_SIZE + 1);
        if (!vga_ram_base) {
            fprintf(stderr, "reallocate error\n");
            return NULL;
        }
    }

    /* XXX lock needed? */
    old_pointer = s->vram_alloc;
    s->vram_alloc = vga_ram_base;
    vga_ram_base = (uint8_t *)((long)(vga_ram_base + 15) & ~15L);
    memcpy(vga_ram_base, s->vram_ptr, vga_ram_size);
    s->vram_ptr = vga_ram_base;

    return old_pointer;
}

/********************************************************/
/* vga screen dump */

static int vga_save_w, vga_save_h;

static void vga_save_dpy_update(DisplayState *s, 
                                int x, int y, int w, int h)
{
}

static void vga_save_dpy_resize(DisplayState *s, int w, int h)
{
    s->linesize = w * 4;
    s->data = qemu_malloc(h * s->linesize);
    vga_save_w = w;
    vga_save_h = h;
}

static void vga_save_dpy_refresh(DisplayState *s)
{
}

static int ppm_save(const char *filename, uint8_t *data, 
                    int w, int h, int linesize)
{
    FILE *f;
    uint8_t *d, *d1;
    unsigned int v;
    int y, x;

    f = fopen(filename, "wb");
    if (!f)
        return -1;
    fprintf(f, "P6\n%d %d\n%d\n",
            w, h, 255);
    d1 = data;
    for(y = 0; y < h; y++) {
        d = d1;
        for(x = 0; x < w; x++) {
            v = *(uint32_t *)d;
            fputc((v >> 16) & 0xff, f);
            fputc((v >> 8) & 0xff, f);
            fputc((v) & 0xff, f);
            d += 4;
        }
        d1 += linesize;
    }
    fclose(f);
    return 0;
}

/* save the vga display in a PPM image even if no display is