mx21_ddk.h

BGW211针对freescale的MX21的无线WIFI驱动（WINCE5.0）

//------------------------------------------------------------------------------
//
// Copyright (c) Microsoft Corporation.  All rights reserved.
//
//
// Use of this source code is subject to the terms of the Microsoft end-user
// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
// If you did not accept the terms of the EULA, you are not authorized to use
// this source code. For a copy of the EULA, please see the LICENSE.RTF on your
// install media.
//
//------------------------------------------------------------------------------
//
// Copyright (C) 2004, Freescale Semiconductor, Inc. All Rights Reserved
// THIS SOURCE CODE IS CONFIDENTIAL AND PROPRIETARY AND MAY NOT
// BE USED OR DISTRIBUTED WITHOUT THE WRITTEN PERMISSION OF
// Freescale Semiconductor, Inc.
//
//------------------------------------------------------------------------------
//
//  Header:  Mx21DDK.h
//
//  Provides definitions for MX21DDK
//
//------------------------------------------------------------------------------
#ifndef __MX21DDK_H
#define __MX21DDK_H

#ifdef __cplusplus
extern "C" {
#endif

//------------------------------------------------------------------------------
// GENERAL CONSTANTS
//------------------------------------------------------------------------------
#define DMAC_CHANNEL_INVALID         -1
//------------------------------------------------------------------------------
// ENUMERATIONS AND STRUCTURES 
//------------------------------------------------------------------------------
// Define Type Enumerations and Structure


// TimerClass structs & enumerations
typedef enum timerMode {
    TIMERMODEPERIODIC,
    TIMERMODEFREERUNNING,
    TIMERMODENONE
} TIMERMODE_C;

typedef enum timerClkSrc {
    TIMERDISABLED,
    TIMERSYSCLK,
    TIMERSYSCLK16,
    TIMERTIN,
    TIMERCLK32,
    TIMERCLKSRCNONE
} TIMERCLKSRC_C;

typedef enum timerInterrupt {
    TIMERINTCOMPARE,
    TIMERINTCAPTURE
} TIMERINTERRUPT_C;

typedef enum timerPeriodType {
    SECOND,
    MILLISEC,
    MICROSEC
} TIMERPERIODTYPE_C;

// CspiClass structs & enumerations
typedef enum cspiId {
    CSPI1,
    CSPI2,
    CSPINONE
} CSPIID_C;

typedef enum cspiAvailStatus {
    CSPINOTAVAILABLE = 0,
    CSPIAVAILABLE = 1
} CSPIAVAILSTATUS_C;

typedef enum cspiSSPortId {
    CSPISS0,
    CSPISS1,
    CSPISS2,
    CSPISSMAX,
} CSPISSPORTID_C;

typedef enum TimerId {
    TIMERID1,
    TIMERID2,
    TIMERID3,
    TIMERIDMAX,
} TIMERID_C;

typedef enum cspiIntType {
    BITCNTOVERFLOW,
    RXFIFOOVERFLOW,
    RXFIFOFULL,
    RXFIFOHALF,
    RXFIFODATARDY,
    TXFIFOTXSHIFTEMPTY,
    TXFIFOFULL,
    TXFIFOHALF,
    TXFIFOEMPTY,
    CSPIINTTYPENONE
} CSPIINTTYPE_C;


//This structure includes the cspi configure infomation
typedef struct cspiConfigData {
    BOOL CSPIMODE;
    DWORD CSPIFREQUENCY;
    UINT8 CSPIBITLENGTH;
    UINT8 CSPIDRCTL;
    UINT8 CSPIPOL;
    UINT8 CSPIPHA;
    UINT8 CSPISSCTL;
    UINT8 CSPISSPOL;
    UINT8 _RESERVED[2];
} CSPICONFIGDATA_T, *PCSPICONFIGDATA_T;

// I2C class error codes
typedef enum {
    I2C_ERROR_NOERROR = 0,
    I2C_ERROR_NOACK,
    I2C_ERROR_TIMEOUT,
    I2C_ERROR_ABANDONED,
} I2C_ERROR_CODE;

// External DMA request source
typedef enum {
    DMAC_REQUEST_RESERVED,
    DMAC_REQUEST_CSPI3_RX_FIFO,
    DMAC_REQUEST_CSPI3_TX_FIFO,
    DMAC_REQUEST_Ext_DMA_REQ,
    DMAC_REQUEST_FIRI_RX_FIFO,
    DMAC_REQUEST_FIRI_TX_FIFO,
    DMAC_REQUEST_SDHC2,
    DMAC_REQUEST_SDHC1,
    DMAC_REQUEST_SSI2_RX0_FIFO,
    DMAC_REQUEST_SSI2_TX0_FIFO,
    DMAC_REQUEST_SSI2_RX1_FIFO,
    DMAC_REQUEST_SSI2_TX1_FIFO,
    DMAC_REQUEST_SSI1_RX0_FIFO,
    DMAC_REQUEST_SSI1_TX0_FIFO,
    DMAC_REQUEST_SSI1_RX1_FIFO,
    DMAC_REQUEST_SSI1_TX1_FIFO,
    DMAC_REQUEST_CSPI2_RX_FIFO,
    DMAC_REQUEST_CSPI2_TX_FIFO,
    DMAC_REQUEST_CSPI1_RX_FIFO,
    DMAC_REQUEST_CSPI1_TX_FIFO,
    DMAC_REQUEST_UART4_RX_FIFO,
    DMAC_REQUEST_UART4_TX_FIFO,
    DMAC_REQUEST_UART3_RX_FIFO,
    DMAC_REQUEST_UART3_TX_FIFO,
    DMAC_REQUEST_UART2_RX_FIFO,
    DMAC_REQUEST_UART2_TX_FIFO,
    DMAC_REQUEST_UART1_RX_FIFO,
    DMAC_REQUEST_UART1_TX_FIFO,
    DMAC_REQUEST_BMI_TX_FIFO,
    DMAC_REQUEST_BMI_RX_FIFO,
    DMAC_REQUEST_CSI_STAT_FIFO,
    DMAC_REQUEST_CSI_RX_FIFO,
    DMAC_REQUEST_MAX,
} DMAC_REQUEST_SRC;

// DMAC transfer status
typedef enum {
    DMAC_TRANSFER_STATUS_NONE,
    DMAC_TRANSFER_STATUS_COMPLETE=0x01,
    DMAC_TRANSFER_STATUS_BURST_TIMEOUT=0x02,
    DMAC_TRANSFER_STATUS_REQ_TIMEOUT=0x04,
    DMAC_TRANSFER_STATUS_ERROR=0x08,
    DMAC_TRANSFER_STATUS_BUFFER_OVERFLOW=0x10,
} DMAC_TRANSFER_STATUS;

// Transfer Mode
typedef enum {
    DMAC_TRANSFER_MODE_LINEAR_MEMORY,
    DMAC_TRANSFER_MODE_2D_MEMORY,
    DMAC_TRANSFER_MODE_FIFO,
    DMAC_TRANSFER_MODE_EOBE
} DMAC_TRANSFER_MODE;

// Transfer Size
typedef enum DMAC_TRANSFER_SIZE {
    DMAC_TRANSFER_SIZE_32BIT,
    DMAC_TRANSFER_SIZE_8BIT,
    DMAC_TRANSFER_SIZE_16BIT
} DMAC_TRANSFER_SIZE;

// Transfer repeat Mode
typedef enum DMAC_REPEAT_TYPE {
    DMAC_REPEAT_DISABLED,
    DMAC_REPEAT_ONCE,
    DMAC_REPEAT_FOREVER, // dma cycle does not stop until TransStop() is called
} DMAC_REPEAT_TYPE;

// DMA channel configuration
typedef struct DMAC_CHANNEL_CFG {
    UINT32               SrcAddr;
    UINT32               DstAddr;
    UINT32               DataSize;
    DMAC_TRANSFER_MODE   DstMode;
    DMAC_TRANSFER_MODE   SrcMode;
    BOOL                 MemDirIncrease;
    DMAC_TRANSFER_SIZE   DstSize;
    DMAC_TRANSFER_SIZE   SrcSize;
    DMAC_REPEAT_TYPE     RepeatType;
    BOOL                 ExtReqEnable;
    DMAC_REQUEST_SRC     ReqSrc;
    UINT32               BurstLength;
    BOOL                 ReqTimeout;
    UINT16               ReqTOCounter;
    UINT16               BusClkCounter;
    UINT16               WSR;
    UINT16               XSR;
    UINT16               YSR;
    UINT16               _pad;
} DMAC_CHANNEL_CFG,  *PDMAC_CHANNEL_CFG;



typedef void* GPIOHANDLE;
typedef void* TIMERHANDLE;
typedef void* CSPIHANDLE;
typedef void* I2CHANDLE;
typedef void* DDKHANDLE;
typedef void (*TIMERISR)(BOOL); // Type for timer interrupter service routine
//------------------------------------------------------------------------------
// MX21 DDK interfaces
//------------------------------------------------------------------------------
// GPIO interface
GPIOHANDLE DDKCreateGpioObject(void);
INT8 DDKGetGpioSignalState(GPIOHANDLE gpiohandle, GPIO_PORT port, UINT32 signal);
void DDKSetGpioSignalState(GPIOHANDLE gpiohandle,GPIO_PORT port,UINT32 signal,
                          UINT8 state,BOOL bInPowerMode);
UINT32 DDKGetGpioSignals(GPIOHANDLE gpiohandle,GPIO_PORT port, UINT32 signalMask);
void DDKSetGpioSignals(GPIOHANDLE gpiohandle,GPIO_PORT port,UINT32 signalMask,UINT32 stateMask);
GPIO_INT_TYPE DDKSetGpioInterruptType(GPIOHANDLE gpiohandle,GPIO_PORT port, 
                                    UINT32 signal,GPIO_INT_TYPE type);
void DDKSetGpioInterruptState(GPIOHANDLE gpiohandle,GPIO_PORT port, UINT32 signal,
                            BOOL bInPowerMode,BOOL bEnable);
// Timer interface                            
TIMERHANDLE DDKCreateTimerObject(TIMERISR timerisr, TIMERID_C timerID);
void DDKSetTimerStart(TIMERHANDLE timerhandle, BOOL bStart);
void DDKSetTimerInterrupt(TIMERHANDLE timerhandle, BOOL bEnable);
void DDKSetTImerDelay(TIMERHANDLE timerhandle, TIMERMODE_C timerMode, UINT32 period, TIMERPERIODTYPE_C type);

// CSPI interface
CSPIHANDLE DDKCreateCSPIObject(CSPIID_C CspiId);
BOOL DDKCspiConfigure(CSPIHANDLE cspihandle, PCSPICONFIGDATA_T pData);
BOOL DDKCspiChipSelect(CSPIHANDLE cspihandle, CSPISSPORTID_C PortId);
void DDKCspiHwResourceLock(CSPIHANDLE cspihandle, BOOL bLock);
UINT8 DDKCspiExchange(CSPIHANDLE cspihandle, UINT32 *pTxBuf, UINT32 *pRxBuf, UINT8 NumOfWords);
BOOL DDKCspiSetSwap(CSPIHANDLE cspihandle, BOOL swap);
BOOL DDKCspiStartDMAExchange(CSPIHANDLE cspihandle, UINT8 mode);
BOOL DDKCspiStopDMAExchange(CSPIHANDLE cspihandle, UINT8 mode);
UINT32 DDKCspiReadRxFifo(CSPIHANDLE cspihandle);
BOOL DDKCspiIsRxFifoDataReady(CSPIHANDLE cspihandle);
BOOL DDKCspiIsExchangeOngoing(CSPIHANDLE cspihandle);


// I2C interface
I2CHANDLE DDKCreateI2CObject(void);
int DDKGetI2CErrorCode(I2CHANDLE i2chandle);
void DDKI2CWriteMasterData(I2CHANDLE i2chandle, BYTE byAddress, BYTE* pbyDataBuffer, int iDataSize);
void DDKI2CReadMasterData(I2CHANDLE i2chandle, BYTE byAddress, BYTE* pbyRxDataBuffer, int iRxDataSize);
void DDKI2CLock(I2CHANDLE i2chandle);
void DDKI2CUnlock(I2CHANDLE i2chandle);
BOOL DDKSetI2CFrequency(I2CHANDLE i2chandle, DWORD dwFrequency);


void DDKDeleteObject(DDKHANDLE hObj);
//-----------------------------------------------------------------------------
// DMAC device driver interface

UINT8 DDKDmacRequestChan(UINT8 chan);
BOOL DDKDmacReleaseChan(UINT8 chan);
UINT8 DDKDmacConfigureChan(UINT8 chan, DMAC_CHANNEL_CFG *pChannelCfg);
BOOL DDKDmacStartChan(UINT8 chan);
BOOL DDKDmacStopChan(UINT8 chan);
UINT32 DDKDmacGetTransStatus(UINT8 chan);
UINT32 DDKDmacGetTransSize(UINT8 chan);
void DDKDmacSetSrcAddress(UINT8 chan, UINT32 src);
void DDKDmacSetDestAddress(UINT8 chan, UINT32 dest);
void DDKDmacSetTransCount(UINT8 chan, UINT32 count);
void DDKDmacSetBurstLength(UINT8 chan, UINT32 burstLen);
void DDKDmacSetRepeatType(UINT8 chan, DMAC_REPEAT_TYPE repeatType);
BOOL DDKDmacIsChannelIntr(UINT8 chan);
void DDKDmacClearChannelIntr(UINT8 chan);
void DDKDmacEnableChannelIntr(UINT8 chan);
void DDKDmacDisableChannelIntr(UINT8 chan);

#ifdef __cplusplus
       }
#endif 

#endif // __MX21DDK_H