sfr32170_pragma.h

瑞萨CAN通讯单片机程序

/*""FILE COMMENT""*****************************************************
 *	M32R C Programming			-A-
 *		< SFR Define file for M32170/174 Fx(M32R/ECU#4) >
 *
 *	Copyright (c) 2003 Renesas Technology Corporation
 *			   And Renesas Solutions Corporation
 *			   All Rights Reserved
 *
 * $Id: sfr32170_pragma.h,v 1.91 2003/06/23 15:43:00 simoyama Exp $
 *********************************************************************/

/* Note: 
 * When using any or all of the information contained in these materials,
 * including product data, diagrams, charts, programs, and algorithms,
 * please be sure to evaluate all information as a total system before making
 * a final decision on the applicability of the information and products.
 * Renesas Technology Corporation assumes no responsibility for any damage,
 * liability or other loss resulting from the information contained herein.
 */

#ifndef _SFR32170_PRAGMA_H_INCLUDED
#define _SFR32170_PRAGMA_H_INCLUDED

/************************************************************************/
/*		typedef							*/
/************************************************************************/

typedef	volatile unsigned char	VUB;
typedef	volatile unsigned short	VUH;
typedef	volatile unsigned long	VUW;

/************************************************************************/
/*		SFR definition						*/
/************************************************************************/
/* Interrupt Control */
#pragma ADDRESS IVECT				0x00800000	/* (H) Interrupt Vector register */
#pragma ADDRESS IMASK				0x00800004	/* (B) Interrupt Request Mask register */
#pragma ADDRESS SBICR				0x00800006	/* (B) SBI Control register */
#pragma ADDRESS ICAN0CR				0x00800060	/* (B) CAN0 Transmit/Receive & Error Interrupt Control register */
#pragma ADDRESS ITML1CR				0x00800061	/* (B) TML1 Input Interrupt Control register */
#pragma ADDRESS ITID2CR				0x00800062	/* (B) TID2 Output Interrupt Control register */
#pragma ADDRESS IAD1CCR				0x00800063	/* (B) A-D1 Conversion Interrupt Control register */
#pragma ADDRESS ISIO45CR			0x00800064	/* (B) SIO4, 5 Transmit/Receive Interrupt Control register */
#pragma ADDRESS ITOM0CR				0x00800065	/* (B) TOD1, TOM0 Output Interrupt Control register */
#pragma ADDRESS ITID1CR				0x00800066	/* (B) TID1 Output Interrupt Control register */
#pragma ADDRESS IRTDCR				0x00800067	/* (B) RTD Interrupt Control register */
#pragma ADDRESS ISIO23CR			0x00800068	/* (B) SIO2, 3 Transmit/Receive Interrupt Control register */
#pragma ADDRESS IDMA59CR			0x00800069	/* (B) DMA5-9 Interrupt Control register */
#pragma ADDRESS ITOD0CR				0x0080006A	/* (B) TOD0 Output Interrupt Control register */
#pragma ADDRESS ITID0CR				0x0080006B	/* (B) TID0 Output Interrupt Control register */
#pragma ADDRESS IAD0CCR				0x0080006C	/* (B) A-D0 Conversion Interrupt Control register */
#pragma ADDRESS ISIO0TXCR			0x0080006D	/* (B) SIO0 Transmit Interrupt Control register */
#pragma ADDRESS ISIO0RXCR			0x0080006E	/* (B) SIO0 Receive Interrupt Control register */
#pragma ADDRESS ISIO1TXCR			0x0080006F	/* (B) SIO1 Transmit Interrupt Control register */
#pragma ADDRESS ISIO1RXCR			0x00800070	/* (B) SIO1 Receive Interrupt Control register */
#pragma ADDRESS IDMA04CR			0x00800071	/* (B) DMA0-4 Interrupt Control register */
#pragma ADDRESS IMJTOCR0			0x00800072	/* (B) MJT Output Interrupt Control register0 */
#pragma ADDRESS IMJTOCR1			0x00800073	/* (B) MJT Output Interrupt Control register1 */
#pragma ADDRESS IMJTOCR2			0x00800074	/* (B) MJT Output Interrupt Control register2 */
#pragma ADDRESS IMJTOCR3			0x00800075	/* (B) MJT Output Interrupt Control register3 */
#pragma ADDRESS IMJTOCR4			0x00800076	/* (B) MJT Output Interrupt Control register4 */
#pragma ADDRESS IMJTOCR5			0x00800077	/* (B) MJT Output Interrupt Control register5 */
#pragma ADDRESS IMJTOCR6			0x00800078	/* (B) MJT Output Interrupt Control register6 */
#pragma ADDRESS IMJTOCR7			0x00800079	/* (B) MJT Output Interrupt Control register7 */
#pragma ADDRESS IMJTICR0			0x0080007A	/* (B) MJT Input Interrupt Control register0 */
#pragma ADDRESS IMJTICR1			0x0080007B	/* (B) MJT Input Interrupt Control register1 */
#pragma ADDRESS IMJTICR2			0x0080007C	/* (B) MJT Input Interrupt Control register2 */
#pragma ADDRESS IMJTICR3			0x0080007D	/* (B) MJT Input Interrupt Control register3 */
#pragma ADDRESS IMJTICR4			0x0080007E	/* (B) MJT Input Interrupt Control register4 */

/* A-D Converter0 */
#pragma ADDRESS AD0SIM0				0x00800080	/* (B) A-D0 Single Mode register0 */
#pragma ADDRESS AD0SIM1				0x00800081	/* (B) A-D0 Single Mode register1 */
#pragma ADDRESS AD0SCM0				0x00800084	/* (B) A-D0 Scan Mode register0 */
#pragma ADDRESS AD0SCM1				0x00800085	/* (B) A-D0 Scan Mode register1 */
#pragma ADDRESS AD0SAR				0x00800088	/* (H) A-D0 Successively Approximation register */
#pragma ADDRESS AD0CMP				0x0080008C	/* (H) A-D0 Comparate Data register */
#pragma ADDRESS AD0DT0				0x00800090	/* (H) 10-bit A-D0 Data register0 */
#pragma ADDRESS AD0DT1				0x00800092	/* (H) 10-bit A-D0 Data register1 */
#pragma ADDRESS AD0DT2				0x00800094	/* (H) 10-bit A-D0 Data register2 */
#pragma ADDRESS AD0DT3				0x00800096	/* (H) 10-bit A-D0 Data register3 */
#pragma ADDRESS AD0DT4				0x00800098	/* (H) 10-bit A-D0 Data register4 */
#pragma ADDRESS AD0DT5				0x0080009A	/* (H) 10-bit A-D0 Data register5 */
#pragma ADDRESS AD0DT6				0x0080009C	/* (H) 10-bit A-D0 Data register6 */
#pragma ADDRESS AD0DT7				0x0080009E	/* (H) 10-bit A-D0 Data register7 */
#pragma ADDRESS AD0DT8				0x008000A0	/* (H) 10-bit A-D0 Data register8 */
#pragma ADDRESS AD0DT9				0x008000A2	/* (H) 10-bit A-D0 Data register9 */
#pragma ADDRESS AD0DT10				0x008000A4	/* (H) 10-bit A-D0 Data register10 */
#pragma ADDRESS AD0DT11				0x008000A6	/* (H) 10-bit A-D0 Data register11 */
#pragma ADDRESS AD0DT12				0x008000A8	/* (H) 10-bit A-D0 Data register12 */
#pragma ADDRESS AD0DT13				0x008000AA	/* (H) 10-bit A-D0 Data register13 */
#pragma ADDRESS AD0DT14				0x008000AC	/* (H) 10-bit A-D0 Data register14 */
#pragma ADDRESS AD0DT15				0x008000AE	/* (H) 10-bit A-D0 Data register15 */
#pragma ADDRESS AD08DT0				0x008000D1	/* (B) 8-bit A-D0 Data register0 */
#pragma ADDRESS AD08DT1				0x008000D3	/* (B) 8-bit A-D0 Data register1 */
#pragma ADDRESS AD08DT2				0x008000D5	/* (B) 8-bit A-D0 Data register2 */
#pragma ADDRESS AD08DT3				0x008000D7	/* (B) 8-bit A-D0 Data register3 */
#pragma ADDRESS AD08DT4				0x008000D9	/* (B) 8-bit A-D0 Data register4 */
#pragma ADDRESS AD08DT5				0x008000DB	/* (B) 8-bit A-D0 Data register5 */
#pragma ADDRESS AD08DT6				0x008000DD	/* (B) 8-bit A-D0 Data register6 */
#pragma ADDRESS AD08DT7				0x008000DF	/* (B) 8-bit A-D0 Data register7 */
#pragma ADDRESS AD08DT8				0x008000E1	/* (B) 8-bit A-D0 Data register8 */
#pragma ADDRESS AD08DT9				0x008000E3	/* (B) 8-bit A-D0 Data register9 */
#pragma ADDRESS AD08DT10			0x008000E5	/* (B) 8-bit A-D0 Data register10 */
#pragma ADDRESS AD08DT11			0x008000E7	/* (B) 8-bit A-D0 Data register11 */
#pragma ADDRESS AD08DT12			0x008000E9	/* (B) 8-bit A-D0 Data register12 */
#pragma ADDRESS AD08DT13			0x008000EB	/* (B) 8-bit A-D0 Data register13 */
#pragma ADDRESS AD08DT14			0x008000ED	/* (B) 8-bit A-D0 Data register14 */
#pragma ADDRESS AD08DT15			0x008000EF	/* (B) 8-bit A-D0 Data register15 */

/* SIO0-3 */
#pragma ADDRESS SI23STAT			0x00800100	/* (B) SIO2, 3 Interrupt Request Status register */
#pragma ADDRESS SI03MASK			0x00800101	/* (B) SIO0-3 Interrupt Request Mask register */
#pragma ADDRESS SI03SEL				0x00800102	/* (B) SIO0-3 Interrupt Request Select register */
#pragma ADDRESS S0TCNT				0x00800110	/* (B) SIO0 Transmit Control register */
#pragma ADDRESS S0MOD				0x00800111	/* (B) SIO0 Transmit/Receive Mode register */
#pragma ADDRESS S0TXB				0x00800112	/* (H) SIO0 Transmit Buffer register */
#pragma ADDRESS S0TXB_L				0x00800113	/* (B) SIO0 Transmit Buffer register (Lower 8-bit) */
#pragma ADDRESS S0RXB				0x00800114	/* (H) SIO0 Receive Buffer register */
#pragma ADDRESS S0RXB_L				0x00800115	/* (B) SIO0 Receive Buffer register (Lower 8-bit) */
#pragma ADDRESS S0RCNT				0x00800116	/* (B) SIO0 Receive Control register */
#pragma ADDRESS S0BAUR				0x00800117	/* (B) SIO0 Baud Rate register */
#pragma ADDRESS S1TCNT				0x00800120	/* (B) SIO1 Transmit Control register */
#pragma ADDRESS S1MOD				0x00800121	/* (B) SIO1 Transmit/Receive Mode register */
#pragma ADDRESS S1TXB				0x00800122	/* (H) SIO1 Transmit Buffer register */
#pragma ADDRESS S1TXB_L				0x00800123	/* (B) SIO1 Transmit Buffer register(Lower 8-bit) */
#pragma ADDRESS S1RXB				0x00800124	/* (H) SIO1 Receive Buffer register */
#pragma ADDRESS S1RXB_L				0x00800125	/* (B) SIO1 Receive Buffer register(Lower 8-bit) */
#pragma ADDRESS S1RCNT				0x00800126	/* (B) SIO1 Receive Control register */
#pragma ADDRESS S1BAUR				0x00800127	/* (B) SIO1 Baud Rate register */
#pragma ADDRESS S2TCNT				0x00800130	/* (B) SIO2 Transmit Control register */
#pragma ADDRESS S2MOD				0x00800131	/* (B) SIO2 Transmit/Receive Mode register */
#pragma ADDRESS S2TXB				0x00800132	/* (H) SIO2 Transmit Buffer register */
#pragma ADDRESS S2TXB_L				0x00800133	/* (B) SIO2 Transmit Buffer register(Lower 8-bit) */
#pragma ADDRESS S2RXB				0x00800134	/* (H) SIO2 Receive Buffer register */
#pragma ADDRESS S2RXB_L				0x00800135	/* (B) SIO2 Receive Buffer register(Lower 8-bit) */
#pragma ADDRESS S2RCNT				0x00800136	/* (B) SIO2 Receive Control register */
#pragma ADDRESS S2BAUR				0x00800137	/* (B) SIO2 Baud Rate register */
#pragma ADDRESS S3TCNT				0x00800140	/* (B) SIO3 Transmit Control register */
#pragma ADDRESS S3MOD				0x00800141	/* (B) SIO3 Transmit/Receive Mode register */
#pragma ADDRESS S3TXB				0x00800142	/* (H) SIO3 Transmit Buffer register */
#pragma ADDRESS S3TXB_L				0x00800143	/* (B) SIO3 Transmit Buffer register(Lower 8-bit) */
#pragma ADDRESS S3RXB				0x00800144	/* (H) SIO3 Receive Buffer register */
#pragma ADDRESS S3RXB_L				0x00800145	/* (B) SIO3 Receive Buffer register(Lower 8-bit) */
#pragma ADDRESS S3RCNT				0x00800146	/* (B) SIO3 Receive Control register */
#pragma ADDRESS S3BAUR				0x00800147	/* (B) SIO3 Baud Rate register */

/* ChipSelect / Wait Control */
#pragma ADDRESS WTCCR				0x00800180	/* (B) Wait Cycles Control register */

/* MJT */
#pragma ADDRESS CKIEBCR				0x00800201	/* (B) Clock Bus & Input Event Bus Control register */
#pragma ADDRESS PRS0				0x00800202	/* (B) Prescaler register0 */
#pragma ADDRESS PRS1				0x00800203	/* (B) Prescaler register1 */
#pragma ADDRESS PRS2				0x00800204	/* (B) Prescaler register2 */
#pragma ADDRESS OEBCR				0x00800205	/* (B) Output Event Bus Control register */
#pragma ADDRESS TCLKCR				0x00800210	/* (H) TCLK Input Control register */
#pragma ADDRESS TINCR0				0x00800212	/* (H) TIN Input Control register0 */
#pragma ADDRESS TINCR1				0x00800214	/* (H) TIN Input Control register1 */
#pragma ADDRESS TINCR2				0x00800216	/* (H) TIN Input Control register2 */
#pragma ADDRESS TINCR3				0x00800218	/* (H) TIN Input Control register3 */
#pragma ADDRESS TINCR4				0x0080021A	/* (H) TIN Input Control register4 */
#pragma ADDRESS FFS0				0x00800220	/* (H) F/F Source Select register0 */
#pragma ADDRESS FFS1				0x00800223	/* (B) F/F Source Select register1 */
#pragma ADDRESS FFP0				0x00800224	/* (H) F/F Protect register0 */
#pragma ADDRESS FFD0				0x00800226	/* (H) F/F Data register0 */
#pragma ADDRESS FFP1				0x00800229	/* (B) F/F Protect register1 */
#pragma ADDRESS FFD1				0x0080022B	/* (B) F/F Data register1 */
#pragma ADDRESS TOPIR0				0x00800230	/* (B) TOP Interrupt Request Control register0 */
#pragma ADDRESS TOPIR1				0x00800231	/* (B) TOP Interrupt Request Control register1 */
#pragma ADDRESS TOPIR2				0x00800232	/* (B) TOP Interrupt Request Control register2 */
#pragma ADDRESS TOPIR3				0x00800233	/* (B) TOP Interrupt Request Control register3 */
#pragma ADDRESS TIOIR0				0x00800234	/* (B) TIO Interrupt Request Control register0 */
#pragma ADDRESS TIOIR1				0x00800235	/* (B) TIO Interrupt Request Control register1 */
#pragma ADDRESS TIOIR2				0x00800236	/* (B) TIO Interrupt Request Control register2 */