ide.h

em86xx 完整启动程序,支持网络下载与串通下载

/*****************************************
 Copyright (c) 2003-2004
 Sigma Designs, Inc. All Rights Reserved
 Proprietary and Confidential
 *****************************************/

/* This file is part of the EM86XX boot loader */

/*
 * ide.h
 *
 * IDE controller
 *
 * by Ho Lee 03/12/2003
 */

#ifndef __BOOTLOADER_IDE_H
#define __BOOTLOADER_IDE_H

//
// IDE registers descriptions
//

// IDE registers
#define IDE_DATA_OFFSET         (0)
#define IDE_ERROR_OFFSET        (1)
#define IDE_NSECTOR_OFFSET      (2)
#define IDE_SECTOR_OFFSET       (3)
#define IDE_LCYL_OFFSET         (4)
#define IDE_HCYL_OFFSET         (5)
#define IDE_SELECT_OFFSET       (6)
#define IDE_STATUS_OFFSET       (7)

extern unsigned long g_ide_reg_base;

#define IDE_DATA_REG            (g_ide_reg_base + (IDE_DATA_OFFSET << 2))
#define IDE_ERROR_REG           (g_ide_reg_base + (IDE_ERROR_OFFSET << 2))
#define IDE_NSECTOR_REG         (g_ide_reg_base + (IDE_NSECTOR_OFFSET << 2))
#define IDE_SECTOR_REG          (g_ide_reg_base + (IDE_SECTOR_OFFSET << 2))
#define IDE_LCYL_REG            (g_ide_reg_base + (IDE_LCYL_OFFSET << 2))
#define IDE_HCYL_REG            (g_ide_reg_base + (IDE_HCYL_OFFSET << 2))
#define IDE_SELECT_REG          (g_ide_reg_base + (IDE_SELECT_OFFSET << 2))
#define IDE_STATUS_REG          (g_ide_reg_base + (IDE_STATUS_OFFSET << 2))

#define IDE_FEATURE_REG         IDE_ERROR_REG
#define IDE_IREASON_REG         IDE_NSECTOR_REG
#define IDE_TAG_REG             IDE_SECTOR_REG
#define IDE_COMMAND_REG         IDE_STATUS_REG

// IDE status register
#define IDESTAT_ERROR           0x01
#define IDESTAT_INDEX           0x02
#define IDESTAT_ECC             0x04
#define IDESTAT_DRQ             0x08
#define IDESTAT_SEEK            0x10
#define IDESTAT_DSC             0x10    // immediate operation completed
#define IDESTAT_WRITEERROR      0x20
#define IDESTAT_READY           0x40
#define IDESTAT_BUSY            0x80

// IDE interrupt reason register
#define IDEIREASON_CMD          0x01    // command (1) or data (0)
#define IDEIREASON_IN           0x02    // transfer to (1) or from (0) the host
#define IDEIREASON_RELEASE      0x04    // bus released until completion

//
// ATA/ATAPI specifications
//

// sector
#define SECTOR_SIZE             512
#define CDSECTOR_SIZE           2048

// ATA/ATAPI commands
#define ATACMD_NOP              0x00
#define ATACMD_DEVICERESET      0x08
#define ATACMD_READ             0x20    // 28 bit read
#define ATACMD_READEXT          0x24    // 48 bit read
#define ATACMD_READDMAEXT       0x25    // 48 bit read by DMA
#define ATACMD_WRITE            0x30    // 28 bit write
#define ATACMD_WRITEEXT         0x34    // 48 bit write
#define ATACMD_WRITEDMAEXT      0x35    // 48 bit write by DMA
#define ATACMD_FORMAT           0x50
#define ATACMD_SEEK             0x70
#define ATACMD_DIAGNOSE         0x90
#define ATACMD_PACKET           0xa0    // packet command for ATAPI
#define ATACMD_PIDENTIFY        0xa1    // ATAPI identify
#define ATACMD_READDMA          0xc8    // 28 bit read by DMA
#define ATACMD_WRITEDMA         0xca    // 28 bit write by DMA
#define ATACMD_IDENTIFY         0xec    // ATA identify
#define ATACMD_SETFEATURES      0xef

// ATACMD_SETFEATURES sub-commands

#define SETFEATURES_TRANSFER    0x03    // set transfer mode
// Ultra DMA
#define XFER_UDMA_7	0x47	/* 0100|0111 */
#define XFER_UDMA_6	0x46	/* 0100|0110 */
#define XFER_UDMA_5	0x45	/* 0100|0101 */
#define XFER_UDMA_4	0x44	/* 0100|0100 */
#define XFER_UDMA_3	0x43	/* 0100|0011 */
#define XFER_UDMA_2	0x42	/* 0100|0010 */
#define XFER_UDMA_1	0x41	/* 0100|0001 */
#define XFER_UDMA_0	0x40	/* 0100|0000 */
// Multiword DMA
#define XFER_MW_DMA_2	0x22	/* 0010|0010 */
#define XFER_MW_DMA_1	0x21	/* 0010|0001 */
#define XFER_MW_DMA_0	0x20	/* 0010|0000 */
#define XFER_SW_DMA_2	0x12	/* 0001|0010 */
#define XFER_SW_DMA_1	0x11	/* 0001|0001 */
#define XFER_SW_DMA_0	0x10	/* 0001|0000 */
// PIO
#define XFER_PIO_4	0x0C	/* 0000|1100 */
#define XFER_PIO_3	0x0B	/* 0000|1011 */
#define XFER_PIO_2	0x0A	/* 0000|1010 */
#define XFER_PIO_1	0x09	/* 0000|1001 */
#define XFER_PIO_0	0x08	/* 0000|1000 */
#define XFER_PIO_SLOW	0x00	/* 0000|0000 */

// others
#define ATAPI_SENSEDATA_LEN     0x12

// IDENTIFY DEVICE information
// From ATA/ATAPI specification
typedef struct {
    unsigned short general_config;      // 0 : general configuration
    unsigned short cyls;
    unsigned short specific_config;     // 2 : specific configuration
    unsigned short heads;
    unsigned short retired_4, retired_5;
    unsigned short sectors;
    unsigned short reserved_7, reserved_8;
    unsigned short retired_9;
    unsigned char serial_num[20];       // 10-19 : serial number (20 ASCII characters)
    unsigned short retired_20, retired_21;
    unsigned short obsolete_22;
    unsigned char firmware_rev[8];      // 23-26 : firmware revision (8 ASCII characters)
    unsigned char model_num[40];        // 27-46 : model number (40 ASCII characters)
    unsigned short maxsect_multiple;    // 47 : maximum number of sectors on READ/WRITE MULTIPLE commands
    unsigned short reserved_48;
    unsigned short capability;          // 49 : capabiities
                                        // D8 = DMA, D9 = LBA
    unsigned short capability2;         // 50 : capabilities
    unsigned short obsolete_51, obsolete_52;
    unsigned short field_valid;         // 53 : field valid
                                        // D1 = EIDE fields valid, D2 = UDMA field valid
    unsigned short obsolete_54, obsolete_55;
    unsigned short obsolete_56, obsolete_57;
    unsigned short obsolete_58;
    unsigned short cursect_multiple;    // 59 :
    unsigned int lba_capacity;          // 60-61 : LBA number of sectors
	unsigned short dma_1word;			// 62 : Obsolete, single-word dma info */
    unsigned short dma_mword;           // 63 : Multiword DMA
                                        // D[2:0] = Multiword DMA mode supported
                                        // D[10:8] = Multiword DMA mode selected
    unsigned short pio_modes;           // 64 : PIO modes
    unsigned short mintime_dma_mword;   // 65 : minimum multiword DMA transfer cycle time per word
    unsigned short rectime_dma_mword;   // 66 : recommended multiword DMA transfer cycle time
    unsigned short mintime_pio;         // 67 : minimum PIO transfer cycle time without flow control
    unsigned short mintime_pio_iordy;   // 68 : minimum PIO transfer cycle with IORDY flow control
    unsigned short reserved_69, reserved_70;
    unsigned short reserved_71, reserved_72;
    unsigned short reserved_73, reserved_74;
    unsigned short queue_depth;         // 75 : queue depth
    unsigned short reserved_76, reserved_77;
    unsigned short reserved_78, reserved_79;
    unsigned short major_ver;           // 80 : major version number
    unsigned short minor_ver;           // 81 : minor version number
    unsigned short cmdset;              // 82 : command set supported
    unsigned short cmdset2;             // 83 : command sets supported
    unsigned short cmdset_feature;      // 84 : command set/feature supported
    unsigned short cmdset_feature_en;   // 85 : command set/feature enabled
    unsigned short cmdset_feature_en2;  // 86 : command set/feature enabled
    unsigned short cmdset_feature_def;  // 87 : command set/feature default
    unsigned short dma_ultra;           // 88 : Ultra DMA mode
                                        // D[6:0] = Ultra DMA mode supported
                                        // D[14:8] = Ultra DMA mode selected
    unsigned short time_erase_unit;     // 89 : time required for security erase unit completion
    unsigned short time_enh_erase_unit; // 90 : time required for enhanced security erase completion
    unsigned short cur_apm;             // 91 : current APM value
    unsigned short passwd_rev;          // 92 : master password revision code
    unsigned short reset_result;        // 93 : hardware reset result
    unsigned short acoustic;            // 94 : acoustic management value
    unsigned short min_stream;          // 95 : stream minimum request size
    unsigned short stream_time_dma;     // 96 : streaming transfer time - DMA
    unsigned short stream_latency;      // 97 : streaming access latency
    unsigned int stream_perf;           // 98-99 : streaming performance granularity
    unsigned long long lba_capacity_48; // 100-103 : 48-bit LBA 
    unsigned short stream_time_pio;     // 104 : streaming transfer time - PIO
    unsigned short reserved_105;
    unsigned short phy_sectors;         // 106 : physical sector size
    unsigned short seek_delay;          // 107 : inter-seek delay for ISO-7779 acoustic testing
    unsigned short naa;                 // 108 :
    unsigned short unique_id;           // 109 :
    unsigned short unique_id2;          // 110 :
    unsigned short unique_id3;          // 111 :
    unsigned short reserved_112_126[15];
    unsigned short removable_notify;    // 127 : removable media status notification feature set support
    unsigned short security_status;     // 128 : security status
    unsigned short vendor_129_159[31];
    unsigned short cfa_mode1;           // 160 : CFA power mode 1
    unsigned short reserved_161_175[15];
    unsigned short media_serial_num[30];
    unsigned short reserved_206_254[49];
    unsigned short integrity;           // 255 : integrity word
} ide_id_t;

//
// IDE information structure
//

#define MAX_DRIVES          2
#define MAX_PARTITIONS      16

typedef union {
    unsigned all : 8;
    struct {
        unsigned head : 4;              // head number
        unsigned unit : 1;              // 0/1 (master/slave)
        unsigned bit5 : 1;              // always 1
        unsigned lba : 1;               // 1 = LBA, 0 = CHS
        unsigned bit7 : 1;              // always 1
    } b;
} ide_select_t;

typedef struct {
    int valid;
    int active;
    int type;
    struct {
        unsigned int cylinder, head, sector;
    } start, end;
    unsigned int start_sector;
    unsigned int nr_sects;
} ide_partition_t;

typedef struct {
    int type;
    int cyls;
    int heads;
    int sectors;
    int lba;
    int nsectors;
    int size;
    ide_id_t id;
    ide_select_t select;
    int cap_dma, cap_udma;
    int use_dma, use_udma;
    int npart;
    ide_partition_t part[MAX_PARTITIONS];
} ide_info_t;

// IDE type
enum { IDE_NONE, IDE_ATA, IDE_ATAPI, IDE_ALL };

//
// IDE register I/O
//

static __inline__ void ide_outb(unsigned char data, unsigned int port)
{
    // uart_printf("ide_outb %08x = %02x\n", port, data);
    __raw_writew((unsigned short) data, port);
}

static __inline__ void ide_outw(unsigned short data, unsigned int port)
{
    // uart_printf("ide_outw %08x = %04x\n", port, data);
    __raw_writew((unsigned short) data, port);
}

static __inline unsigned char ide_inb(unsigned int port)
{
    unsigned char data = (unsigned char) (__raw_readw(port) & 0xff);
    // uart_printf("ide_inb %08x = %02x\n", port, data);
    return data;
}

static __inline unsigned short ide_inw(unsigned int port)
{
    unsigned short data = (unsigned short) (__raw_readw(port));
    // uart_printf("ide_inw %08x = %04x\n", port, data);
    return data;
}

//
// function prototype
//

int ide_init(void);
int ide_found(int mask);
int ide_probe(int drivemask, int verbose);

// low-level
int ide_wait_stat(int mask, int waitmask, int btimeout);
int ide_select_drive(int drive, int ready);
void ide_input_data(unsigned short *buf, unsigned int wcount);
void ide_output_data(unsigned short *buf, unsigned int wcount);

// identify
ide_info_t *ide_identify(int drive);

// other commands
int ide_set_drive_speed(int drive, int speed);

// read & write
int ide_rw_sector(int read, int dma, int drive, int cyl, int head, int sector, unsigned char *buf);
int ide_rw_block(int read, int dma, int drive, int block, unsigned char *buf, int nsector);
int ide_rw_dma_block(int read, int drive, int block, unsigned char *buf, int nsector, unsigned int *timerus);

// partition table
int ide_read_partition(int drive, ide_partition_t *ret_partinfo, int showlist);
int ide_rw_block_partition(int read, int dma, int drive, int partition, int block, unsigned char *buf, int nsector);

// image I/O
enum { IMAGE_TYPE_NONE, IMAGE_TYPE_KERNEL, IMAGE_TYPE_ROMFS };

#define IMAGE_SIGNATURE         "Sigma Designs"
#define IMAGE_ID_KERNEL         "Kernel"
#define IMAGE_ID_ROMFS          "ROMFS"
#define IMAGE_SUBPART_SIZE      0x200000
#define IMAGE_SUBPART_SECTORS   (IMAGE_SUBPART_SIZE / SECTOR_SIZE)

typedef union {
    unsigned char data[SECTOR_SIZE];
    struct {
        unsigned char dummy[16];
        unsigned char signature[16];
        unsigned char id[8];
        unsigned short major, minor;
        unsigned int len;
    } u;
} image_infoblock_t;

int ide_probe_image(int drive, int *ppart, void *pinfo);
int ide_check_image(int drive, int part, int subpart, void *pinfo);
int ide_read_image(int type, int drive, int part, int subpart, unsigned char *buf);
int ide_write_image(int type, int drive, int part, int subpart, unsigned char *buf, int len);

void ide_test(int argc, char *argv[], int drive, int part);
void ide_perf(unsigned int tblk, unsigned int sblk);
int ide_cdrom_eject(int drive, unsigned long oldkey);

#endif