atab-x86.c

It s a Linux disassemble, can set break point, disassemble ELF file.

  { I_LGS, 2, { REG16, REGMEM|BITS16, 0 }, "\x0F\xB5", 2, REGRM, { -1, -1, -1 } },
  { I_LGS, 2, { REG32, REGMEM|BITS32, 0 }, "\x0F\xB5", 2, REGRM, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_LIDT[] = {
  { I_LIDT, 1, { MEMORY|BITS32, 0, 0 }, "\x0F\x01", 2, 3, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_LLDT[] = {
  { I_LLDT, 1, { REGMEM|BITS16, 0, 0 }, "\x0F\x00", 2, 2, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_LMSW[] = {
  { I_LMSW, 1, { REGMEM|BITS16, 0, 0 }, "\x0F\x01", 2, 6, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_LOCK[] = {
  { I_LOCK, 0, { 0, 0, 0 }, "\xF0", 1, -1, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_LODSB[] = {
  { I_LODSB, 0, { 0, 0, 0 }, "\xAC", 1, -1, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_LODSD[] = {
  { I_LODSD, 0, { BITS32, 0, 0 }, "\xAD", 1, -1, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_LODSW[] = {
  { I_LODSW, 0, { 0, 0, 0 }, "\xAD", 1, -1, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_LOOP[] = {
  { I_LOOP, 1, { RELATIVE|BITS8, 0, 0 }, "\xE2", 1, -1, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_LOOPE[] = {
  { I_LOOPE, 1, { RELATIVE|BITS8, 0, 0 }, "\xE1", 1, -1, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_LOOPNE[] = {
  { I_LOOPNE, 1, { RELATIVE|BITS8, 0, 0 }, "\xE0", 1, -1, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_LSL[] = {
  { I_LSL, 2, { REG16, REGMEM|BITS16, 0 }, "\x0F\x03", 2, REGRM, { -1, -1, -1 } },
  { I_LSL, 2, { REG32, REGMEM|BITS32, 0 }, "\x0F\x03", 2, REGRM, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_LSS[] = {
  { I_LSS, 2, { REG16, REGMEM|BITS16, 0 }, "\x0F\xB2", 2, REGRM, { -1, -1, -1 } },
  { I_LSS, 2, { REG32, REGMEM|BITS32, 0 }, "\x0F\xB2", 2, REGRM, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_LTR[] = {
  { I_LTR, 1, { REGMEM|BITS16, 0, 0 }, "\x0F\x00", 2, 3, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_MOV[] = {
  { I_MOV, 2, { REGMEM|BITS8, REG8, 0 }, "\x88", 1, REGRM, { -1, -1, -1 } },
  { I_MOV, 2, { REGMEM|BITS16, REG16, 0 }, "\x89", 1, REGRM, { -1, -1, -1 } },
  { I_MOV, 2, { REGMEM|BITS32, REG32, 0 }, "\x89", 1, REGRM, { -1, -1, -1 } },
  { I_MOV, 2, { REG8, REGMEM|BITS8, 0 }, "\x8A", 1, REGRM, { -1, -1, -1 } },
  { I_MOV, 2, { REG16, REGMEM|BITS16, 0 }, "\x8B", 1, REGRM, { -1, -1, -1 } },
  { I_MOV, 2, { REG32, REGMEM|BITS32, 0 }, "\x8B", 1, REGRM, { -1, -1, -1 } },
  { I_MOV, 2, { REGMEM|BITS16, REG_SR, 0 }, "\x8C", 1, REGRM, { -1, -1, -1 } },
  { I_MOV, 2, { REG_SR, REGMEM|BITS16, 0 }, "\x8E", 1, REGRM, { -1, -1, -1 } },
  { I_MOV, 2, { REGISTER|BITS8, MEMOFFS, 0 }, "\xA0", 1, -1, { R_AL, -1, -1 } },
  { I_MOV, 2, { REGISTER|BITS16, MEMOFFS, 0 }, "\xA1", 1, -1, { R_AX, -1, -1 } },
  { I_MOV, 2, { REGISTER|BITS32, MEMOFFS, 0 }, "\xA1", 1, -1, { R_EAX, -1, -1 } },
  { I_MOV, 2, { MEMOFFS, REGISTER|BITS8, 0 }, "\xA2", 1, -1, { -1, R_AL, -1 } },
  { I_MOV, 2, { MEMOFFS, REGISTER|BITS16, 0 }, "\xA3", 1, -1, { -1, R_AX, -1 } },
  { I_MOV, 2, { MEMOFFS, REGISTER|BITS32, 0 }, "\xA3", 1, -1, { -1, R_EAX, -1 } },
  { I_MOV, 2, { REG8, IMMEDIATE|BITS8, 0 }, "\xB0", 1, REGCODE, { -1, -1, -1 } },
  { I_MOV, 2, { REG16, IMMEDIATE|BITS16, 0 }, "\xB8", 1, REGCODE, { -1, -1, -1 } },
  { I_MOV, 2, { REG32, IMMEDIATE|BITS32, 0 }, "\xB8", 1, REGCODE, { -1, -1, -1 } },
  { I_MOV, 2, { REGMEM|BITS8, IMMEDIATE|BITS8, 0 }, "\xC6", 1, 0, { -1, -1, -1 } },
  { I_MOV, 2, { REGMEM|BITS16, IMMEDIATE|BITS16, 0 }, "\xC7", 1, 0, { -1, -1, -1 } },
  { I_MOV, 2, { REGMEM|BITS32, IMMEDIATE|BITS32, 0 }, "\xC7", 1, 0, { -1, -1, -1 } },
  { I_MOV, 2, { REG_CONTROL, REG32, 0 }, "\x0F\x22", 2, REGRM, { -1, MODFIELD_RM, -1 } },
  { I_MOV, 2, { REG32, REG_CONTROL, 0 }, "\x0F\x20", 2, REGRM, { MODFIELD_RM, -1, -1 } },
  { I_MOV, 2, { REG32, REG_DEBUG, 0 }, "\x0F\x21", 2, REGRM, { MODFIELD_RM, -1, -1 } },
  { I_MOV, 2, { REG_DEBUG, REG32, 0 }, "\x0F\x23", 2, REGRM, { -1, MODFIELD_RM, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_MOVAPS[] = {
  { I_MOVAPS, 2, { REG_XMM, MEMORY|BITS128, 0 }, "\x0F\x28", 2, REGRM, { -1, -1, -1 } },
  { I_MOVAPS, 2, { MEMORY|BITS128, REG_XMM, 0 }, "\x0F\x29", 2, REGRM, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_MOVD[] = {
  { I_MOVD, 2, { REG_MMX, REGMEM|BITS32, 0 }, "\x0F\x6E", 2, REGRM, { -1, -1, -1 } },
  { I_MOVD, 2, { REGMEM|BITS32, REG_MMX, 0 }, "\x0F\x7E", 2, REGRM, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_MOVHPS[] = {
  { I_MOVHPS, 2, { REG_XMM, MEMORY|BITS64, 0 }, "\x0F\x16", 2, REGRM, { -1, -1, -1 } },
  { I_MOVHPS, 2, { MEMORY|BITS64, REG_XMM, 0 }, "\x0F\x17", 2, REGRM, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_MOVLPS[] = {
  { I_MOVLPS, 2, { REG_XMM, MEMORY|BITS64, 0 }, "\x0F\x12", 2, REGRM, { -1, -1, -1 } },
  { I_MOVLPS, 2, { MEMORY|BITS64, REG_XMM, 0 }, "\x0F\x13", 2, REGRM, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_MOVMSKPS[] = {
  { I_MOVMSKPS, 2, { REG32, REG_XMM, 0 }, "\x0F\x50", 2, REGRM, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_MOVNTPS[] = {
  { I_MOVNTPS, 2, { MEMORY, REG_XMM, 0 }, "\x0F\x2B", 2, REGRM, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_MOVNTQ[] = {
  { I_MOVNTQ, 2, { MEMORY, REG_MMX, 0 }, "\x0F\xE7", 2, REGRM, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_MOVQ[] = {
  { I_MOVQ, 2, { REG_MMX, MEMORY|BITS64, 0 }, "\x0F\x6F", 2, REGRM, { -1, -1, -1 } },
  { I_MOVQ, 2, { MEMORY|BITS64, REG_MMX, 0 }, "\x0F\x7F", 2, REGRM, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_MOVSB[] = {
  { I_MOVSB, 0, { 0, 0, 0 }, "\xA4", 1, -1, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_MOVSD[] = {
  { I_MOVSD, 0, { BITS32, 0, 0 }, "\xA5", 1, -1, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_MOVSS[] = {
  { I_MOVSS, 2, { REG_XMM, MEMORY|BITS128, 0 }, "\xF3\x0F\x10", 3, REGRM, { -1, -1, -1 } },
  { I_MOVSS, 2, { MEMORY|BITS128, REG_XMM, 0 }, "\xF3\x0F\x11", 3, REGRM, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_MOVSW[] = {
  { I_MOVSW, 0, { 0, 0, 0 }, "\xA5", 1, -1, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_MOVSX[] = {
  { I_MOVSX, 2, { REG16, REGMEM|BITS8, 0 }, "\x0F\xBE", 2, REGRM, { -1, -1, -1 } },
  { I_MOVSX, 2, { REG32, REGMEM|BITS8, 0 }, "\x0F\xBE", 2, REGRM, { -1, -1, -1 } },
  { I_MOVSX, 2, { REG32, REGMEM|BITS16, 0 }, "\x0F\xBF", 2, REGRM, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_MOVUPS[] = {
  { I_MOVUPS, 2, { REG_XMM, MEMORY|BITS128, 0 }, "\x0F\x10", 2, REGRM, { -1, -1, -1 } },
  { I_MOVUPS, 2, { MEMORY|BITS128, REG_XMM, 0 }, "\x0F\x11", 2, REGRM, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_MOVZX[] = {
  { I_MOVZX, 2, { REG16, REGMEM|BITS8, 0 }, "\x0F\xB6", 2, REGRM, { -1, -1, -1 } },
  { I_MOVZX, 2, { REG32, REGMEM|BITS8, 0 }, "\x0F\xB6", 2, REGRM, { -1, -1, -1 } },
  { I_MOVZX, 2, { REG32, REGMEM|BITS16, 0 }, "\x0F\xB7", 2, REGRM, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_MUL[] = {
  { I_MUL, 1, { REGMEM|BITS8, 0, 0 }, "\xF6", 1, 4, { -1, -1, -1 } },
  { I_MUL, 1, { REGMEM|BITS16, 0, 0 }, "\xF7", 1, 4, { -1, -1, -1 } },
  { I_MUL, 1, { REGMEM|BITS32, 0, 0 }, "\xF7", 1, 4, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_MULPS[] = {
  { I_MULPS, 2, { REG_XMM, MEMORY|BITS128, 0 }, "\x0F\x59", 2, REGRM, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_MULSS[] = {
  { I_MULSS, 2, { REG_XMM, MEMORY|BITS128, 0 }, "\xF3\x0F\x59", 3, REGRM, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_NEG[] = {
  { I_NEG, 1, { REGMEM|BITS8, 0, 0 }, "\xF6", 1, 3, { -1, -1, -1 } },
  { I_NEG, 1, { REGMEM|BITS16, 0, 0 }, "\xF7", 1, 3, { -1, -1, -1 } },
  { I_NEG, 1, { REGMEM|BITS32, 0, 0 }, "\xF7", 1, 3, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_NOP[] = {
  { I_NOP, 0, { 0, 0, 0 }, "\x90", 1, -1, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_NOT[] = {
  { I_NOT, 1, { REGMEM|BITS8, 0, 0 }, "\xF6", 1, 2, { -1, -1, -1 } },
  { I_NOT, 1, { REGMEM|BITS16, 0, 0 }, "\xF7", 1, 2, { -1, -1, -1 } },
  { I_NOT, 1, { REGMEM|BITS32, 0, 0 }, "\xF7", 1, 2, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_OR[] = {
  { I_OR, 2, { REGISTER|BITS8, IMMEDIATE|BITS8, 0 }, "\x0C", 1, -1, { R_AL, -1, -1 } },
  { I_OR, 2, { REGISTER|BITS16, IMMEDIATE|BITS16, 0 }, "\x0D", 1, -1, { R_AX, -1, -1 } },
  { I_OR, 2, { REGISTER|BITS32, IMMEDIATE|BITS32, 0 }, "\x0D", 1, -1, { R_EAX, -1, -1 } },
  { I_OR, 2, { REGMEM|BITS8, IMMEDIATE|BITS8, 0 }, "\x80", 1, 1, { -1, -1, -1 } },
  { I_OR, 2, { REGMEM|BITS16, IMMEDIATE|BITS16, 0 }, "\x81", 1, 1, { -1, -1, -1 } },
  { I_OR, 2, { REGMEM|BITS32, IMMEDIATE|BITS32, 0 }, "\x81", 1, 1, { -1, -1, -1 } },
  { I_OR, 2, { REGMEM|BITS16, IMMEDIATE|BITS8, 0 }, "\x83", 1, 1, { -1, -1, -1 } },
  { I_OR, 2, { REGMEM|BITS32, IMMEDIATE|BITS8, 0 }, "\x83", 1, 1, { -1, -1, -1 } },
  { I_OR, 2, { REGMEM|BITS8, REG8, 0 }, "\x08", 1, REGRM, { -1, -1, -1 } },
  { I_OR, 2, { REGMEM|BITS16, REG16, 0 }, "\x09", 1, REGRM, { -1, -1, -1 } },
  { I_OR, 2, { REGMEM|BITS32, REG32, 0 }, "\x09", 1, REGRM, { -1, -1, -1 } },
  { I_OR, 2, { REG8, REGMEM|BITS8, 0 }, "\x0A", 1, REGRM, { -1, -1, -1 } },
  { I_OR, 2, { REG16, REGMEM|BITS16, 0 }, "\x0B", 1, REGRM, { -1, -1, -1 } },
  { I_OR, 2, { REG32, REGMEM|BITS32, 0 }, "\x0B", 1, REGRM, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_ORPS[] = {
  { I_ORPS, 2, { REG_XMM, MEMORY|BITS128, 0 }, "\x0F\x56", 2, REGRM, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_OUT[] = {
  { I_OUT, 2, { IMMEDIATE|BITS8, REGISTER|BITS8, 0 }, "\xE6", 1, -1, { -1, R_AL, -1 } },
  { I_OUT, 2, { IMMEDIATE|BITS8, REGISTER|BITS16, 0 }, "\xE7", 1, -1, { -1, R_AX, -1 } },
  { I_OUT, 2, { IMMEDIATE|BITS8, REGISTER|BITS32, 0 }, "\xE7", 1, -1, { -1, R_EAX, -1 } },
  { I_OUT, 2, { REGISTER|BITS16, REGISTER|BITS8, 0 }, "\xEE", 1, -1, { R_DX, R_AL, -1 } },
  { I_OUT, 2, { REGISTER|BITS16, REGISTER|BITS16, 0 }, "\xEF", 1, -1, { R_DX, R_AX, -1 } },
  { I_OUT, 2, { REGISTER|BITS16, REGISTER|BITS32, 0 }, "\xEF", 1, -1, { R_DX, R_EAX, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_OUTSB[] = {
  { I_OUTSB, 0, { 0, 0, 0 }, "\x6E", 1, -1, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_OUTSD[] = {
  { I_OUTSD, 0, { BITS32, 0, 0 }, "\x6F", 1, -1, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_OUTSW[] = {
  { I_OUTSW, 0, { 0, 0, 0 }, "\x6F", 1, -1, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_PACKSSDW[] = {
  { I_PACKSSDW, 2, { REG_MMX, MEMORY|BITS64, 0 }, "\x0F\x6B", 2, REGRM, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_PACKSSWB[] = {
  { I_PACKSSWB, 2, { REG_MMX, MEMORY|BITS64, 0 }, "\x0F\x63", 2, REGRM, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_PACKUSWB[] = {
  { I_PACKUSWB, 2, { REG_MMX, MEMORY|BITS64, 0 }, "\x0F\x67", 2, REGRM, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_PADDB[] = {
  { I_P