atab-x86.c

It s a Linux disassemble, can set break point, disassemble ELF file.

  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_CMP[] = {
  { I_CMP, 2, { REGISTER|BITS8, IMMEDIATE|BITS8, 0 }, "\x3C", 1, -1, { R_AL, -1, -1 } },
  { I_CMP, 2, { REGISTER|BITS16, IMMEDIATE|BITS16, 0 }, "\x3D", 1, -1, { R_AX, -1, -1 } },
  { I_CMP, 2, { REGISTER|BITS32, IMMEDIATE|BITS32, 0 }, "\x3D", 1, -1, { R_EAX, -1, -1 } },
  { I_CMP, 2, { REGMEM|BITS8, IMMEDIATE|BITS8, 0 }, "\x80", 1, 7, { -1, -1, -1 } },
  { I_CMP, 2, { REGMEM|BITS16, IMMEDIATE|BITS16, 0 }, "\x81", 1, 7, { -1, -1, -1 } },
  { I_CMP, 2, { REGMEM|BITS32, IMMEDIATE|BITS32, 0 }, "\x81", 1, 7, { -1, -1, -1 } },
  { I_CMP, 2, { REGMEM|BITS16, IMMEDIATE|BITS8, 0 }, "\x83", 1, 7, { -1, -1, -1 } },
  { I_CMP, 2, { REGMEM|BITS32, IMMEDIATE|BITS8, 0 }, "\x83", 1, 7, { -1, -1, -1 } },
  { I_CMP, 2, { REGMEM|BITS8, REG8, 0 }, "\x38", 1, REGRM, { -1, -1, -1 } },
  { I_CMP, 2, { REGMEM|BITS16, REG16, 0 }, "\x39", 1, REGRM, { -1, -1, -1 } },
  { I_CMP, 2, { REGMEM|BITS32, REG32, 0 }, "\x39", 1, REGRM, { -1, -1, -1 } },
  { I_CMP, 2, { REG8, REGMEM|BITS8, 0 }, "\x3A", 1, REGRM, { -1, -1, -1 } },
  { I_CMP, 2, { REG16, REGMEM|BITS16, 0 }, "\x3B", 1, REGRM, { -1, -1, -1 } },
  { I_CMP, 2, { REG32, REGMEM|BITS32, 0 }, "\x3B", 1, REGRM, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_CMPSB[] = {
  { I_CMPSB, 0, { 0, 0, 0 }, "\xA6", 1, -1, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_CMPSD[] = {
  { I_CMPSD, 0, { BITS32, 0, 0 }, "\xA7", 1, -1, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_CMPSW[] = {
  { I_CMPSW, 0, { 0, 0, 0 }, "\xA7", 1, -1, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_CMPXCHG[] = {
  { I_CMPXCHG, 2, { REGMEM|BITS8, REG8, 0 }, "\x0F\xB0", 2, REGRM, { -1, -1, -1 } },
  { I_CMPXCHG, 2, { REGMEM|BITS16, REG16, 0 }, "\x0F\xB1", 2, REGRM, { -1, -1, -1 } },
  { I_CMPXCHG, 2, { REGMEM|BITS32, REG32, 0 }, "\x0F\xB1", 2, REGRM, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_CMPXCHG8B[] = {
  { I_CMPXCHG8B, 1, { MEMORY|BITS64, 0, 0 }, "\x0F\xC7", 2, 1, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_CPUID[] = {
  { I_CPUID, 0, { 0, 0, 0 }, "\x0F\xA2", 2, -1, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_CWD[] = {
  { I_CWD, 0, { 0, 0, 0 }, "\x99", 1, -1, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_CWDE[] = {
  { I_CWDE, 0, { BITS32, 0, 0 }, "\x98", 1, -1, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_DAA[] = {
  { I_DAA, 0, { 0, 0, 0 }, "\x27", 1, -1, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_DAS[] = {
  { I_DAS, 0, { 0, 0, 0 }, "\x2F", 1, -1, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_DEC[] = {
  { I_DEC, 1, { REGMEM|BITS8, 0, 0 }, "\xFE", 1, 1, { -1, -1, -1 } },
  { I_DEC, 1, { REGMEM|BITS16, 0, 0 }, "\xFF", 1, 1, { -1, -1, -1 } },
  { I_DEC, 1, { REGMEM|BITS32, 0, 0 }, "\xFF", 1, 1, { -1, -1, -1 } },
  { I_DEC, 1, { REG16, 0, 0 }, "\x48", 1, REGCODE, { -1, -1, -1 } },
  { I_DEC, 1, { REG32, 0, 0 }, "\x48", 1, REGCODE, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_DIV[] = {
  { I_DIV, 1, { REGMEM|BITS8, 0, 0 }, "\xF6", 1, 6, { -1, -1, -1 } },
  { I_DIV, 1, { REGMEM|BITS16, 0, 0 }, "\xF7", 1, 6, { -1, -1, -1 } },
  { I_DIV, 1, { REGMEM|BITS32, 0, 0 }, "\xF7", 1, 6, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_EMMS[] = {
  { I_EMMS, 0, { 0, 0, 0 }, "\x0F\x77", 2, -1, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_ENTER[] = {
  { I_ENTER, 2, { IMMEDIATE|BITS16, IMMEDIATE|BITS8, 0 }, "\xC8", 1, -1, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_F2XM1[] = {
  { I_F2XM1, 0, { 0, 0, 0 }, "\xD9\xF0", 2, -1, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FABS[] = {
  { I_FABS, 0, { 0, 0, 0 }, "\xD9\xE1", 2, -1, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FADD[] = {
  { I_FADD, 2, { REGISTER, MEMORY|BITS32, 0 }, "\xD8", 1, 0, { R_ST0, -1, -1 } },
  { I_FADD, 2, { REGISTER, MEMORY|BITS64, 0 }, "\xDC", 1, 0, { R_ST0, -1, -1 } },
  { I_FADD, 2, { REGISTER, REG_FPU, 0 }, "\xD8\xC0", 2, FPUCODE, { R_ST0, -1, -1 } },
  { I_FADD, 2, { REG_FPU, REGISTER, 0 }, "\xDC\xC0", 2, FPUCODE, { -1, R_ST0, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FADDP[] = {
  { I_FADDP, 2, { REG_FPU, REGISTER, 0 }, "\xDE\xC0", 2, FPUCODE, { -1, R_ST0, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FBLD[] = {
  { I_FBLD, 2, { REGISTER, MEMORY|BITS80, 0 }, "\xDF", 1, 4, { R_ST0, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FBSTP[] = {
  { I_FBSTP, 2, { MEMORY|BITS80, REGISTER, 0 }, "\xDF", 1, 6, { -1, R_ST0, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FCHS[] = {
  { I_FCHS, 1, { REGISTER, 0, 0 }, "\xD9\xE0", 2, -1, { R_ST0, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FCLEX[] = {
  { I_FCLEX, 0, { 0, 0, 0 }, "\x9B\xDB\xE2", 3, -1, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FCMOVB[] = {
  { I_FCMOVB, 2, { REGISTER, REG_FPU, 0 }, "\xDA\xC0", 2, FPUCODE, { R_ST0, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FCMOVBE[] = {
  { I_FCMOVBE, 2, { REGISTER, REG_FPU, 0 }, "\xDA\xD0", 2, FPUCODE, { R_ST0, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FCMOVE[] = {
  { I_FCMOVE, 2, { REGISTER, REG_FPU, 0 }, "\xDA\xC8", 2, FPUCODE, { R_ST0, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FCMOVNB[] = {
  { I_FCMOVNB, 2, { REGISTER, REG_FPU, 0 }, "\xDB\xC0", 2, FPUCODE, { R_ST0, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FCMOVNBE[] = {
  { I_FCMOVNBE, 2, { REGISTER, REG_FPU, 0 }, "\xDB\xD0", 2, FPUCODE, { R_ST0, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FCMOVNE[] = {
  { I_FCMOVNE, 2, { REGISTER, REG_FPU, 0 }, "\xDB\xC8", 2, FPUCODE, { R_ST0, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FCMOVNU[] = {
  { I_FCMOVNU, 2, { REGISTER, REG_FPU, 0 }, "\xDB\xD8", 2, FPUCODE, { R_ST0, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FCMOVU[] = {
  { I_FCMOVU, 2, { REGISTER, REG_FPU, 0 }, "\xDA\xD8", 2, FPUCODE, { R_ST0, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FCOM[] = {
  { I_FCOM, 2, { REGISTER, MEMORY|BITS32, 0 }, "\xD8", 1, 2, { R_ST0, -1, -1 } },
  { I_FCOM, 2, { REGISTER, MEMORY|BITS64, 0 }, "\xDC", 1, 2, { R_ST0, -1, -1 } },
  { I_FCOM, 2, { REGISTER, REG_FPU, 0 }, "\xD8\xD0", 2, FPUCODE, { R_ST0, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FCOMI[] = {
  { I_FCOMI, 2, { REGISTER, REG_FPU, 0 }, "\xDB\xF0", 2, FPUCODE, { R_ST0, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FCOMIP[] = {
  { I_FCOMIP, 2, { REGISTER, REG_FPU, 0 }, "\xDF\xF0", 2, FPUCODE, { R_ST0, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FCOMP[] = {
  { I_FCOMP, 2, { REGISTER, MEMORY|BITS32, 0 }, "\xD8", 1, 3, { R_ST0, -1, -1 } },
  { I_FCOMP, 2, { REGISTER, MEMORY|BITS64, 0 }, "\xDC", 1, 3, { R_ST0, -1, -1 } },
  { I_FCOMP, 2, { REGISTER, REG_FPU, 0 }, "\xD8\xD8", 2, FPUCODE, { R_ST0, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FCOMPP[] = {
  { I_FCOMPP, 2, { REGISTER, REGISTER, 0 }, "\xDE\xD9", 2, -1, { R_ST1, R_ST0, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FCOS[] = {
  { I_FCOS, 1, { REGISTER, 0, 0 }, "\xD9\xFF", 2, -1, { R_ST0, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FDECSTP[] = {
  { I_FDECSTP, 0, { 0, 0, 0 }, "\xD9\xF6", 2, -1, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FDIV[] = {
  { I_FDIV, 2, { REGISTER, MEMORY|BITS32, 0 }, "\xD8", 1, 6, { R_ST0, -1, -1 } },
  { I_FDIV, 2, { REGISTER, MEMORY|BITS64, 0 }, "\xDC", 1, 6, { R_ST0, -1, -1 } },
  { I_FDIV, 2, { REGISTER, REG_FPU, 0 }, "\xD8\xF0", 2, FPUCODE, { R_ST0, -1, -1 } },
  { I_FDIV, 2, { REG_FPU, REGISTER, 0 }, "\xDC\xF8", 2, FPUCODE, { -1, R_ST0, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FDIVP[] = {
  { I_FDIVP, 2, { REG_FPU, REGISTER, 0 }, "\xDE\xF8", 2, FPUCODE, { -1, R_ST0, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FDIVR[] = {
  { I_FDIVR, 2, { REGISTER, MEMORY|BITS32, 0 }, "\xD8", 1, 7, { R_ST0, -1, -1 } },
  { I_FDIVR, 2, { REGISTER, MEMORY|BITS64, 0 }, "\xDC", 1, 7, { R_ST0, -1, -1 } },
  { I_FDIVR, 2, { REGISTER, REG_FPU, 0 }, "\xD8\xF8", 2, FPUCODE, { R_ST0, -1, -1 } },
  { I_FDIVR, 2, { REG_FPU, REGISTER, 0 }, "\xDC\xF0", 2, FPUCODE, { -1, R_ST0, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FDIVRP[] = {
  { I_FDIVRP, 2, { REG_FPU, REGISTER, 0 }, "\xDE\xF0", 2, FPUCODE, { -1, R_ST0, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FFREE[] = {
  { I_FFREE, 1, { REG_FPU, 0, 0 }, "\xDD\xC0", 2, FPUCODE, { -1, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FIADD[] = {
  { I_FIADD, 2, { REGISTER, MEMORY|BITS32, 0 }, "\xDA", 1, 0, { R_ST0, -1, -1 } },
  { I_FIADD, 2, { REGISTER, MEMORY|BITS16, 0 }, "\xDE", 1, 0, { R_ST0, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FICOM[] = {
  { I_FICOM, 2, { REGISTER, MEMORY|BITS16, 0 }, "\xDE", 1, 2, { R_ST0, -1, -1 } },
  { I_FICOM, 2, { REGISTER, MEMORY|BITS32, 0 }, "\xDA", 1, 2, { R_ST0, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FICOMP[] = {
  { I_FICOMP, 2, { REGISTER, MEMORY|BITS16, 0 }, "\xDE", 1, 3, { R_ST0, -1, -1 } },
  { I_FICOMP, 2, { REGISTER, MEMORY|BITS32, 0 }, "\xDA", 1, 3, { R_ST0, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FIDIV[] = {
  { I_FIDIV, 2, { REGISTER, MEMORY|BITS32, 0 }, "\xDA", 1, 6, { R_ST0, -1, -1 } },
  { I_FIDIV, 2, { REGISTER, MEMORY|BITS16, 0 }, "\xDE", 1, 6, { R_ST0, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FIDIVR[] = {
  { I_FIDIVR, 2, { REGISTER, MEMORY|BITS32, 0 }, "\xDA", 1, 7, { R_ST0, -1, -1 } },
  { I_FIDIVR, 2, { REGISTER, MEMORY|BITS16, 0 }, "\xDE", 1, 7, { R_ST0, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FILD[] = {
  { I_FILD, 2, { REGISTER, MEMORY|BITS16, 0 }, "\xDF", 1, 0, { R_ST0, -1, -1 } },
  { I_FILD, 2, { REGISTER, MEMORY|BITS32, 0 }, "\xDB", 1, 0, { R_ST0, -1, -1 } },
  { I_FILD, 2, { REGISTER, MEMORY|BITS64, 0 }, "\xDF", 1, 5, { R_ST0, -1, -1 } },
  { -1, -1, { -1, -1, -1 }, 0, -1, -1, { -1, -1, -1 } }
};

static struct x86OpCode Instruction_FIMUL[] = {