dtab-x86.c

It s a Linux disassemble, can set break point, disassemble ELF file.

  { I_FCMOVNU, 2, { REGISTER, REG_FPU, 0 }, "\xDB\xD8", 2, FPUCODE, { R_ST0, -1, -1 } },
  { I_FCMOVU, 2, { REGISTER, REG_FPU, 0 }, "\xDA\xD8", 2, FPUCODE, { R_ST0, -1, -1 } },
  { I_FCOM, 2, { REGISTER, MEMORY|BITS32, 0 }, "\xD8", 1, 2, { R_ST0, -1, -1 } },
  { I_FCOM, 2, { REGISTER, MEMORY|BITS64, 0 }, "\xDC", 1, 2, { R_ST0, -1, -1 } },
  { I_FCOM, 2, { REGISTER, REG_FPU, 0 }, "\xD8\xD0", 2, FPUCODE, { R_ST0, -1, -1 } },
  { I_FCOMI, 2, { REGISTER, REG_FPU, 0 }, "\xDB\xF0", 2, FPUCODE, { R_ST0, -1, -1 } },
  { I_FCOMIP, 2, { REGISTER, REG_FPU, 0 }, "\xDF\xF0", 2, FPUCODE, { R_ST0, -1, -1 } },
  { I_FCOMP, 2, { REGISTER, MEMORY|BITS32, 0 }, "\xD8", 1, 3, { R_ST0, -1, -1 } },
  { I_FCOMP, 2, { REGISTER, MEMORY|BITS64, 0 }, "\xDC", 1, 3, { R_ST0, -1, -1 } },
  { I_FCOMP, 2, { REGISTER, REG_FPU, 0 }, "\xD8\xD8", 2, FPUCODE, { R_ST0, -1, -1 } },
  { I_FCOMPP, 2, { REGISTER, REGISTER, 0 }, "\xDE\xD9", 2, -1, { R_ST1, R_ST0, -1 } },
  { I_FCOS, 1, { REGISTER, 0, 0 }, "\xD9\xFF", 2, -1, { R_ST0, -1, -1 } },
  { I_FDECSTP, 0, { 0, 0, 0 }, "\xD9\xF6", 2, -1, { -1, -1, -1 } },
  { I_FDIV, 2, { REGISTER, MEMORY|BITS32, 0 }, "\xD8", 1, 6, { R_ST0, -1, -1 } },
  { I_FDIV, 2, { REGISTER, MEMORY|BITS64, 0 }, "\xDC", 1, 6, { R_ST0, -1, -1 } },
  { I_FDIV, 2, { REGISTER, REG_FPU, 0 }, "\xD8\xF0", 2, FPUCODE, { R_ST0, -1, -1 } },
  { I_FDIV, 2, { REG_FPU, REGISTER, 0 }, "\xDC\xF8", 2, FPUCODE, { -1, R_ST0, -1 } },
  { I_FDIVP, 2, { REG_FPU, REGISTER, 0 }, "\xDE\xF8", 2, FPUCODE, { -1, R_ST0, -1 } },
  { I_FDIVR, 2, { REGISTER, MEMORY|BITS32, 0 }, "\xD8", 1, 7, { R_ST0, -1, -1 } },
  { I_FDIVR, 2, { REGISTER, MEMORY|BITS64, 0 }, "\xDC", 1, 7, { R_ST0, -1, -1 } },
  { I_FDIVR, 2, { REGISTER, REG_FPU, 0 }, "\xD8\xF8", 2, FPUCODE, { R_ST0, -1, -1 } },
  { I_FDIVR, 2, { REG_FPU, REGISTER, 0 }, "\xDC\xF0", 2, FPUCODE, { -1, R_ST0, -1 } },
  { I_FDIVRP, 2, { REG_FPU, REGISTER, 0 }, "\xDE\xF0", 2, FPUCODE, { -1, R_ST0, -1 } },
  { I_FFREE, 1, { REG_FPU, 0, 0 }, "\xDD\xC0", 2, FPUCODE, { -1, -1, -1 } },
  { I_FIADD, 2, { REGISTER, MEMORY|BITS32, 0 }, "\xDA", 1, 0, { R_ST0, -1, -1 } },
  { I_FIADD, 2, { REGISTER, MEMORY|BITS16, 0 }, "\xDE", 1, 0, { R_ST0, -1, -1 } },
  { I_FICOM, 2, { REGISTER, MEMORY|BITS16, 0 }, "\xDE", 1, 2, { R_ST0, -1, -1 } },
  { I_FICOM, 2, { REGISTER, MEMORY|BITS32, 0 }, "\xDA", 1, 2, { R_ST0, -1, -1 } },
  { I_FICOMP, 2, { REGISTER, MEMORY|BITS16, 0 }, "\xDE", 1, 3, { R_ST0, -1, -1 } },
  { I_FICOMP, 2, { REGISTER, MEMORY|BITS32, 0 }, "\xDA", 1, 3, { R_ST0, -1, -1 } },
  { I_FIDIV, 2, { REGISTER, MEMORY|BITS32, 0 }, "\xDA", 1, 6, { R_ST0, -1, -1 } },
  { I_FIDIV, 2, { REGISTER, MEMORY|BITS16, 0 }, "\xDE", 1, 6, { R_ST0, -1, -1 } },
  { I_FIDIVR, 2, { REGISTER, MEMORY|BITS32, 0 }, "\xDA", 1, 7, { R_ST0, -1, -1 } },
  { I_FIDIVR, 2, { REGISTER, MEMORY|BITS16, 0 }, "\xDE", 1, 7, { R_ST0, -1, -1 } },
  { I_FILD, 2, { REGISTER, MEMORY|BITS16, 0 }, "\xDF", 1, 0, { R_ST0, -1, -1 } },
  { I_FILD, 2, { REGISTER, MEMORY|BITS32, 0 }, "\xDB", 1, 0, { R_ST0, -1, -1 } },
  { I_FILD, 2, { REGISTER, MEMORY|BITS64, 0 }, "\xDF", 1, 5, { R_ST0, -1, -1 } },
  { I_FIMUL, 2, { REGISTER, MEMORY|BITS32, 0 }, "\xDA", 1, 1, { R_ST0, -1, -1 } },
  { I_FIMUL, 2, { REGISTER, MEMORY|BITS16, 0 }, "\xDE", 1, 1, { R_ST0, -1, -1 } },
  { I_FINCSTP, 0, { 0, 0, 0 }, "\xD9\xF7", 2, -1, { -1, -1, -1 } },
  { I_FINIT, 0, { 0, 0, 0 }, "\x9B\xDB\xE3", 3, -1, { -1, -1, -1 } },
  { I_FIST, 2, { MEMORY|BITS16, REGISTER, 0 }, "\xDF", 1, 2, { -1, R_ST0, -1 } },
  { I_FIST, 2, { MEMORY|BITS32, REGISTER, 0 }, "\xDB", 1, 2, { -1, R_ST0, -1 } },
  { I_FISTP, 2, { MEMORY|BITS16, REGISTER, 0 }, "\xDF", 1, 3, { -1, R_ST0, -1 } },
  { I_FISTP, 2, { MEMORY|BITS32, REGISTER, 0 }, "\xDB", 1, 3, { -1, R_ST0, -1 } },
  { I_FISTP, 2, { MEMORY|BITS64, REGISTER, 0 }, "\xDF", 1, 7, { -1, R_ST0, -1 } },
  { I_FISUB, 2, { REGISTER, MEMORY|BITS32, 0 }, "\xDA", 1, 4, { R_ST0, -1, -1 } },
  { I_FISUB, 2, { REGISTER, MEMORY|BITS16, 0 }, "\xDE", 1, 4, { R_ST0, -1, -1 } },
  { I_FISUBR, 2, { REGISTER, MEMORY|BITS32, 0 }, "\xDA", 1, 5, { R_ST0, -1, -1 } },
  { I_FISUBR, 2, { REGISTER, MEMORY|BITS16, 0 }, "\xDE", 1, 5, { R_ST0, -1, -1 } },
  { I_FLD, 2, { REGISTER, MEMORY|BITS32, 0 }, "\xD9", 1, 0, { R_ST0, -1, -1 } },
  { I_FLD, 2, { REGISTER, MEMORY|BITS64, 0 }, "\xDD", 1, 0, { R_ST0, -1, -1 } },
  { I_FLD, 2, { REGISTER, MEMORY|BITS80, 0 }, "\xDB", 1, 5, { R_ST0, -1, -1 } },
  { I_FLD, 1, { REG_FPU, 0, 0 }, "\xD9\xC0", 2, FPUCODE, { -1, -1, -1 } },
  { I_FLD1, 1, { REGISTER, 0, 0 }, "\xD9\xE8", 2, -1, { R_ST0, -1, -1 } },
  { I_FLDCW, 1, { REGMEM, 0, 0 }, "\xD9", 1, 5, { -1, -1, -1 } },
  { I_FLDENV, 1, { REGMEM, 0, 0 }, "\xD9", 1, 4, { -1, -1, -1 } },
  { I_FLDL2E, 1, { REGISTER, 0, 0 }, "\xD9\xEA", 2, -1, { R_ST0, -1, -1 } },
  { I_FLDL2T, 1, { REGISTER, 0, 0 }, "\xD9\xE9", 2, -1, { R_ST0, -1, -1 } },
  { I_FLDLG2, 1, { REGISTER, 0, 0 }, "\xD9\xEC", 2, -1, { R_ST0, -1, -1 } },
  { I_FLDLN2, 1, { REGISTER, 0, 0 }, "\xD9\xED", 2, -1, { R_ST0, -1, -1 } },
  { I_FLDPI, 1, { REGISTER, 0, 0 }, "\xD9\xEB", 2, -1, { R_ST0, -1, -1 } },
  { I_FLDZ, 1, { REGISTER, 0, 0 }, "\xD9\xEE", 2, -1, { R_ST0, -1, -1 } },
  { I_FMUL, 2, { REGISTER, MEMORY|BITS32, 0 }, "\xD8", 1, 1, { R_ST0, -1, -1 } },
  { I_FMUL, 2, { REGISTER, MEMORY|BITS64, 0 }, "\xDC", 1, 1, { R_ST0, -1, -1 } },
  { I_FMUL, 2, { REGISTER, REG_FPU, 0 }, "\xD8\xC8", 2, FPUCODE, { R_ST0, -1, -1 } },
  { I_FMUL, 2, { REG_FPU, REGISTER, 0 }, "\xDC\xC8", 2, FPUCODE, { -1, R_ST0, -1 } },
  { I_FMULP, 2, { REG_FPU, REGISTER, 0 }, "\xDE\xC8", 2, FPUCODE, { -1, R_ST0, -1 } },
  { I_FNCLEX, 0, { 0, 0, 0 }, "\xDB\xE2", 2, -1, { -1, -1, -1 } },
  { I_FNINIT, 0, { 0, 0, 0 }, "\xDB\xE3", 2, -1, { -1, -1, -1 } },
  { I_FNOP, 0, { 0, 0, 0 }, "\xD9\xD0", 2, -1, { -1, -1, -1 } },
  { I_FNSAVE, 2, { REGISTER, MEMORY, 0 }, "\xDD", 1, 6, { R_ST0, -1, -1 } },
  { I_FNSTCW, 1, { MEMORY, 0, 0 }, "\xD9", 1, 7, { -1, -1, -1 } },
  { I_FNSTENV, 1, { MEMORY, 0, 0 }, "\xD9", 1, 6, { -1, -1, -1 } },
  { I_FNSTSW, 1, { MEMORY|BITS16, 0, 0 }, "\xDD", 1, 7, { -1, -1, -1 } },
  { I_FNSTSW, 1, { REGISTER|BITS16, 0, 0 }, "\xDF\xE0", 2, -1, { R_AX, -1, -1 } },
  { I_FPATAN, 1, { REGISTER, 0, 0 }, "\xD9\xF3", 2, -1, { R_ST0, -1, -1 } },
  { I_FPREM, 1, { REGISTER, 0, 0 }, "\xD9\xF8", 2, -1, { R_ST0, -1, -1 } },
  { I_FPREM1, 1, { REGISTER, 0, 0 }, "\xD9\xF5", 2, -1, { R_ST0, -1, -1 } },
  { I_FPTAN, 1, { REGISTER, 0, 0 }, "\xD9\xF2", 2, -1, { R_ST0, -1, -1 } },
  { I_FRNDINT, 1, { REGISTER, 0, 0 }, "\xD9\xFC", 2, -1, { R_ST0, -1, -1 } },
  { I_FRSTOR, 2, { REGISTER, MEMORY, 0 }, "\xDD", 1, 4, { R_ST0, -1, -1 } },
  { I_FSAVE, 2, { REGISTER, MEMORY, 0 }, "\x9B\xDD", 2, 6, { R_ST0, -1, -1 } },
  { I_FSCALE, 1, { REGISTER, 0, 0 }, "\xD9\xFD", 2, -1, { R_ST0, -1, -1 } },
  { I_FSIN, 1, { REGISTER, 0, 0 }, "\xD9\xFE", 2, -1, { R_ST0, -1, -1 } },
  { I_FSINCOS, 1, { REGISTER, 0, 0 }, "\xD9\xFB", 2, -1, { R_ST0, -1, -1 } },
  { I_FSQRT, 1, { REGISTER, 0, 0 }, "\xD9\xFA", 2, -1, { R_ST0, -1, -1 } },
  { I_FST, 2, { MEMORY|BITS32, REGISTER, 0 }, "\xD9", 1, 2, { -1, R_ST0, -1 } },
  { I_FST, 2, { MEMORY|BITS64, REGISTER, 0 }, "\xDD", 1, 2, { -1, R_ST0, -1 } },
  { I_FST, 2, { REG_FPU, REGISTER, 0 }, "\xDD\xD0", 2, FPUCODE, { -1, R_ST0, -1 } },
  { I_FSTCW, 1, { MEMORY, 0, 0 }, "\x9B\xD9", 2, 7, { -1, -1, -1 } },
  { I_FSTENV, 1, { MEMORY, 0, 0 }, "\x9B\xD9", 2, 6, { -1, -1, -1 } },
  { I_FSTP, 2, { MEMORY|BITS32, REGISTER, 0 }, "\xD9", 1, 3, { -1, R_ST0, -1 } },
  { I_FSTP, 2, { MEMORY|BITS64, REGISTER, 0 }, "\xDD", 1, 3, { -1, R_ST0, -1 } },
  { I_FSTP, 2, { MEMORY|BITS80, REGISTER, 0 }, "\xDB", 1, 7, { -1, R_ST0, -1 } },
  { I_FSTP, 2, { REG_FPU, REGISTER, 0 }, "\xDD\xD8", 2, FPUCODE, { -1, R_ST0, -1 } },
  { I_FSTSW, 1, { MEMORY, 0, 0 }, "\x9B\xDD", 2, 7, { -1, -1, -1 } },
  { I_FSTSW, 1, { REGISTER|BITS16, 0, 0 }, "\x9B\xDF\xE0", 3, -1, { R_AX, -1, -1 } },
  { I_FSUB, 2, { REGISTER, MEMORY|BITS32, 0 }, "\xD8", 1, 4, { R_ST0, -1, -1 } },
  { I_FSUB, 2, { REGISTER, MEMORY|BITS64, 0 }, "\xDC", 1, 4, { R_ST0, -1, -1 } },
  { I_FSUB, 2, { REGISTER, REG_FPU, 0 }, "\xD8\xE0", 2, FPUCODE, { R_ST0, -1, -1 } },
  { I_FSUB, 2, { REG_FPU, REGISTER, 0 }, "\xDC\xE8", 2, FPUCODE, { -1, R_ST0, -1 } },
  { I_FSUBP, 2, { REG_FPU, REGISTER, 0 }, "\xDE\xE8", 2, FPUCODE, { -1, R_ST0, -1 } },
  { I_FSUBR, 2, { REGISTER, MEMORY|BITS32, 0 }, "\xD8", 1, 5, { R_ST0, -1, -1 } },
  { I_FSUBR, 2, { REGISTER, MEMORY|BITS64, 0 }, "\xDC", 1, 5, { R_ST0, -1, -1 } },
  { I_FSUBR, 2, { REGISTER, REG_FPU, 0 }, "\xD8\xE8", 2, FPUCODE, { R_ST0, -1, -1 } },
  { I_FSUBR, 2, { REG_FPU, REGISTER, 0 }, "\xDC\xE0", 2, FPUCODE, { -1, R_ST0, -1 } },
  { I_FSUBRP, 2, { REG_FPU, REGISTER, 0 }, "\xDE\xE0", 2, FPUCODE, { -1, R_ST0, -1 } },
  { I_FTST, 1, { REGISTER, 0, 0 }, "\xD9\xE4", 2, -1, { R_ST0, -1, -1 } },
  { I_FUCOM, 1, { REG_FPU, 0, 0 }, "\xDD\xE0", 2, FPUCODE, { -1, -1, -1 } },
  { I_FUCOMI, 2, { REGISTER, REG_FPU, 0 }, "\xDB\xE8", 2, FPUCODE, { R_ST0, -1, -1 } },
  { I_FUCOMIP, 2, { REGISTER, REG_FPU, 0 }, "\xDF\xE8", 2, FPUCODE, { R_ST0, -1, -1 } },
  { I_FUCOMP, 1, { REG_FPU, 0, 0 }, "\xDD\xE8", 2, FPUCODE, { -1, -1, -1 } },
  { I_FUCOMPP, 1, { REGISTER, 0, 0 }, "\xDA\xE9", 2, -1, { R_ST1, -1, -1 } },
  { I_FXAM, 1, { REGISTER, 0, 0 }, "\xD9\xE5", 2, -1, { R_ST0, -1, -1 } },
  { I_FXCH, 1, { REG_FPU, 0, 0 }, "\xD9\xC8", 2, FPUCODE, { -1, -1, -1 } },
  { I_FXTRACT, 1, { REGISTER, 0, 0 }, "\xD9\xF4", 2, -1, { R_ST0, -1, -1 } },
  { I_FYL2X, 1, { REGISTER, 0, 0 }, "\xD9\xF1", 2, -1, { R_ST0, -1, -1 } },
  { I_FYL2XP1, 1, { REGISTER, 0, 0 }, "\xD9\xF9", 2, -1, { R_ST0, -1, -1 } },
  { I_HLT, 0, { 0, 0, 0 }, "\xF4", 1, -1, { -1, -1, -1 } },
  { I_IDIV, 1, { REGMEM|BITS8, 0, 0 }, "\xF6", 1, 7, { -1, -1, -1 } },
  { I_IDIV, 1, { REGMEM|BITS16, 0, 0 }, "\xF7", 1, 7, { -1, -1, -1 } },
  { I_IDIV, 1, { REGMEM|BITS32, 0, 0 }, "\xF7", 1, 7, { -1, -1, -1 } },
  { I_IMUL, 1, { REGMEM|BITS8, 0, 0 }, "\xF6", 1, 5, { -1, -1, -1 } },
  { I_IMUL, 1, { REGMEM|BITS16, 0, 0 }, "\xF7", 1, 5, { -1, -1, -1 } },
  { I_IMUL, 1, { REGMEM|BITS32, 0, 0 }, "\xF7", 1, 5, { -1, -1, -1 } },
  { I_IMUL, 2, { REG16, REGMEM|BITS16, 0 }, "\x0F\xAF", 2, REGRM, { -1, -1, -1 } },
  { I_IMUL, 2, { REG32, REGMEM|BITS32, 0 }, "\x0F\xAF", 2, REGRM, { -1, -1, -1 } },
  { I_IMUL, 3, { REG16, REGMEM|BITS16, IMMEDIATE|BITS8 }, "\x6B", 1, REGRM, { -1, -1, -1 } },
  { I_IMUL, 3, { REG32, REGMEM|BITS32, IMMEDIATE|BITS8 }, "\x6B", 1, REGRM, { -1, -1, -1 } },
  { I_IMUL, 3, { REG16, REGMEM|BITS16, IMMEDIATE|BITS16 }, "\x69", 1, REGRM, { -1, -1, -1 } },
  { I_IMUL, 3, { REG32, REGMEM|BITS32, IMMEDIATE|BITS32 }, "\x69", 1, REGRM, { -1, -1, -1 } },
  { I_IN, 2, { REGISTER|BITS8, IMMEDIATE|BITS8, 0 }, "\xE4", 1, -1, { R_AL, -1, -1 } },
  { I_IN, 2, { REGISTER|BITS16, IMMEDIATE|BITS8, 0 }, "\xE5", 1, -1, { R_AX, -1, -1 } },
  { I_IN, 2, { REGISTER|BITS32, IMMEDIATE|BITS8, 0 }, "\xE5", 1, -1, { R_EAX, -1, -1 } },
  { I_IN, 2, { REGISTER|BITS8, REGISTER|BITS16, 0 }, "\xEC", 1, -1, { R_AL, R_DX, -1 } },
  { I_IN, 2, { REGISTER|BITS16, REGISTER|BITS16, 0 }, "\xED", 1, -1, { R_AX, R_DX, -1 } },
  { I_IN, 2, { REGISTER|BITS32, REGISTER|BITS16, 0 }, "\xED", 1, -1, { R_EAX, R_DX, -1 } },
  { I_INC, 1, { REGMEM|BITS8, 0, 0 }, "\xFE", 1, 0, { -1, -1, -1 } },
  { I_INC, 1, { REGMEM|BITS16, 0, 0 }, "\xFF", 1, 0, { -1, -1, -1 } },
  { I_INC, 1, { REGMEM|BITS32, 0, 0 }, "\xFF", 1, 0, { -1, -1, -1 } },
  { I_INC, 1, { REG16, 0, 0 }, "\x40", 1, REGCODE, { -1, -1, -1 } },
  { I_INC, 1, { REG32, 0, 0 }, "\x40", 1, REGCODE, { -1, -1, -1 } },
  { I_INSB, 0, { 0, 0, 0 }, "\x6C", 1, -1, { -1, -1, -1 } },
  { I_INSD, 0, { BITS32, 0, 0 }, "\x6D", 1, -1, { -1, -1, -1 } },
  { I_INSW, 0, { 0, 0, 0 }, "\x6D", 1, -1, { -1, -1, -1 } },
  { I_INT, 1, { IMMEDIATE|BITS8, 0, 0 }, "\xCD", 1, -1, { -1, -1, -1 } },
  { I_INT3, 0, { 0, 0, 0 }, "\xCC", 1, -1, { -1, -1, -1 } },
  { I_INTO, 0, { 0, 0, 0 }, "\xCE", 1, -1, { -1, -1, -1 } },
  { I_INVD, 0, { 0, 0, 0 }, "\x0F\x08", 2, -1, { -1, -1, -1 } },
  { I_INVLPG, 1, { MEMORY, 0, 0 }, "\x0F\x01", 2, 7, { -1, -1, -1 } },
  { I_IRET, 0, { 0, 0, 0 }, "\xCF", 1, -1, { -1, -1, -1 } },
  { I_IRETD, 0, { BITS32, 0, 0 }, "\xCF", 1, -1, { -1, -1, -1 } },
  { I_JA, 1, { RELATIVE|BITS8, 0, 0 }, "\x77", 1, -1, { -1, -1, -1 } },
  { I_JA, 1, { RELATIVE|BITS16|NEAR, 0, 0 }, "\x0F\x87", 2, -1, { -1, -1, -1 } },
  { I_JA, 1, { RELATIVE|BITS32|NEAR, 0, 0 }, "\x0F\x87", 2, -1, { -1, -1, -1 } },
  { I_JC, 1, { RELATIVE|BITS8, 0, 0 }, "\x72", 1, -1, { -1, -1, -1 } },
  { I_JC, 1, { RELATIVE|BITS16|NEAR, 0, 0 }, "\x0F\x82", 2, -1, { -1, -1, -1 } },
  { I_JC, 1, { RELATIVE|BITS32|NEAR, 0, 0 }, "\x0F\x82", 2, -1, { -1, -1, -1 } },
  { I_JCXZ, 1, { RELATIVE|BITS8, 0, 0 }, "\xE3", 1, -1, { -1, -1, -1 } },
  { I_JE, 1, { RELATIVE|BITS8, 0, 0 }, "\x74", 1, -1, { -1, -1, -1 } },
  { I_JE, 1, { RELATIVE|BITS16|NEAR, 0, 0 }, "\x0F\x84", 2, -1, { -1, -1, -1 } },
  { I_JE, 1, { RELATIVE|BITS32|NEAR, 0, 0 }, "\x0F\x84", 2, -1, { -1, -1, -1 } },
  { I_JG, 1, { RELATIVE|BITS8, 0, 0 }, "\x7F", 1, -1, { -1, -1, -1 } },
  { I_JG, 1, { RELATIVE|BITS16|NEAR, 0, 0 }, "\x0F\x8F", 2, -1, { -1, -1, -1 } },
  { I_JG, 1, { RELATIVE|BITS32|NEAR, 0, 0 }, "\x0F\x8F", 2, -1, { -1, -1, -1 } },
  { I_JL, 1, { RELATIVE|BITS8, 0, 0 }, "\x7C", 1, -1, { -1, -1, -1 } },
  { I_JL, 1, { RELATIVE|BITS16|NEAR, 0, 0 }, "\x0F\x8C", 2, -1, { -1, -1, -1 } },
  { I_JL, 1, { RELATIVE|BITS32|NEAR, 0, 0 }, "\x0F\x8C", 2, -1, { -1, -1, -1 } },
  { I_JLE, 1, { RELATIVE|BITS8, 0, 0 }, "\x7E", 1, -1, { -1, -1, -1 } },
  { I_JLE, 1, { RELATIVE|BITS16|NEAR, 0, 0 }, "\x0F\x8E", 2, -1, { -1, -1, -1 } },
  { I_JLE, 1, { RELATIVE|BITS32|NEAR, 0, 0 }, "\x0F\x8E", 2, -1, { -1, -1, -1 } },
  { I_JMP, 1, { RELATIVE|BITS8|SHORT, 0, 0 }, "\xEB", 1, -1, { -1, -1, -1 } },
  { I_JMP, 1, { RELATIVE|BITS16|NEAR, 0, 0 }, "\xE9", 1, -1, { -1, -1, -1 } },
  { I_JMP, 1, { RELATIVE|BITS32|NEAR, 0, 0 }, "\xE9", 1, -1, { -1, -1, -1 } },
  { I_JMP, 1, { REGMEM|BITS16|NEAR, 0, 0 }, "\xFF", 1, 4, { -1, -1, -1 } },
  { I_JMP, 1, { REGMEM|BITS32|NEAR, 0, 0 }, "\xFF", 1, 4, { -1, -1, -1 } },
  { I_JMP, 1, { SEG16|OFF16|FAR, 0, 0 }, "\xEA", 1, -1, { -1, -1, -1 } },
  { I_JMP, 1, { SEG16|OFF32|BITS32|FAR, 0, 0 }, "\xEA", 1, -1, { -1, -1, -1 } },
  { I_JMP, 1, { REGMEM|BITS16|FAR, 0, 0 }, "\xFF", 1, 5, { -1, -1, -1 } },
  { I_JMP, 1, { REGMEM|BITS32|FAR, 0, 0 }, "\xFF", 1, 5, { -1, -1, -1 } },
  { I_JNA, 1, { RELATIVE|BITS8, 0, 0 }, "\x76", 1, -1, { -1, -1, -1 } },
  { I_JNA, 1, { RELATIVE|BITS16|NEAR, 0, 0 }, "\x0F\x86", 2, -1, { -1, -1, -1 } },