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📄 io2acpl.lst

📁 HT46R47對AC過零信號進行檢測
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"File: IO2ACPL.ASM   Holtek Cross-Assembler  Version 2.86      Page 1


   1  0000              ;;**********File Name: IO2ACPL.asm*******************
   2  0000              ;;
   3  0000              ;;---------------------------------------------------
   4  0000              ;;Project Name: 		I/O to AC Power Line		|
   5  0000              ;;Project No.:			VL2007050003				|
   6  0000              ;;Author:				Jammas yang					|
   7  0000              ;;Date:					2007/05/21					|
   8  0000              ;;Version:				V0.0						|
   9  0000              ;;													|
  10  0000              ;;HT_IDE Version: 		V6.6 SP5					|
  11  0000              ;;MCU Body:				HT46R47						|
  12  0000              ;;---------------------------------------------------
  13  0000              ;;
  14  0000              ;;---------------------------------------------------
  15  0000              ;;Mask Option:
  16  0000              ;;---------------------------------------------------
  17  0000              ;;VDD: 					5.0V						|
  18  0000              ;Fsys: 					4MHz						|
  19  0000              ;OSC: 					Crystal						|
  20  0000              ;WDT: 					Enable						|
  21  0000              ;WDT Clock Source: 		T1 (SYSTEM CLOCK/4)			|
  22  0000              ;CLR WDT: 				One clear instruction		|
  23  0000              ;Wake_Up PA.0-7: 		None-Wake-Up				|
  24  0000              ;Pull-high PA: 			None-PULL-HIGH				|
  25  0000              ;Pull-high PB: 			None-PULL-HIGH				|
  26  0000              ;Pull-high Pd: 			None-PULL-HIGH				|
  27  0000              ;PWM					Disable						|
  28  0000              ;PA3 PFD				Disable						|
  29  0000              ;LVR 					Enable						|
  30  0000              ;LVR VOLTAGE			3.8V						|
  31  0000              ;;---------------------------------------------------
  32  0000              	
  33  0000              ;;================start include======================
  34  0000              .LISTINCLUDE
  35  0000              
  36  0000              #INCLUDE HT46R47.INC

   1  0000            C ; Ht46r47.INC
   2  0000            C ;	This file contains the definition of registers for
   3  0000            C ;		Holtek Ht46r47 microcontroller.
   4  0000            C ;	[VERSION] 6.4, 4 ; 3 for beta
   5  0000            C ;	Generated by Cfg2IncH V1.1.
   6  0000            C ;	Do not modify manually.
   7  0000            C 
   8  0000            C R0	EQU	[00H]	;old style declaration, not recommended for use
   9  0000            C IAR	EQU	[00H]
  10  0000            C MP0	EQU	[01H]	;old style declaration, not recommended for use
  11  0000            C MP	EQU	[01H]
  12  0000            C ACC	EQU	[05H]
  13  0000            C PCL	EQU	[06H]
  14  0000            C TBLP	EQU	[07H]
  15  0000            C TBLH	EQU	[08H]
  16  0000            C STATUS	EQU	[0AH]
  17  0000            C INTC	EQU	[0BH]
  18  0000            C TMR	EQU	[0DH]
  19  0000            C TMRC	EQU	[0EH]
  20  0000            C PA	EQU	[012H]
  21  0000            C PAC	EQU	[013H]
  22  0000            C PB	EQU	[014H]
"File: HT46R47.INC   Holtek Cross-Assembler  Version 2.86      Page 2

  23  0000            C PBC	EQU	[015H]
  24  0000            C PD	EQU	[018H]
  25  0000            C PDC	EQU	[019H]
  26  0000            C PWM	EQU	[01AH]
  27  0000            C ADRL	EQU	[020H]
  28  0000            C ADRH	EQU	[021H]
  29  0000            C ADCR	EQU	[022H]
  30  0000            C ACSR	EQU	[023H]
  31  0000            C 
  32  0000            C C	EQU	[0AH].0
  33  0000            C AC	EQU	[0AH].1
  34  0000            C Z	EQU	[0AH].2
  35  0000            C OV	EQU	[0AH].3
  36  0000            C PDF	EQU	[0AH].4
  37  0000            C TO	EQU	[0AH].5
  38  0000            C EMI	EQU	[0BH].0
  39  0000            C EEI	EQU	[0BH].1
  40  0000            C ETI	EQU	[0BH].2
  41  0000            C EADI	EQU	[0BH].3
  42  0000            C EIF	EQU	[0BH].4
  43  0000            C TF	EQU	[0BH].5
  44  0000            C ADF	EQU	[0BH].6
  45  0000            C PSC0	EQU	[0EH].0
  46  0000            C PSC1	EQU	[0EH].1
  47  0000            C PSC2	EQU	[0EH].2
  48  0000            C TE	EQU	[0EH].3
  49  0000            C TON	EQU	[0EH].4
  50  0000            C TM0	EQU	[0EH].6
  51  0000            C TM1	EQU	[0EH].7
  52  0000            C PA0	EQU	[012H].0
  53  0000            C PA1	EQU	[012H].1
  54  0000            C PA2	EQU	[012H].2
  55  0000            C PA3	EQU	[012H].3
  56  0000            C PA4	EQU	[012H].4
  57  0000            C PA5	EQU	[012H].5
  58  0000            C PA6	EQU	[012H].6
  59  0000            C PA7	EQU	[012H].7
  60  0000            C PB0	EQU	[014H].0
  61  0000            C PB1	EQU	[014H].1
  62  0000            C PB2	EQU	[014H].2
  63  0000            C PB3	EQU	[014H].3
  64  0000            C PB4	EQU	[014H].4
  65  0000            C PB5	EQU	[014H].5
  66  0000            C PB6	EQU	[014H].6
  67  0000            C PB7	EQU	[014H].7
  68  0000            C PD0	EQU	[018H].0
  69  0000            C ACS0	EQU	[022H].0
  70  0000            C ACS1	EQU	[022H].1
  71  0000            C ACS2	EQU	[022H].2
  72  0000            C PCR0	EQU	[022H].3
  73  0000            C PCR1	EQU	[022H].4
  74  0000            C PCR2	EQU	[022H].5
  75  0000            C EOCB	EQU	[022H].6
  76  0000            C START	EQU	[022H].7
  77  0000            C ADCS0	EQU	[023H].0
  78  0000            C ADCS1	EQU	[023H].1
  79  0000            C 
  80  0000            C LASTPAGE	EQU	0700H

  37  0000              
"File: IO2ACPL.ASM   Holtek Cross-Assembler  Version 2.86      Page 3

  38  0000              #define		RAM_SIZE		64		;;all general registers
  39  0000              #define		COUNT_60HZ		133		;;time count @60Hz
  40  0000              #define		COUNT_50HZ		160		;;time count @50Hz
  41  0000              
  42  0000              ;;================end of include=====================
  43  0000              
  44  0000              ;;********start variant define***********************
  45  0000              Gobal_variant .SECTION	'DATA'
  46  0000              
  47  0000  00          acc_stack				DB 	?		;;to save special register acc
  48  0001  00          status_stack 			DB 	?		;;to save special register status
  49  0002              
  50  0002  00          flag_055h				DB	?		;;reset flag1
  51  0003  00          flag_0aah				DB	?		;;reset flag2, secrurity
  52  0004  00          us						DB	?		;;us level time variant
  53  0005  00          ms						DB 	?		;;ms level time variant
  54  0006  00          second					DB	?		;;second level time variant for ZCD interval
  55  0007  00          phase_position			DB	?		;;0~160 for 50Hz, 0~133 for 60Hz.
  56  0008              									;;as to 50/60Hz, 160*2.25=360 degree, 133*2.7=360 degree
  57  0008              								
  58  0008  00          tmp_phase				DB	?		;;phase detection temporary variant
  59  0009  00          loop_index				DB	?		;;loop count
  60  000A              	
  61  000A  00          flag_first_zcd			DBIT		;;0 for first zero crossing, 1 for second zero crossing
  62  000A              flag_zcd_int			DBIT		;;flag of Zero crossing detecting
  63  000A              flag_zcd_rest			DBIT		;;flag of non-ZCD period
  64  000B              ;;*********end of variant define*********************
  65  000B              
  66  000B              ;;================start code=========================
  67  0000              CODE_MAIN .SECTION AT 00H 'CODE'	
  68  0000  280D        	JMP 	MAIN_START				;;jump to main code entrance
  69  0001              
  70  0001              ;;-----------int_isr()-------------------------------
  71  0001              	ORG 	004H					;;external interrupt entrance
  72  0004  2842        	JMP		INT_ISR					;;jump to external interrupt subroutine
  73  0005              ;;-----------end of int_isr()------------------------
  74  0005              
  75  0005              ;;-----------timer_isr()-----------------------------
  76  0005              	ORG 	008H					;;timer interrupt entrance
  77  0008  2853        	JMP		TIMER_ISR				;;jump to timer interrupt subroutine
  78  0009              ;;-----------end of timer_isr()----------------------
  79  0009              
  80  0009              ;;-----------ad_isr()--------------------------------
  81  0009              	ORG 	00CH					;;A/D conversion entrance, no used
  82  000C  0004        	RETI
  83  000D              ;;-----------end of ad_isr()-------------------------
  84  000D              
  85  000D              ;;-----------main()----------------------------------
  86  000D              MAIN_START:
  87  000D  0700     R  	MOV		A,	flag_055h			;;check if flag1(content 55H) changed
  88  000E  0C55        	XOR		A,	55H
  89  000F  390A        	SNZ		Z 

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