ma_tmr.c

avr Rtos 255 Task avr Rtos 255 Task

/*
*****************************************************************************
**
**      Project     : My project
**
**      Component   : atm (ATmega128)
**
**      Modulename  : TMR
**
**      Filename    : ma_tmr.c
**
**      Abstract    : This file implements a device driver for the TMR
**                    module.
**
**      Compiler    : IAR C compiler
**
**      Date        : 2005-10-27 18:13:34
**
**      License no. : N/A     Vali
**
**      Warning     : This file has been automatically generated.
**                    Do not edit this file if you intend to regenerate it.
**
**      This device driver was created by IAR MakeApp version
**      4.01A (Atmel megaAVR: 4.00A) for the Atmel megaAVR series of
**      microcontrollers.
**
**      (c)Copyright 2003 IAR Systems.
**      Your rights to this file are explained in the IAR MakeApp
**      License Agreement. All other rights reserved.
**
*****************************************************************************
*/

/*
**===========================================================================
**  1       GENERAL
**  1.1     Revisions
**
**  Please read the IAR MakeApp for Atmel megaAVR readme file
**
**
**===========================================================================
*/

/*
**===========================================================================
**  1.2     References
**
**  No   Identification          Name or Description
**  ==   ===================     ================================
**  1    2467G-AVR-09/02         ATmega128 Hardware Manual
**
**===========================================================================
*/

/*
**===========================================================================
**  2.      INCLUDE FILES
**  2.1     Standard include files
**===========================================================================
*/

/*
**===========================================================================
**  2.2     Application include files
**===========================================================================
*/

//#include "usercode.h"   /* Usercode macros (see <template.h>) */
#include "ma_tgt.h"     /* Target specific header file */
#include "iom128.h"     /* Internal registers */
#include "ma_tmr.h"     /* Module driver header file */
#include "ma_io.h"

/*
**===========================================================================
**  3.      DECLARATIONS
**  3.1     Internal constants
**===========================================================================
*/

#define MA_OCR2_TMR            0x00        /* Output compare register 2 */
#define MA_OCR2_TMR_MASK       0xFF        /* Used bits */
#define MA_TCNT2_TMR           0x00        /* Timer/counter2 register */
#define MA_TCNT2_TMR_MASK      0xFF        /* Used bits */
#define MA_TCCR2_TMR           0x00        /* Timer/counter2 control register */
#define MA_TCCR2_TMR_MASK      0xFF        /* Used bits */
#define MA_ICR1_TMR            0x0000      /* Input capture register 1 */
#define MA_ICR1_TMR_MASK       0xFFFF      /* Used bits */
#define MA_OCR1B_TMR           0x0000      /* Output compare register 1B */
#define MA_OCR1B_TMR_MASK      0xFFFF      /* Used bits */
#define MA_OCR1A_TMR           0x0000      /* Output compare register 1A */
#define MA_OCR1A_TMR_MASK      0xFFFF      /* Used bits */
#define MA_TCNT1_TMR           0x0000      /* Timer/counter1 register */
#define MA_TCNT1_TMR_MASK      0xFFFF      /* Used bits */
#define MA_TCCR1B_TMR          0x00        /* Timer/counter1 control register B */
#define MA_TCCR1B_TMR_MASK     0xDF        /* Used bits */
#define MA_TCCR1A_TMR          0x00        /* Timer/counter1 control register A */
#define MA_TCCR1A_TMR_MASK     0xFF        /* Used bits */
#define MA_ASSR_TMR            0x00        /* Asynchronous status register */
#define MA_ASSR_TMR_MASK       0x0F        /* Used bits */
#define MA_OCR0_TMR            0x00        /* Output compare register 0 */
#define MA_OCR0_TMR_MASK       0xFF        /* Used bits */
#define MA_TCNT0_TMR           0x00        /* Timer/counter0 register */
#define MA_TCNT0_TMR_MASK      0xFF        /* Used bits */
#define MA_TCCR0_TMR           0x07        /* Timer/counter0 control register */
#define MA_TCCR0_TMR_MASK      0xFF        /* Used bits */
#define MA_TIFR_TMR            0x00        /* Timer/counter interrupt flag register */
#define MA_TIFR_TMR_MASK       0xFF        /* Used bits */
#define MA_TIMSK_TMR           0x01        /* Timer/counter interrupt mask register */
#define MA_TIMSK_TMR_MASK      0xFF        /* Used bits */
#define MA_OCR1C_TMR           0x0000      /* Output compare register 1C */
#define MA_OCR1C_TMR_MASK      0xFFFF      /* Used bits */
#define MA_TCCR1C_TMR          0x00        /* Timer/counter1 control register C */
#define MA_TCCR1C_TMR_MASK     0xE0        /* Used bits */
#define MA_ETIFR_TMR           0x00        /* Extended timer/counter interrupt flag register */
#define MA_ETIFR_TMR_MASK      0x3F        /* Used bits */
#define MA_ETIMSK_TMR          0x00        /* Extended timer/counter interrupt mask register */
#define MA_ETIMSK_TMR_MASK     0x3F        /* Used bits */
#define MA_ICR3_TMR            0x0000      /* Input capture register 3 */
#define MA_ICR3_TMR_MASK       0xFFFF      /* Used bits */
#define MA_OCR3C_TMR           0x0000      /* Output compare register 3C */
#define MA_OCR3C_TMR_MASK      0xFFFF      /* Used bits */
#define MA_OCR3B_TMR           0x0000      /* Output compare register 3B */
#define MA_OCR3B_TMR_MASK      0xFFFF      /* Used bits */
#define MA_OCR3A_TMR           0x0000      /* Output compare register 3A */
#define MA_OCR3A_TMR_MASK      0xFFFF      /* Used bits */
#define MA_TCNT3_TMR           0x0000      /* Timer/counter3 register */
#define MA_TCNT3_TMR_MASK      0xFFFF      /* Used bits */
#define MA_TCCR3B_TMR          0x00        /* Timer/counter3 control register B */
#define MA_TCCR3B_TMR_MASK     0xDF        /* Used bits */
#define MA_TCCR3A_TMR          0x00        /* Timer/counter3 control register A */
#define MA_TCCR3A_TMR_MASK     0xFF        /* Used bits */
#define MA_TCCR3C_TMR          0x00        /* Timer/counter3 control register C */
#define MA_TCCR3C_TMR_MASK     0xE0        /* Used bits */

/*
**===========================================================================
**  3.2     Internal macros
**===========================================================================
*/

/*
**===========================================================================
**  3.3     Internal type definitions
**===========================================================================
*/

/*
**===========================================================================
**  3.4     Global variables (declared as 'extern' in some header file)
**===========================================================================
*/

/*
**===========================================================================
**  3.5     Internal function prototypes (defined in Section 5)
**===========================================================================
*/

/*
**===========================================================================
**  3.6     Internal variables
**===========================================================================
*/

/*
**===========================================================================
**  4.      GLOBAL FUNCTIONS (declared as 'extern' in some header file)
**===========================================================================
*/



void MA_Init_TMR( void )
/*
**---------------------------------------------------------------------------
**
**  Abstract:
**      Initialises the TMR module. Only sets those registers with values
**      not equal to the power-on reset values. No channel are started by
**      this function (clock input is disabled). Use MA_Start_TMR to start
**      a channel.
**
**  Parameters:
**      None
**
**  Returns:
**      None
**
**---------------------------------------------------------------------------
*/
{
    /*--- Handle user code on function entry ---*/
    //ENTER_MA_INIT_TMR;

    /*--- Initialise registers ---*/
    TCCR0    = MA_TCCR0_TMR & ~0x07;
    TCCR1B   = MA_TCCR1B_TMR & ~0x07;
    TCCR2    = MA_TCCR2_TMR & ~0x07;
    TCCR3B   = MA_TCCR3B_TMR & ~0x07;
    TIMSK    = MA_TIMSK_TMR;

    /*--- Configure pin usage ---*/

    /*--- Handle user code on function exit ---*/
    //EXIT_MA_INIT_TMR;

} /* MA_Init_TMR */





void MA_Reset_TMR( void )
/*
**---------------------------------------------------------------------------
**
**  Abstract:
**      Resets the TMR module. Sets all registers. Count operations
**      are halted.
**
**  Parameters:
**      None
**
**  Returns:
**      None
**
**---------------------------------------------------------------------------
*/
{
    /*--- Handle user code on function entry ---*/
    //ENTER_MA_RESET_TMR;

    /*--- Reset registers ---*/
    TCCR0    = MA_TCCR0_TMR & ~0x07;
    OCR0     = MA_OCR0_TMR;
    TCCR1A   = MA_TCCR1A_TMR;
    TCCR1B   = MA_TCCR1B_TMR & ~0x07;
    OCR1A    = MA_OCR1A_TMR;
    OCR1B    = MA_OCR1B_TMR;
    OCR1C    = MA_OCR1C_TMR;
    TCCR2    = MA_TCCR2_TMR & ~0x07;
    OCR2     = MA_OCR2_TMR;
    TCCR3A   = MA_TCCR3A_TMR;
    TCCR3B   = MA_TCCR3B_TMR & ~0x07;
    OCR3A    = MA_OCR3A_TMR;
    OCR3B    = MA_OCR3B_TMR;
    OCR3C    = MA_OCR3C_TMR;
    ASSR     = ( ASSR & ~MA_ASSR_TMR_MASK ) | MA_ASSR_TMR;
    TIMSK    = MA_TIMSK_TMR;
    ETIMSK   = ( ETIMSK & ~MA_ETIMSK_TMR_MASK ) | MA_ETIMSK_TMR;

    /*--- Configure pin usage ---*/

    /*--- Handle user code on function exit ---*/
    //EXIT_MA_RESET_TMR;

} /* MA_Reset_TMR */





S8 MA_Start_TMR( U8 Channel, U8 Reset )
/*
**---------------------------------------------------------------------------
**
**  Abstract: