i2c_altera.hier_info

filter,很不错,大家可以看以下

|I2C_ALTERA
ENC_CLK <= PCLK.DB_MAX_OUTPUT_PORT_TYPE
PCLK => ENC_CLK.DATAIN
PCLK => reset_gen:inst21.clk
PCLK => add_mask:inst22.clk
PCLK => receiver:inst18.clk
flash_ce <= <VCC>
flash_oe <= <VCC>
flash_rw <= <VCC>
ENC_HS <= P_HS.DB_MAX_OUTPUT_PORT_TYPE
P_HS => ENC_HS.DATAIN
ENC_VS <= P_VS.DB_MAX_OUTPUT_PORT_TYPE
P_VS => ENC_VS.DATAIN
SCL <= I2C:inst1.SCL
SYSCLK => PLL:inst26.inclk0
SYSCLK => filter:inst8.clk
SYSCLK => SAA_ROM:inst2.clock
SYSCLK => ENC_ROM:inst16.clock
SYSCLK => Led_run:inst14.clk
RST => clk_gen:inst19.rst
RST => filter:inst8.rst_in
RST => reset_gen:inst21.rst_in
RST => receiver:inst18.rst
RST => Led_run:inst14.rst
SDA <= I2C:inst1.SDA
SCL_ENC <= I2C:inst10.SCL
SDA_ENC <= I2C:inst10.SDA
ENC_DATA[0] <= add_mask:inst22.qd_out[0]
ENC_DATA[1] <= add_mask:inst22.qd_out[1]
ENC_DATA[2] <= add_mask:inst22.qd_out[2]
ENC_DATA[3] <= add_mask:inst22.qd_out[3]
ENC_DATA[4] <= add_mask:inst22.qd_out[4]
ENC_DATA[5] <= add_mask:inst22.qd_out[5]
ENC_DATA[6] <= add_mask:inst22.qd_out[6]
ENC_DATA[7] <= add_mask:inst22.qd_out[7]
PDATA[0] => receiver:inst18.qd[0]
PDATA[1] => receiver:inst18.qd[1]
PDATA[2] => receiver:inst18.qd[2]
PDATA[3] => receiver:inst18.qd[3]
PDATA[4] => receiver:inst18.qd[4]
PDATA[5] => receiver:inst18.qd[5]
PDATA[6] => receiver:inst18.qd[6]
PDATA[7] => receiver:inst18.qd[7]
LED[0] <= Led_run:inst14.led[0]
LED[1] <= Led_run:inst14.led[1]
LED[2] <= Led_run:inst14.led[2]
LED[3] <= Led_run:inst14.led[3]


|I2C_ALTERA|I2C:inst1
sysclk => div_by_n:div_by_x.sysclk
sysclk => SDA_reg.CLK
sysclk => SCL_reg.CLK
sysclk => Cmd_reg[3].CLK
sysclk => Cmd_reg[2].CLK
sysclk => Cmd_reg[1].CLK
sysclk => Cmd_reg[0].CLK
sysclk => Start_condition.CLK
sysclk => Sh_reg[7].CLK
sysclk => Sh_reg[6].CLK
sysclk => Sh_reg[5].CLK
sysclk => Sh_reg[4].CLK
sysclk => Sh_reg[3].CLK
sysclk => Sh_reg[2].CLK
sysclk => Sh_reg[1].CLK
sysclk => Sh_reg[0].CLK
sysclk => BitCnt[2].CLK
sysclk => BitCnt[1].CLK
sysclk => BitCnt[0].CLK
sysclk => Ack_rx_reg.CLK
sysclk => Valid_data.CLK
sysclk => Ack_tx_reg.CLK
sysclk => Enable_reg.CLK
sysclk => Sx~1.IN1
sysclk => Ss~1.IN1
sysclk => Sy~1.IN1
sysclk => St~1.IN1
clk_en => div_by_n:div_by_x.cnt_en
/reset => SDA_reg.ACLR
/reset => SCL_reg.ACLR
/reset => Cmd_reg[3].ACLR
/reset => Cmd_reg[2].ACLR
/reset => Cmd_reg[1].ACLR
/reset => Cmd_reg[0].ACLR
/reset => Start_condition.ACLR
/reset => Sh_reg[7].ACLR
/reset => Sh_reg[6].ACLR
/reset => Sh_reg[5].ACLR
/reset => Sh_reg[4].ACLR
/reset => Sh_reg[3].ACLR
/reset => Sh_reg[2].ACLR
/reset => Sh_reg[1].ACLR
/reset => Sh_reg[0].ACLR
/reset => BitCnt[2].ACLR
/reset => BitCnt[1].ACLR
/reset => BitCnt[0].ACLR
/reset => Ack_rx_reg.ACLR
/reset => Valid_data.ACLR
/reset => Ack_tx_reg.ACLR
/reset => Enable_reg.ACLR
Dout[0] <= Sh_reg[0].DB_MAX_OUTPUT_PORT_TYPE
Dout[1] <= Sh_reg[1].DB_MAX_OUTPUT_PORT_TYPE
Dout[2] <= Sh_reg[2].DB_MAX_OUTPUT_PORT_TYPE
Dout[3] <= Sh_reg[3].DB_MAX_OUTPUT_PORT_TYPE
Dout[4] <= Sh_reg[4].DB_MAX_OUTPUT_PORT_TYPE
Dout[5] <= Sh_reg[5].DB_MAX_OUTPUT_PORT_TYPE
Dout[6] <= Sh_reg[6].DB_MAX_OUTPUT_PORT_TYPE
Dout[7] <= Sh_reg[7].DB_MAX_OUTPUT_PORT_TYPE
Ack_rx <= Ack_rx_reg.DB_MAX_OUTPUT_PORT_TYPE
Status <= Start_condition.DB_MAX_OUTPUT_PORT_TYPE
DValid <= Valid_data.DB_MAX_OUTPUT_PORT_TYPE
DEnable <= Enable_reg.DB_MAX_OUTPUT_PORT_TYPE
SDA <= $00006
SCL <= $00007


|I2C_ALTERA|I2C:inst1|div_by_n:div_by_x
SysClk => lpm_counter:counter.clock
SysClk => Deglitch.CLK
cnt_en => lpm_counter:counter.cnt_en
Every_N <= Deglitch.DB_MAX_OUTPUT_PORT_TYPE
q[0] <= lpm_counter:counter.q[0]
q[1] <= lpm_counter:counter.q[1]
q[2] <= lpm_counter:counter.q[2]
q[3] <= lpm_counter:counter.q[3]
q[4] <= lpm_counter:counter.q[4]


|I2C_ALTERA|I2C:inst1|div_by_n:div_by_x|lpm_counter:counter
clock => cntr_986:auto_generated.clock
clk_en => ~NO_FANOUT~
cnt_en => cntr_986:auto_generated.cnt_en
updown => ~NO_FANOUT~
aclr => ~NO_FANOUT~
aset => ~NO_FANOUT~
aconst => ~NO_FANOUT~
aload => ~NO_FANOUT~
sclr => cntr_986:auto_generated.sclr
sset => ~NO_FANOUT~
sconst => ~NO_FANOUT~
sload => ~NO_FANOUT~
data[0] => ~NO_FANOUT~
data[1] => ~NO_FANOUT~
data[2] => ~NO_FANOUT~
data[3] => ~NO_FANOUT~
data[4] => ~NO_FANOUT~
cin => ~NO_FANOUT~
q[0] <= cntr_986:auto_generated.q[0]
q[1] <= cntr_986:auto_generated.q[1]
q[2] <= cntr_986:auto_generated.q[2]
q[3] <= cntr_986:auto_generated.q[3]
q[4] <= cntr_986:auto_generated.q[4]
cout <= <GND>
eq[0] <= <GND>
eq[1] <= <GND>
eq[2] <= <GND>
eq[3] <= <GND>
eq[4] <= <GND>
eq[5] <= <GND>
eq[6] <= <GND>
eq[7] <= <GND>
eq[8] <= <GND>
eq[9] <= <GND>
eq[10] <= <GND>
eq[11] <= <GND>
eq[12] <= <GND>
eq[13] <= <GND>
eq[14] <= <GND>
eq[15] <= <GND>


|I2C_ALTERA|I2C:inst1|div_by_n:div_by_x|lpm_counter:counter|cntr_986:auto_generated
clock => counter_cella0.CLK
clock => counter_cella1.CLK
clock => counter_cella2.CLK
clock => counter_cella3.CLK
clock => counter_cella4.CLK
cnt_en => counter_cella0.DATAB
cnt_en => counter_cella1.DATAB
cnt_en => counter_cella2.DATAB
cnt_en => counter_cella3.DATAB
cnt_en => counter_cella4.DATAB
cout <= counter_cella4.COUT
q[0] <= counter_cella0.REGOUT
q[1] <= counter_cella1.REGOUT
q[2] <= counter_cella2.REGOUT
q[3] <= counter_cella3.REGOUT
q[4] <= counter_cella4.REGOUT
sclr => counter_cella0.SCLR
sclr => counter_cella1.SCLR
sclr => counter_cella2.SCLR
sclr => counter_cella3.SCLR
sclr => counter_cella4.SCLR


|I2C_ALTERA|I2C:inst1|div_by_n:div_by_x|lpm_compare:$00002
dataa[0] => comptree:comparator.dataa[0]
dataa[1] => comptree:comparator.dataa[1]
dataa[2] => comptree:comparator.dataa[2]
dataa[3] => comptree:comparator.dataa[3]
dataa[4] => comptree:comparator.dataa[4]
datab[0] => comptree:comparator.datab[0]
datab[1] => comptree:comparator.datab[1]
datab[2] => comptree:comparator.datab[2]
datab[3] => comptree:comparator.datab[3]
datab[4] => comptree:comparator.datab[4]
clock => ~NO_FANOUT~
aclr => ~NO_FANOUT~
clken => ~NO_FANOUT~
aeb <= aeb_xnode.DB_MAX_OUTPUT_PORT_TYPE
agb <= agb_xnode.DB_MAX_OUTPUT_PORT_TYPE


|I2C_ALTERA|I2C:inst1|div_by_n:div_by_x|lpm_compare:$00002|comptree:comparator
dataa[0] => cmpchain:cmp_end.dataa[0]
dataa[1] => cmpchain:cmp_end.dataa[1]
dataa[2] => cmpchain:cmp_end.dataa[2]
dataa[3] => cmpchain:cmp_end.dataa[3]
dataa[4] => cmpchain:cmp_end.dataa[4]
datab[0] => cmpchain:cmp_end.datab[0]
datab[1] => cmpchain:cmp_end.datab[1]
datab[2] => cmpchain:cmp_end.datab[2]
datab[3] => cmpchain:cmp_end.datab[3]
datab[4] => cmpchain:cmp_end.datab[4]
clk => ~NO_FANOUT~
aset => ~NO_FANOUT~
clken => ~NO_FANOUT~
aeb <= cmpchain:cmp_end.aeb
agb <= <GND>


|I2C_ALTERA|I2C:inst1|div_by_n:div_by_x|lpm_compare:$00002|comptree:comparator|cmpchain:cmp_end
dataa[0] => comptree:comp.dataa[0]
dataa[1] => comptree:comp.dataa[1]
dataa[2] => comptree:comp.dataa[2]
dataa[3] => comptree:comp.dataa[3]
dataa[4] => comptree:comp.dataa[4]
datab[0] => comptree:comp.datab[0]
datab[1] => comptree:comp.datab[1]
datab[2] => comptree:comp.datab[2]
datab[3] => comptree:comp.datab[3]
datab[4] => comptree:comp.datab[4]
clk => ~NO_FANOUT~
aset => ~NO_FANOUT~
clken => ~NO_FANOUT~
aeb <= aeb_out.DB_MAX_OUTPUT_PORT_TYPE
agb <= agb_out.DB_MAX_OUTPUT_PORT_TYPE


|I2C_ALTERA|I2C:inst1|div_by_n:div_by_x|lpm_compare:$00002|comptree:comparator|cmpchain:cmp_end|comptree:comp
dataa[0] => cmpchain:cmp[0].dataa[0]
dataa[1] => cmpchain:cmp[0].dataa[1]
dataa[2] => cmpchain:cmp[0].dataa[2]
dataa[3] => cmpchain:cmp[0].dataa[3]
dataa[4] => cmpchain:cmp_end.dataa[0]
datab[0] => cmpchain:cmp[0].datab[0]
datab[1] => cmpchain:cmp[0].datab[1]
datab[2] => cmpchain:cmp[0].datab[2]
datab[3] => cmpchain:cmp[0].datab[3]
datab[4] => cmpchain:cmp_end.datab[0]
clk => ~NO_FANOUT~
aset => ~NO_FANOUT~
clken => ~NO_FANOUT~
aeb <= aeb_node.DB_MAX_OUTPUT_PORT_TYPE
agb <= <GND>


|I2C_ALTERA|I2C:inst1|div_by_n:div_by_x|lpm_compare:$00002|comptree:comparator|cmpchain:cmp_end|comptree:comp|cmpchain:cmp[0]
clk => ~NO_FANOUT~
aset => ~NO_FANOUT~
clken => ~NO_FANOUT~
aeb <= aeb_out.DB_MAX_OUTPUT_PORT_TYPE
agb <= agb_out.DB_MAX_OUTPUT_PORT_TYPE


|I2C_ALTERA|I2C:inst1|div_by_n:div_by_x|lpm_compare:$00002|comptree:comparator|cmpchain:cmp_end|comptree:comp|cmpchain:cmp_end
clk => ~NO_FANOUT~
aset => ~NO_FANOUT~
clken => ~NO_FANOUT~
aeb <= aeb_out.DB_MAX_OUTPUT_PORT_TYPE
agb <= agb_out.DB_MAX_OUTPUT_PORT_TYPE


|I2C_ALTERA|I2C:inst1|div_by_n:div_by_x|lpm_compare:$00002|comptree:comparator|cmpchain:cmp_end|comptree:comp|comptree:sub_comptree
dataa[0] => cmpchain:cmp_end.dataa[0]
dataa[1] => cmpchain:cmp_end.dataa[1]
datab[0] => cmpchain:cmp_end.datab[0]
datab[1] => cmpchain:cmp_end.datab[1]
clk => ~NO_FANOUT~
aset => ~NO_FANOUT~
clken => ~NO_FANOUT~
aeb <= cmpchain:cmp_end.aeb
agb <= <GND>


|I2C_ALTERA|I2C:inst1|div_by_n:div_by_x|lpm_compare:$00002|comptree:comparator|cmpchain:cmp_end|comptree:comp|comptree:sub_comptree|cmpchain:cmp_end
clk => ~NO_FANOUT~
aset => ~NO_FANOUT~
clken => ~NO_FANOUT~
aeb <= aeb_out.DB_MAX_OUTPUT_PORT_TYPE
agb <= agb_out.DB_MAX_OUTPUT_PORT_TYPE


|I2C_ALTERA|I2C:inst1|div_by_n:div_by_x|lpm_compare:$00002|altshift:aeb_ext_lat_ffs
data[0] => result[0].DATAIN
clock => ~NO_FANOUT~
aclr => ~NO_FANOUT~
clken => ~NO_FANOUT~
result[0] <= data[0].DB_MAX_OUTPUT_PORT_TYPE


|I2C_ALTERA|I2C:inst1|div_by_n:div_by_x|lpm_compare:$00002|altshift:agb_ext_lat_ffs
data[0] => result[0].DATAIN
clock => ~NO_FANOUT~
aclr => ~NO_FANOUT~
clken => ~NO_FANOUT~
result[0] <= data[0].DB_MAX_OUTPUT_PORT_TYPE


|I2C_ALTERA|clk_gen:inst19
clkin => count[0].CLK
clkin => clkout~reg0.CLK
clkin => count[1].CLK
rst => count[0].ACLR
rst => clkout~reg0.ACLR
rst => count[1].ACLR
clkout <= clkout~reg0.DB_MAX_OUTPUT_PORT_TYPE


|I2C_ALTERA|PLL:inst26
inclk0 => sub_wire7[0].IN1
c0 <= altpll:altpll_component.clk
c1 <= altpll:altpll_component.clk
locked <= altpll:altpll_component.locked
e0 <= altpll:altpll_component.extclk


|I2C_ALTERA|PLL:inst26|altpll:altpll_component
inclk[0] => pll.CLK
inclk[1] => pll.CLK1
fbin => ~NO_FANOUT~
pllena => ~NO_FANOUT~
clkswitch => ~NO_FANOUT~
areset => ~NO_FANOUT~
pfdena => ~NO_FANOUT~
clkena[0] => ~NO_FANOUT~
clkena[1] => ~NO_FANOUT~
clkena[2] => ~NO_FANOUT~
clkena[3] => ~NO_FANOUT~
clkena[4] => ~NO_FANOUT~
clkena[5] => ~NO_FANOUT~
extclkena[0] => ~NO_FANOUT~
extclkena[1] => ~NO_FANOUT~
extclkena[2] => ~NO_FANOUT~
extclkena[3] => ~NO_FANOUT~
scanclk => ~NO_FANOUT~
scanaclr => ~NO_FANOUT~
scanread => ~NO_FANOUT~
scanwrite => ~NO_FANOUT~
scandata => ~NO_FANOUT~
clk[0] <= pll.CLK
clk[1] <= pll.CLK1
clk[2] <= pll.CLK2
clk[3] <= pll.CLK3
clk[4] <= pll.CLK4
clk[5] <= pll.CLK5
extclk[0] <= pll.EXTCLK
extclk[1] <= pll.EXTCLK1
extclk[2] <= pll.EXTCLK2
extclk[3] <= pll.EXTCLK3
clkbad[0] <= <GND>
clkbad[1] <= <GND>
enable1 <= <GND>
enable0 <= <GND>
activeclock <= <GND>
clkloss <= <GND>
locked <= pll.LOCKED
scandataout <= <GND>
scandone <= <GND>
sclkout0 <= <GND>
sclkout1 <= <GND>


|I2C_ALTERA|filter:inst8
clk => cnt[14].CLK
clk => cnt[13].CLK
clk => cnt[12].CLK
clk => cnt[11].CLK
clk => cnt[10].CLK
clk => cnt[9].CLK
clk => cnt[8].CLK
clk => cnt[7].CLK
clk => cnt[6].CLK
clk => cnt[5].CLK
clk => cnt[4].CLK
clk => cnt[3].CLK
clk => cnt[2].CLK
clk => cnt[1].CLK
clk => cnt[0].CLK
clk => cnt[15].CLK
rst_in => rst_out~reg0.DATAIN