mux_rab.tdf

来自「filter,很不错,大家可以看以下」· TDF 代码 · 共 46 行

--lpm_mux CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" DEVICE_FAMILY="Cyclone" LPM_SIZE=4 LPM_WIDTH=1 LPM_WIDTHS=2 data result sel
--VERSION_BEGIN 5.0 cbx_lpm_mux 2004:12:13:14:16:38:SJ cbx_mgl 2005:05:19:13:51:58:SJ  VERSION_END


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--  and other software and tools, and its AMPP partner logic 
--  functions, and any output files any of the foregoing 
--  (including device programming or simulation files), and any 
--  associated documentation or information are expressly subject 
--  to the terms and conditions of the Altera Program License 
--  Subscription Agreement, Altera MegaCore Function License 
--  Agreement, or other applicable license agreement, including, 
--  without limitation, that your use is for the sole purpose of 
--  programming logic devices manufactured by Altera and sold by 
--  Altera or its authorized distributors.  Please refer to the 
--  applicable agreement for further details.



--synthesis_resources = lut 2 
SUBDESIGN mux_rab
( 
	data[3..0]	:	input;
	result[0..0]	:	output;
	sel[1..0]	:	input;
) 
VARIABLE 
	result_node[0..0]	: WIRE;
	sel_node[1..0]	: WIRE;
	w_data28w[3..0]	: WIRE;
	w_result29w	: WIRE;
	w_result42w	: WIRE;
	w_result43w	: WIRE;

BEGIN 
	result[] = result_node[];
	result_node[] = ( w_result29w);
	sel_node[] = ( sel[1..0]);
	w_data28w[] = ( data[3..0]);
	w_result29w = w_result42w;
	w_result42w = (((w_data28w[1..1] & sel_node[0..0]) & (! w_result43w)) # (w_result43w & (w_data28w[3..3] # (! sel_node[0..0]))));
	w_result43w = (((w_data28w[0..0] & (! sel_node[1..1])) & (! sel_node[0..0])) # (sel_node[1..1] & (sel_node[0..0] # w_data28w[2..2])));
END;
--VALID FILE