i2c_altera.map.eqn

filter,很不错,大家可以看以下

--M1_r_ram_rab[6] is add_mask:inst22|r_ram_rab[6]
--operation mode is arithmetic

M1_r_ram_rab[6]_carry_eqn = M1L931;
M1_r_ram_rab[6]_lut_out = M1_r_ram_rab[6] $ (!M1_r_ram_rab[6]_carry_eqn);
M1_r_ram_rab[6] = DFFEAS(M1_r_ram_rab[6]_lut_out, PCLK, L1_rst_cnt[23], , M1L551, , , M1L21, );

--M1L141 is add_mask:inst22|r_ram_rab[6]~256
--operation mode is arithmetic

M1L141 = CARRY(M1_r_ram_rab[6] & (!M1L931));


--M1_r_ram_rab[7] is add_mask:inst22|r_ram_rab[7]
--operation mode is arithmetic

M1_r_ram_rab[7]_carry_eqn = M1L141;
M1_r_ram_rab[7]_lut_out = M1_r_ram_rab[7] $ (M1_r_ram_rab[7]_carry_eqn);
M1_r_ram_rab[7] = DFFEAS(M1_r_ram_rab[7]_lut_out, PCLK, L1_rst_cnt[23], , M1L551, , , M1L21, );

--M1L341 is add_mask:inst22|r_ram_rab[7]~260
--operation mode is arithmetic

M1L341 = CARRY(!M1L141 # !M1_r_ram_rab[7]);


--M1_r_ram_rab[8] is add_mask:inst22|r_ram_rab[8]
--operation mode is arithmetic

M1_r_ram_rab[8]_carry_eqn = M1L341;
M1_r_ram_rab[8]_lut_out = M1_r_ram_rab[8] $ (!M1_r_ram_rab[8]_carry_eqn);
M1_r_ram_rab[8] = DFFEAS(M1_r_ram_rab[8]_lut_out, PCLK, L1_rst_cnt[23], , M1L551, , , M1L21, );

--M1L541 is add_mask:inst22|r_ram_rab[8]~264
--operation mode is arithmetic

M1L541 = CARRY(M1_r_ram_rab[8] & (!M1L341));


--M1_r_ram_rab[9] is add_mask:inst22|r_ram_rab[9]
--operation mode is arithmetic

M1_r_ram_rab[9]_carry_eqn = M1L541;
M1_r_ram_rab[9]_lut_out = M1_r_ram_rab[9] $ (M1_r_ram_rab[9]_carry_eqn);
M1_r_ram_rab[9] = DFFEAS(M1_r_ram_rab[9]_lut_out, PCLK, L1_rst_cnt[23], , M1L551, , , M1L21, );

--M1L741 is add_mask:inst22|r_ram_rab[9]~268
--operation mode is arithmetic

M1L741 = CARRY(!M1L541 # !M1_r_ram_rab[9]);


--M1_r_ram_rab[10] is add_mask:inst22|r_ram_rab[10]
--operation mode is arithmetic

M1_r_ram_rab[10]_carry_eqn = M1L741;
M1_r_ram_rab[10]_lut_out = M1_r_ram_rab[10] $ (!M1_r_ram_rab[10]_carry_eqn);
M1_r_ram_rab[10] = DFFEAS(M1_r_ram_rab[10]_lut_out, PCLK, L1_rst_cnt[23], , M1L551, , , M1L21, );

--M1L941 is add_mask:inst22|r_ram_rab[10]~272
--operation mode is arithmetic

M1L941 = CARRY(M1_r_ram_rab[10] & (!M1L741));


--M1_r_ram_rab[11] is add_mask:inst22|r_ram_rab[11]
--operation mode is arithmetic

M1_r_ram_rab[11]_carry_eqn = M1L941;
M1_r_ram_rab[11]_lut_out = M1_r_ram_rab[11] $ (M1_r_ram_rab[11]_carry_eqn);
M1_r_ram_rab[11] = DFFEAS(M1_r_ram_rab[11]_lut_out, PCLK, L1_rst_cnt[23], , M1L551, , , M1L21, );

--M1L151 is add_mask:inst22|r_ram_rab[11]~276
--operation mode is arithmetic

M1L151 = CARRY(!M1L941 # !M1_r_ram_rab[11]);


--CB1L4 is add_mask:inst22|mask_rom:mask_rom0|altsyncram:altsyncram_component|altsyncram_j1t:auto_generated|decode_iga:deep_decode|w_anode38w[2]~35
--operation mode is normal

CB1L4 = M1_r_ram_rab[13] & (!M1_r_ram_rab[12]);


--CB1_w_anode25w[2] is add_mask:inst22|mask_rom:mask_rom0|altsyncram:altsyncram_component|altsyncram_j1t:auto_generated|decode_iga:deep_decode|w_anode25w[2]
--operation mode is normal

CB1_w_anode25w[2] = !M1_r_ram_rab[12] & !M1_r_ram_rab[13];


--CB1L5 is add_mask:inst22|mask_rom:mask_rom0|altsyncram:altsyncram_component|altsyncram_j1t:auto_generated|decode_iga:deep_decode|w_anode38w[2]~36
--operation mode is normal

CB1L5 = M1_r_ram_rab[12] & M1_r_ram_rab[13];


--M1_qfv_dly is add_mask:inst22|qfv_dly
--operation mode is normal

M1_qfv_dly_lut_out = !M1L621;
M1_qfv_dly = DFFEAS(M1_qfv_dly_lut_out, PCLK, VCC, , , , , , );


--M1L751 is add_mask:inst22|reduce_nor~135
--operation mode is normal

M1L751 = M1_byte_cnt[0] & (!M1_byte_cnt[1]);


--M1L851 is add_mask:inst22|reduce_nor~136
--operation mode is normal

M1L851 = !M1_byte_cnt[1] & !M1_byte_cnt[0];


--M1L11 is add_mask:inst22|always6~21
--operation mode is normal

M1L11 = M1_byte_cnt[1] & M1_byte_cnt[0];


--J1_qd_dly[7] is receiver:inst18|qd_dly[7]
--operation mode is normal

J1_qd_dly[7]_lut_out = PDATA[7];
J1_qd_dly[7] = DFFEAS(J1_qd_dly[7]_lut_out, PCLK, VCC, , , , , , );


--J1_qd_dly1[7] is receiver:inst18|qd_dly1[7]
--operation mode is normal

J1_qd_dly1[7]_lut_out = J1_qd_dly[7];
J1_qd_dly1[7] = DFFEAS(J1_qd_dly1[7]_lut_out, PCLK, VCC, , , , , , );


--J1_qfv_even is receiver:inst18|qfv_even
--operation mode is normal

J1_qfv_even_lut_out = J1_qfv_even & (J1L46 # J1L5Q & J1L1) # !J1_qfv_even & J1L5Q & J1L1;
J1_qfv_even = DFFEAS(J1_qfv_even_lut_out, PCLK, RST, , , , , , );


--J1_qfv_odd is receiver:inst18|qfv_odd
--operation mode is normal

J1_qfv_odd_lut_out = J1_qfv_odd & (J1L46 # J1L5Q & J1L2) # !J1_qfv_odd & J1L5Q & J1L2;
J1_qfv_odd = DFFEAS(J1_qfv_odd_lut_out, PCLK, RST, , , , , , );


--GB1_modulus_trigger is add_mask:inst22|altshift_taps:qd_dly1_rtl_0|shift_taps_1jg:auto_generated|cntr_0fc:cntr1|modulus_trigger
--operation mode is normal

GB1_modulus_trigger_carry_eqn = GB1L5;
GB1_modulus_trigger = GB1L1 # !GB1_modulus_trigger_carry_eqn;


--M1_qfv_dly3 is add_mask:inst22|qfv_dly3
--operation mode is normal

M1_qfv_dly3_lut_out = M1_qfv_dly2;
M1_qfv_dly3 = DFFEAS(M1_qfv_dly3_lut_out, PCLK, VCC, , , , , , );


--L1_rst_cnt[21] is reset_gen:inst21|rst_cnt[21]
--operation mode is arithmetic

L1_rst_cnt[21]_carry_eqn = L1L34;
L1_rst_cnt[21]_lut_out = L1_rst_cnt[21] $ (L1_rst_cnt[21]_carry_eqn);
L1_rst_cnt[21] = DFFEAS(L1_rst_cnt[21]_lut_out, PCLK, RST, , !L1_rst_cnt[23], , , , );

--L1L54 is reset_gen:inst21|rst_cnt[21]~203
--operation mode is arithmetic

L1L54 = CARRY(!L1L34 # !L1_rst_cnt[21]);


--J1_qd_dly[6] is receiver:inst18|qd_dly[6]
--operation mode is normal

J1_qd_dly[6]_lut_out = PDATA[6];
J1_qd_dly[6] = DFFEAS(J1_qd_dly[6]_lut_out, PCLK, VCC, , , , , , );


--J1_qd_dly1[6] is receiver:inst18|qd_dly1[6]
--operation mode is normal

J1_qd_dly1[6]_lut_out = J1_qd_dly[6];
J1_qd_dly1[6] = DFFEAS(J1_qd_dly1[6]_lut_out, PCLK, VCC, , , , , , );


--J1_qd_dly[5] is receiver:inst18|qd_dly[5]
--operation mode is normal

J1_qd_dly[5]_lut_out = PDATA[5];
J1_qd_dly[5] = DFFEAS(J1_qd_dly[5]_lut_out, PCLK, VCC, , , , , , );


--J1_qd_dly1[5] is receiver:inst18|qd_dly1[5]
--operation mode is normal

J1_qd_dly1[5]_lut_out = J1_qd_dly[5];
J1_qd_dly1[5] = DFFEAS(J1_qd_dly1[5]_lut_out, PCLK, VCC, , , , , , );


--J1_qd_dly[4] is receiver:inst18|qd_dly[4]
--operation mode is normal

J1_qd_dly[4]_lut_out = PDATA[4];
J1_qd_dly[4] = DFFEAS(J1_qd_dly[4]_lut_out, PCLK, VCC, , , , , , );


--J1_qd_dly1[4] is receiver:inst18|qd_dly1[4]
--operation mode is normal

J1_qd_dly1[4]_lut_out = J1_qd_dly[4];
J1_qd_dly1[4] = DFFEAS(J1_qd_dly1[4]_lut_out, PCLK, VCC, , , , , , );


--J1_qd_dly[3] is receiver:inst18|qd_dly[3]
--operation mode is normal

J1_qd_dly[3]_lut_out = PDATA[3];
J1_qd_dly[3] = DFFEAS(J1_qd_dly[3]_lut_out, PCLK, VCC, , , , , , );


--J1_qd_dly1[3] is receiver:inst18|qd_dly1[3]
--operation mode is normal

J1_qd_dly1[3]_lut_out = J1_qd_dly[3];
J1_qd_dly1[3] = DFFEAS(J1_qd_dly1[3]_lut_out, PCLK, VCC, , , , , , );


--J1_qd_dly[2] is receiver:inst18|qd_dly[2]
--operation mode is normal

J1_qd_dly[2]_lut_out = PDATA[2];
J1_qd_dly[2] = DFFEAS(J1_qd_dly[2]_lut_out, PCLK, VCC, , , , , , );


--J1_qd_dly1[2] is receiver:inst18|qd_dly1[2]
--operation mode is normal

J1_qd_dly1[2]_lut_out = J1_qd_dly[2];
J1_qd_dly1[2] = DFFEAS(J1_qd_dly1[2]_lut_out, PCLK, VCC, , , , , , );


--J1_qd_dly[1] is receiver:inst18|qd_dly[1]
--operation mode is normal

J1_qd_dly[1]_lut_out = PDATA[1];
J1_qd_dly[1] = DFFEAS(J1_qd_dly[1]_lut_out, PCLK, VCC, , , , , , );


--J1_qd_dly1[1] is receiver:inst18|qd_dly1[1]
--operation mode is normal

J1_qd_dly1[1]_lut_out = J1_qd_dly[1];
J1_qd_dly1[1] = DFFEAS(J1_qd_dly1[1]_lut_out, PCLK, VCC, , , , , , );


--J1_qd_dly[0] is receiver:inst18|qd_dly[0]
--operation mode is normal

J1_qd_dly[0]_lut_out = PDATA[0];
J1_qd_dly[0] = DFFEAS(J1_qd_dly[0]_lut_out, PCLK, VCC, , , , , , );


--J1_qd_dly1[0] is receiver:inst18|qd_dly1[0]
--operation mode is normal

J1_qd_dly1[0]_lut_out = J1_qd_dly[0];
J1_qd_dly1[0] = DFFEAS(J1_qd_dly1[0]_lut_out, PCLK, VCC, , , , , , );


--F1_Mega_cnt[21] is Led_run:inst14|Mega_cnt[21]
--operation mode is arithmetic

F1_Mega_cnt[21]_carry_eqn = F1L34;
F1_Mega_cnt[21]_lut_out = F1_Mega_cnt[21] $ (F1_Mega_cnt[21]_carry_eqn);
F1_Mega_cnt[21] = DFFEAS(F1_Mega_cnt[21]_lut_out, SYSCLK, RST, , , , , , );

--F1L54 is Led_run:inst14|Mega_cnt[21]~177
--operation mode is arithmetic

F1L54 = CARRY(!F1L34 # !F1_Mega_cnt[21]);


--C1_t4 is I2C:inst1|t4
--operation mode is normal

C1_t4_lut_out = C1_t3;
C1_t4 = DFFEAS(C1_t4_lut_out, K1_clkout, E1_rst_out, , P1_Deglitch, , , , );


--C1_Cmd_reg[0] is I2C:inst1|Cmd_reg[0]
--operation mode is normal

C1_Cmd_reg[0]_lut_out = B1_cmd_stop & B1_execute & (!C1_x1);
C1_Cmd_reg[0] = DFFEAS(C1_Cmd_reg[0]_lut_out, K1_clkout, E1_rst_out, , C1L51, , , , );


--C1_y0 is I2C:inst1|y0
--operation mode is normal

C1_y0_lut_out = !C1_y3 & (C1_Cmd_reg[0] # C1_y0);
C1_y0 = DFFEAS(C1_y0_lut_out, K1_clkout, E1_rst_out, , P1_Deglitch, , , , );


--C1L75 is I2C:inst1|y1~22
--operation mode is normal

C1L75 = C1_Cmd_reg[0] & (!C1_y0);


--C1_s2 is I2C:inst1|s2
--operation mode is normal

C1_s2_lut_out = C1L52;
C1_s2 = DFFEAS(C1_s2_lut_out, K1_clkout, E1_rst_out, , P1_Deglitch, , , , );


--C1_t1 is I2C:inst1|t1
--operation mode is normal

C1_t1_lut_out = C1L74;
C1_t1 = DFFEAS(C1_t1_lut_out, K1_clkout, E1_rst_out, , P1_Deglitch, , , , );


--C1L12 is I2C:inst1|SCL_node_out~24
--operation mode is normal

C1L12 = !C1_t4 & !C1L75 & !C1_s2 & !C1_t1;


--K1_clkout is clk_gen:inst19|clkout
--operat