series.map.summary

FPGA实验：用于检测输入的二进制系列

Analysis & Synthesis Status : Successful - Sun Oct 26 15:31:23 2008
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Web Edition
Revision Name : series
Top-level Entity Name : series
Family : Cyclone II
Total logic elements : 51
Total registers : 51
Total pins : 38
Total virtual pins : 0
Total memory bits : 0
Embedded Multiplier 9-bit elements : 0
Total PLLs : 0