spi_ee_f30x.c

C8051系列单片机中SPI总线读写的例程

// P0.7 - 
//
void PORT_Init (void)
{
   XBR0    =  0x0F;                    // skip SPI pins in XBAR
   XBR1    =  0x03;                    // UART0 TX and RX pins enabled
   XBR2    =  0x40;                    // Enable crossbar and weak pull-ups
   P0MDOUT |= 0x5D;                    // enable TX0, MOSI, SCK, LED and NSS as
                                       // push-pull outputs
}

//-----------------------------------------------------------------------------
// SYSCLK_Init
//-----------------------------------------------------------------------------
//
// This routine initializes the system clock to use the internal 24.5 MHz clock
// as its clock source.
//
void SYSCLK_Init (void)
{

   OSCICN = 0x07;                      // select internal oscillator as SYSCLK
                                       // source
}

//-----------------------------------------------------------------------------
// UART0_Init
//-----------------------------------------------------------------------------
//
// Configure the UART0 using Timer1, for <BAUDRATE> and 8-N-1.
//
void UART0_Init (void)
{
   SCON0 = 0x10;                       // SCON0: 8-bit variable bit rate
                                       //        level of STOP bit is ignored
                                       //        RX enabled
                                       //        ninth bits are zeros
                                       //        clear RI0 and TI0 bits
   if (SYSCLK/BAUDRATE/2/256 < 1) 
   {
      TH1 = -(SYSCLK/BAUDRATE/2);
      CKCON &= ~0x13;                  
      CKCON |= 0x10;                   // T1M = 1; SCA1:0 = xx
   } 
   else if (SYSCLK/BAUDRATE/2/256 < 4) 
   {
      TH1 = -(SYSCLK/BAUDRATE/2/4);
      CKCON &= ~0x13;
      CKCON |=  0x01;                  // T1M = 0; SCA1:0 = 01
   } 
   else if (SYSCLK/BAUDRATE/2/256 < 12) 
   {
      TH1 = -(SYSCLK/BAUDRATE/2/12);
      CKCON &= ~0x13;                  // T1M = 0; SCA1:0 = 00
   } 
   else 
   {
      TH1 = -(SYSCLK/BAUDRATE/2/48);
      CKCON &= ~0x13;
      CKCON |=  0x02;                  // T1M = 0; SCA1:0 = 10
   }

   TL1 = 0xff;                         // set Timer1 to overflow immediately
   TMOD |= 0x20;                       // TMOD: timer 1 in 8-bit autoreload
   TMOD &= ~0xD0;                      // mode
   TR1 = 1;                            // START Timer1
   TI0 = 1;                            // Indicate TX0 ready
}

//-----------------------------------------------------------------------------
// Timer0_ms
//-----------------------------------------------------------------------------
//
// Configure Timer0 to delay <ms> milliseconds before returning.
//
void Timer0_ms (unsigned ms)
{
   unsigned i;                         // millisecond counter

   TCON  &= ~0x30;                     // STOP Timer0 and clear overflow flag
   TMOD  &= ~0x0f;                     // configure Timer0 to 16-bit mode
   TMOD  |=  0x01;
   CKCON |=  0x08;                     // Timer0 counts SYSCLKs

   for (i = 0; i < ms; i++)            // count milliseconds
   {                                   
      TR0 = 0;                         // STOP Timer0
      TH0 = (-SYSCLK/1000) >> 8;       // set Timer0 to overflow in 1ms
      TL0 = -SYSCLK/1000;
      TR0 = 1;                         // START Timer0
      while (TF0 == 0);                // wait for overflow
      TF0 = 0;                         // clear overflow indicator
   }
}

//-----------------------------------------------------------------------------
// Timer0_us
//-----------------------------------------------------------------------------
//
// Configure Timer0 to delay <us> microseconds before returning.
//
void Timer0_us (unsigned us)
{
   unsigned i;                         // millisecond counter

   TCON  &= ~0x30;                     // STOP Timer0 and clear overflow flag
   TMOD  &= ~0x0f;                     // configure Timer0 to 16-bit mode
   TMOD  |=  0x01;
   CKCON |=  0x08;                     // Timer0 counts SYSCLKs

   for (i = 0; i < us; i++) {          // count microseconds
      TR0 = 0;                         // STOP Timer0
      TH0 = (-SYSCLK/1000000) >> 8;    // set Timer0 to overflow in 1us
      TL0 = -SYSCLK/1000000;
      TR0 = 1;                         // START Timer0
      while (TF0 == 0);                // wait for overflow
      TF0 = 0;                         // clear overflow indicator
   }
}

//-----------------------------------------------------------------------------
// EE_Read
//-----------------------------------------------------------------------------
//
// This routine reads and returns a single EEPROM byte whose address is
// given in <Addr>.
//
unsigned char EE_Read (unsigned Addr)
{
   unsigned char retval;               // value to return

   NSS = 0;                            // select EEPROM

   Timer0_us (1);                      // wait at least 250ns (CS setup time)

   // transmit READ opcode
   retval = SPI_Transfer(EE_READ);

   // transmit Address MSB-first
   retval = SPI_Transfer((Addr & 0xFF00) >> 8);   // transmit MSB of address

   retval = SPI_Transfer((Addr & 0x00FF));        // transmit LSB of address

   // initiate dummy transmit to read data

   retval = SPI_Transfer(0x00);

   Timer0_us (1);                      // wait at least 250ns (CS hold time)

   NSS = 1;                            // de-select EEPROM

   Timer0_us (1);                      // wait at least 500ns (CS disable time)

   return retval;
}

//-----------------------------------------------------------------------------
// EE_Write
//-----------------------------------------------------------------------------
//
// This routine writes a single EEPROM byte <value> to address <Addr>.
//
void EE_Write (unsigned Addr, unsigned char value)
{
   unsigned char retval;               // return value from SPI

   NSS = 0;                            // select EEPROM
   Timer0_us (1);                      // wait at least 250ns (CS setup time)

   // transmit WREN (Write Enable) opcode
   retval = SPI_Transfer(EE_WREN);

   Timer0_us (1);                      // wait at least 250ns (CS hold time)

   NSS = 1;                            // de-select EEPROM to set WREN latch
   Timer0_us (1);                      // wait at least 500ns (CS disable 
                                       // time)

   NSS = 0;                            // select EEPROM
   Timer0_us (1);                      // wait at least 250ns (CS setup time)

   // transmit WRITE opcode
   retval = SPI_Transfer(EE_WRITE);

   // transmit Address MSB-first
   retval = SPI_Transfer((Addr & 0xFF00) >> 8);   // transmit MSB of address

   retval = SPI_Transfer((Addr & 0x00FF));        // transmit LSB of address

   // transmit data
   retval = SPI_Transfer(value);

   Timer0_us (1);                      // wait at least 250ns (CS hold time)

   NSS = 1;                            // deselect EEPROM (initiate EEPROM 
                                       // write cycle)

   // now poll Read Status Register (RDSR) for Write operation complete
   do {

      Timer0_us (1);                   // wait at least 500ns (CS disable
                                       // time)

      NSS = 0;                         // select EEPROM to begin polling

      Timer0_us (1);                   // wait at least 250ns (CS setup time)

      retval = SPI_Transfer(EE_RDSR);

      retval = SPI_Transfer(0x00);

      Timer0_us (1);                   // wait at least 250ns (CS hold
                                       // time)
      NSS = 1;                         // de-select EEPROM

   } while (retval & 0x01);            // poll until WIP (Write In 
                                       // Progress) bit goes to '0'

   Timer0_us (1);                      // wait at least 500ns (CS disable
                                       // time)
}