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📄 buf2440.pin

📁 2440_cpld_rev015_030826.zip
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-- Copyright (C) 1988-2000 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.



N.C. = No Connect. This pin has no internal connection to the device.
VCCINT = Dedicated power pin, which MUST be connected to VCC (3.3 volts).
VCCIO = Dedicated power pin, which MUST be connected to VCC (3.3 volts).
GND = Dedicated ground pin or unused dedicated input, which MUST be connected to GND.
GND* = These I/O pins can either be left unconnected or connected to GND. Connecting these pins to GND will improve the device's immunity to noise.
RESERVED = Unused I/O pin, which MUST be left unconnected.

----------------------------------------------------------------------------

CHIP "buf2440" ASSIGNED TO AN EPM7032AELC44-4
nReset                           : 1
GND                              : 2
VCCINT                           : 3
nGCS3                            : 4
nGCS4                            : 5
BUFDIR                           : 6
TDI                              : 7
nDACK                            : 8
nWAIT_OD                         : 9
GND                              : 10
nFRE                             : 11
nFWE                             : 12
TMS                              : 13
nGCS0                            : 14
VCCIO                            : 15
BUFDIR1                          : 16
nGCS2                            : 17
nOE                              : 18
nEXTBUS                          : 19
dmaMode0                         : 20
dmaMode1                         : 21
GND                              : 22
VCCINT                           : 23
nDREQ                            : 24
GND*                             : 25
GND*                             : 26
GND*                             : 27
GND*                             : 28
GND*                             : 29
GND                              : 30
data3                            : 31
TCK                              : 32
nGCS6                            : 33
data2                            : 34
VCCIO                            : 35
nGCS1                            : 36
nDmaStart                        : 37
TDO                              : 38
data0                            : 39
data1                            : 40
nGCS5                            : 41
GND                              : 42
clock                            : 43
GND                              : 44

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