⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 din5.fnsim.qmsg

📁 中频验波是对信号进行中频直接采样和数字正交处理后,产生的I 支路和Q 支路信号序列在时间上会错开一个采样间隔,需要进行定序处理,恢复成同步输出的I、Q 两路信号序列。现代雷达普遍采用相参信号处理,而如
💻 QMSG
📖 第 1 页 / 共 5 页
字号:
{ "Info" "ISGN_ELABORATION_HEADER" "rom:inst3\|altsyncram:altsyncram_component " "Info: Elaborated megafunction instantiation \"rom:inst3\|altsyncram:altsyncram_component\"" {  } { { "rom.vhd" "" { Text "E:/中频检波/din5/rom.vhd" 80 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_vk61.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_vk61.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_vk61 " "Info: Found entity 1: altsyncram_vk61" {  } { { "db/altsyncram_vk61.tdf" "" { Text "E:/中频检波/din5/db/altsyncram_vk61.tdf" 36 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_vk61 rom:inst3\|altsyncram:altsyncram_component\|altsyncram_vk61:auto_generated " "Info: Elaborating entity \"altsyncram_vk61\" for hierarchy \"rom:inst3\|altsyncram:altsyncram_component\|altsyncram_vk61:auto_generated\"" {  } { { "altsyncram.tdf" "auto_generated" { Text "d:/quartus60/libraries/megafunctions/altsyncram.tdf" 905 4 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Warning" "WCDB_CDB_LESS_INI_CONTENT" "4096 1024 " "Warning: Memory depth value (4096) in design file differs from memory depth value (1024) in Memory Initialization File -- setting initial value for remaining addresses to 0" {  } { { "db/altsyncram_vk61.tdf" "" { Text "E:/中频检波/din5/db/altsyncram_vk61.tdf" 43 2 0 } }  } 0 0 "Memory depth value (%1!d!) in design file differs from memory depth value (%2!d!) in Memory Initialization File -- setting initial value for remaining addresses to 0" 0 0}
{ "Warning" "WSGN_SEARCH_FILE" "conter.vhd 2 1 " "Warning: Using design file conter.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 conter-SYN " "Info: Found design unit 1: conter-SYN" {  } { { "conter.vhd" "" { Text "E:/中频检波/din5/conter.vhd" 48 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 conter " "Info: Found entity 1: conter" {  } { { "conter.vhd" "" { Text "E:/中频检波/din5/conter.vhd" 39 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!d! design units and %3!d! entities in project" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "conter conter:inst4 " "Info: Elaborating entity \"conter\" for hierarchy \"conter:inst4\"" {  } { { "din5.bdf" "inst4" { Schematic "E:/中频检波/din5/din5.bdf" { { 192 88 232 256 "inst4" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/quartus60/libraries/megafunctions/lpm_counter.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/quartus60/libraries/megafunctions/lpm_counter.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_counter " "Info: Found entity 1: lpm_counter" {  } { { "lpm_counter.tdf" "" { Text "d:/quartus60/libraries/megafunctions/lpm_counter.tdf" 233 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_counter conter:inst4\|lpm_counter:lpm_counter_component " "Info: Elaborating entity \"lpm_counter\" for hierarchy \"conter:inst4\|lpm_counter:lpm_counter_component\"" {  } { { "conter.vhd" "lpm_counter_component" { Text "E:/中频检波/din5/conter.vhd" 70 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "conter:inst4\|lpm_counter:lpm_counter_component " "Info: Elaborated megafunction instantiation \"conter:inst4\|lpm_counter:lpm_counter_component\"" {  } { { "conter.vhd" "" { Text "E:/中频检波/din5/conter.vhd" 70 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/cntr_leh.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/cntr_leh.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 cntr_leh " "Info: Found entity 1: cntr_leh" {  } { { "db/cntr_leh.tdf" "" { Text "E:/中频检波/din5/db/cntr_leh.tdf" 25 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cntr_leh conter:inst4\|lpm_counter:lpm_counter_component\|cntr_leh:auto_generated " "Info: Elaborating entity \"cntr_leh\" for hierarchy \"conter:inst4\|lpm_counter:lpm_counter_component\|cntr_leh:auto_generated\"" {  } { { "lpm_counter.tdf" "auto_generated" { Text "d:/quartus60/libraries/megafunctions/lpm_counter.tdf" 257 3 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/quartus60/libraries/megafunctions/lpm_add_sub.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/quartus60/libraries/megafunctions/lpm_add_sub.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_add_sub " "Info: Found entity 1: lpm_add_sub" {  } { { "lpm_add_sub.tdf" "" { Text "d:/quartus60/libraries/megafunctions/lpm_add_sub.tdf" 100 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "xor_add:inst6\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"xor_add:inst6\|lpm_add_sub:Add0\"" {  } { { "d:/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" 926 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/quartus60/libraries/megafunctions/addcore.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/quartus60/libraries/megafunctions/addcore.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 addcore " "Info: Found entity 1: addcore" {  } { { "addcore.tdf" "" { Text "d:/quartus60/libraries/megafunctions/addcore.tdf" 73 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "xor_add:inst6\|lpm_add_sub:Add0\|addcore:adder xor_add:inst6\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"xor_add:inst6\|lpm_add_sub:Add0\|addcore:adder\", which is child of megafunction instantiation \"xor_add:inst6\|lpm_add_sub:Add0\"" {  } { { "lpm_add_sub.tdf" "" { Text "d:/quartus60/libraries/megafunctions/lpm_add_sub.tdf" 266 4 0 } } { "d:/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" 926 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "xor_add:inst6\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"xor_add:inst6\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 12 " "Info: Parameter \"LPM_WIDTH\" = \"12\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT NO " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"NO\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "d:/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" 926 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/quartus60/libraries/megafunctions/a_csnbuffer.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/quartus60/libraries/megafunctions/a_csnbuffer.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 a_csnbuffer " "Info: Found entity 1: a_csnbuffer" {  } { { "a_csnbuffer.tdf" "" { Text "d:/quartus60/libraries/megafunctions/a_csnbuffer.tdf" 10 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "xor_add:inst6\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:oflow_node xor_add:inst6\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"xor_add:inst6\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:oflow_node\", which is child of megafunction instantiation \"xor_add:inst6\|lpm_add_sub:Add0\"" {  } { { "addcore.tdf" "" { Text "d:/quartus60/libraries/megafunctions/addcore.tdf" 94 2 0 } } { "d:/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" 926 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "xor_add:inst6\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"xor_add:inst6\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 12 " "Info: Parameter \"LPM_WIDTH\" = \"12\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT NO " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"NO\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "d:/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" 926 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "xor_add:inst6\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node xor_add:inst6\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"xor_add:inst6\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node\", which is child of megafunction instantiation \"xor_add:inst6\|lpm_add_sub:Add0\"" {  } { { "addcore.tdf" "" { Text "d:/quartus60/libraries/megafunctions/addcore.tdf" 120 6 0 } } { "d:/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" 926 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "xor_add:inst6\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"xor_add:inst6\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 12 " "Info: Parameter \"LPM_WIDTH\" = \"12\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT NO " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"NO\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "d:/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" 926 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/quartus60/libraries/megafunctions/altshift.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/quartus60/libraries/megafunctions/altshift.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altshift " "Info: Found entity 1: altshift" {  } { { "altshift.tdf" "" { Text "d:/quartus60/libraries/megafunctions/altshift.tdf" 28 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -