din5.fit.qmsg

中频验波是对信号进行中频直接采样和数字正交处理后,产生的I 支路和Q 支路信号序列在时间上会错开一个采样间隔,需要进行定序处理,恢复成同步输出的I、Q 两路信号序列。现代雷达普遍采用相参信号处理,而如

{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:00 " "Info: Fitter placement operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter placement operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "3.821 ns memory memory " "Info: Estimated most critical path is memory to memory delay of 3.821 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns rom1:inst\|altsyncram:altsyncram_component\|altsyncram_fm51:auto_generated\|ram_block1a11~porta_address_reg9 1 MEM M4K_X13_Y6 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = M4K_X13_Y6; Fanout = 1; MEM Node = 'rom1:inst\|altsyncram:altsyncram_component\|altsyncram_fm51:auto_generated\|ram_block1a11~porta_address_reg9'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { rom1:inst|altsyncram:altsyncram_component|altsyncram_fm51:auto_generated|ram_block1a11~porta_address_reg9 } "NODE_NAME" } } { "db/altsyncram_fm51.tdf" "" { Text "C:/Documents and Settings/USER/桌面/中频检波/din5/db/altsyncram_fm51.tdf" 263 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(3.821 ns) 3.821 ns rom1:inst\|altsyncram:altsyncram_component\|altsyncram_fm51:auto_generated\|q_a\[11\] 2 MEM M4K_X13_Y6 2 " "Info: 2: + IC(0.000 ns) + CELL(3.821 ns) = 3.821 ns; Loc. = M4K_X13_Y6; Fanout = 2; MEM Node = 'rom1:inst\|altsyncram:altsyncram_component\|altsyncram_fm51:auto_generated\|q_a\[11\]'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.821 ns" { rom1:inst|altsyncram:altsyncram_component|altsyncram_fm51:auto_generated|ram_block1a11~porta_address_reg9 rom1:inst|altsyncram:altsyncram_component|altsyncram_fm51:auto_generated|q_a[11] } "NODE_NAME" } } { "db/altsyncram_fm51.tdf" "" { Text "C:/Documents and Settings/USER/桌面/中频检波/din5/db/altsyncram_fm51.tdf" 40 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.821 ns ( 100.00 % ) " "Info: Total cell delay = 3.821 ns ( 100.00 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.821 ns" { rom1:inst|altsyncram:altsyncram_component|altsyncram_fm51:auto_generated|ram_block1a11~porta_address_reg9 rom1:inst|altsyncram:altsyncram_component|altsyncram_fm51:auto_generated|q_a[11] } "NODE_NAME" } }  } 0 0 "Estimated most critical path is %2!s! to %3!s! delay of %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0 0 "Fitter routing operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "1 2 " "Info: Average interconnect usage is 1% of the available device resources. Peak interconnect usage is 2%" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "x14_y0 x27_y14 " "Info: The peak interconnect region extends from location x14_y0 to location x27_y14" {  } {  } 0 0 "The peak interconnect region extends from location %1!s! to location %2!s!" 0 0}  } {  } 0 0 "Average interconnect usage is %1!d!%% of the available device resources. Peak interconnect usage is %2!d!%%" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:00 " "Info: Fitter routing operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter routing operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Info: Optimizations that may affect the design's routability were skipped" {  } {  } 0 0 "Optimizations that may affect the design's routability were skipped" 0 0} { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_TIMING" "" "Info: Optimizations that may affect the design's timing were skipped" {  } {  } 0 0 "Optimizations that may affect the design's timing were skipped" 0 0}  } {  } 0 0 "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." 0 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Fixed Delay Chain Operation " "Info: Completed Fixed Delay Chain Operation" {  } {  } 0 0 "Completed %1!s!" 0 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Delay Chain Operation " "Info: Completed Auto Delay Chain Operation" {  } {  } 0 0 "Completed %1!s!" 0 0}
{ "Info" "IFSAC_FSAC_RAM_METASTABILITY_INFO" "" "Info: Design uses memory blocks. Violating setup or hold times of memory block address registers could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." {  } {  } 0 0 "Design uses memory blocks. Violating setup or hold times of memory block address registers could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 0 s Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Wed Nov 05 16:31:55 2008 " "Info: Processing ended: Wed Nov 05 16:31:55 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:04 " "Info: Elapsed time: 00:00:04" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}
{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "C:/Documents and Settings/USER/桌面/中频检波/din5/din5.fit.smsg " "Info: Generated suppressed messages file C:/Documents and Settings/USER/桌面/中频检波/din5/din5.fit.smsg" {  } {  } 0 0 "Generated suppressed messages file %1!s!" 0 0}