din5.sim.rpt

现代雷达普遍采用相参信号处理,而如何获得高精度基带数字正交( I , Q) 信号是整个系统信号处理成败的关键,以前通常的做法是采用模拟相位检波器得到I、Q信号,其正交性能一般为:幅度平衡在2 ％ 左右

; Preserve fewer signal transitions to reduce memory requirements                            ; On                                     ; On            ;
; Trigger vector comparison with the specified mode                                          ; INPUT_EDGE                             ; INPUT_EDGE    ;
; Disable setup and hold time violations detection in input registers of bi-directional pins ; Off                                    ; Off           ;
; Overwrite Waveform Inputs With Simulation Outputs                                          ; Off                                    ;               ;
; Glitch Filtering                                                                           ; Off                                    ; Off           ;
+--------------------------------------------------------------------------------------------+----------------------------------------+---------------+


+----------------------+
; Simulation Waveforms ;
+----------------------+
Waveform report data cannot be output to ASCII.
Please use Quartus II to view the waveform report data.


+-------------------------------------------------------------------------------------------+
; |din5|rom:inst3|altsyncram:altsyncram_component|altsyncram_vk61:auto_generated|ALTSYNCRAM ;
+-------------------------------------------------------------------------------------------+
Memory report data cannot be output to ASCII.
Please use Quartus II to view the memory report data.


+--------------------------------------------------------------------+
; Coverage Summary                                                   ;
+-----------------------------------------------------+--------------+
; Type                                                ; Value        ;
+-----------------------------------------------------+--------------+
; Total coverage as a percentage                      ;      80.71 % ;
; Total nodes checked                                 ; 997          ;
; Total output ports checked                          ; 1068         ;
; Total output ports with complete 1/0-value coverage ; 862          ;
; Total output ports with no 1/0-value coverage       ; 206          ;
; Total output ports with no 1-value coverage         ; 206          ;
; Total output ports with no 0-value coverage         ; 206          ;
+-----------------------------------------------------+--------------+


The following table displays output ports that toggle between 1 and 0 during simulation.
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Complete 1/0-Value Coverage                                                                                                                                                                                               ;
+-----------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------+------------------+
; Node Name                                                                                           ; Output Port Name                                                                                 ; Output Port Type ;
+-----------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------+------------------+
; |din5|clk2M                                                                                         ; |din5|clk2M                                                                                      ; pin_out          ;
; |din5|clk8M                                                                                         ; |din5|clk8M                                                                                      ; pin_out          ;
; |din5|clk                                                                                           ; |din5|clk                                                                                        ; out              ;
; |din5|clk4M                                                                                         ; |din5|clk4M                                                                                      ; pin_out          ;
; |din5|I_out[11]                                                                                     ; |din5|I_out[11]                                                                                  ; pin_out          ;
; |din5|I_out[10]                                                                                     ; |din5|I_out[10]                                                                                  ; pin_out          ;
; |din5|I_out[9]                                                                                      ; |din5|I_out[9]                                                                                   ; pin_out          ;
; |din5|I_out[8]                                                                                      ; |din5|I_out[8]                                                                                   ; pin_out          ;
; |din5|I_out[7]                                                                                      ; |din5|I_out[7]                                                                                   ; pin_out          ;
; |din5|I_out[6]                                                                                      ; |din5|I_out[6]                                                                                   ; pin_out          ;
; |din5|I_out[5]                                                                                      ; |din5|I_out[5]                                                                                   ; pin_out          ;
; |din5|I_out[4]                                                                                      ; |din5|I_out[4]                                                                                   ; pin_out          ;
; |din5|I_out[3]                                                                                      ; |din5|I_out[3]                                                                                   ; pin_out          ;
; |din5|I_out[2]                                                                                      ; |din5|I_out[2]                                                                                   ; pin_out          ;
; |din5|I_out[1]                                                                                      ; |din5|I_out[1]                                                                                   ; pin_out          ;
; |din5|I_out[0]                                                                                      ; |din5|I_out[0]                                                                                   ; pin_out          ;
; |din5|inst2[11]                                                                                     ; |din5|inst2[11]                                                                                  ; out              ;
; |din5|inst2[10]                                                                                     ; |din5|inst2[10]                                                                                  ; out              ;
; |din5|inst2[9]                                                                                      ; |din5|inst2[9]                                                                                   ; out              ;
; |din5|inst2[8]                                                                                      ; |din5|inst2[8]                                                                                   ; out              ;
; |din5|inst2[7]                                                                                      ; |din5|inst2[7]                                                                                   ; out              ;
; |din5|inst2[6]                                                                                      ; |din5|inst2[6]                                                                                   ; out              ;
; |din5|inst2[5]                                                                                      ; |din5|inst2[5]                                                                                   ; out              ;
; |din5|inst2[4]                                                                                      ; |din5|inst2[4]                                                                                   ; out              ;
; |din5|inst2[3]                                                                                      ; |din5|inst2[3]                                                                                   ; out              ;
; |din5|inst2[2]                                                                                      ; |din5|inst2[2]                                                                                   ; out              ;
; |din5|inst2[1]                                                                                      ; |din5|inst2[1]                                                                                   ; out              ;
; |din5|inst2[0]                                                                                      ; |din5|inst2[0]                                                                                   ; out              ;
; |din5|Q_out[10]                                                                                     ; |din5|Q_out[10]                                                                                  ; pin_out          ;
; |din5|Q_out[9]                                                                                      ; |din5|Q_out[9]                                                                                   ; pin_out          ;
; |din5|Q_out[8]                                                                                      ; |din5|Q_out[8]                                                                                   ; pin_out          ;
; |din5|Q_out[7]                                                                                      ; |din5|Q_out[7]                                                                                   ; pin_out          ;