📄 utx.v
字号:
begin
if(Uloop_Fifo_Data_Cnt>5'b01101)
Uloop_Fifo_Rdy <=#UTX_DLY 1'b1;
else
Uloop_Fifo_Rdy <=#UTX_DLY 1'b0;
if(Uloop_Fifo_Data_Cnt>5'b10010)
Uloop_Fifo_Afull <=#UTX_DLY 1'b1;
else
Uloop_Fifo_Afull <=#UTX_DLY 1'b0;
end
end
always @(posedge Rst or posedge Clk_Sys)
begin
if(Rst==1'b1)
Utx_Cell_Fifo_Afull <= 1'b0;
else if(Utx_Cell_Fifo_Write_Dcnt>5'b10001)
Utx_Cell_Fifo_Afull <=#UTX_DLY 1'b1;
else
Utx_Cell_Fifo_Afull <=#UTX_DLY 1'b0;
end
//******************************************************************************//
// poll_state_machine //
//******************************************************************************//
always @(posedge Rst or posedge Clk_UTP)
begin
if(Rst==1'b1)
begin
sUtx_Poll <= UTX_POLL_IDLE;
Utx_Group_Cnt_Buffer <= 3'b000;
Utx_Group_Cnt <= 3'b000;
U2txaddr01 <= 8'h00;
U2txaddr <= 8'h00;
U2txaddr_Buffer <= 8'h00;
Addr_Rise <= 1'b0;
Utx_Addr_Fifo_Din <= 11'h000;
Utx_Addr_Fifo_Wen <= 1'b0;
Utx_Status_Table <= {9{1'b0}};
end
else
begin
case(sUtx_Poll)
UTX_POLL_IDLE:
begin
if(Start_Dn!=1'b1) //<A NAME="非正常工作状态">
begin
sUtx_Poll <=#UTX_DLY UTX_POLL_IDLE;
end
else if(U2_Loop_Ctrl[0]==1'b1)
begin
sUtx_Poll <=#UTX_DLY UTX_POLL_ADDR_RISE;
if( Utx_Addr_Fifo_Full!=1'b1 ) //<A NAME="轮询端口有数据发送">
begin
//Utx_Status_Table[{Utx_Group_Cnt_Buffer,U2txaddr_Buffer[5:0]}] <=#UTX_DLY 1'b1;
Utx_Addr_Fifo_Din <=#UTX_DLY {Utx_Group_Cnt_Buffer,U2txaddr_Buffer};
Utx_Addr_Fifo_Wen <=#UTX_DLY 1'b1; //<A NAME="端口信息写入FIFO">
Addr_Rise <=#UTX_DLY 1'b1;
U2txaddr <=#UTX_DLY U2txaddr01;
end
else
begin
Utx_Addr_Fifo_Wen <=#UTX_DLY 1'b0;
sUtx_Poll <=#UTX_DLY UTX_POLL_ADDR_RISE;
U2txaddr <=#UTX_DLY U2txaddr_Buffer;
Addr_Rise <=#UTX_DLY 1'b0;
end
end
else if(U2_Loop_Ctrl[1]==1'b1)
begin
sUtx_Poll <=#UTX_DLY UTX_POLL_ADDR_RISE;
Utx_Addr_Fifo_Wen <=#UTX_DLY 1'b0;
U2txaddr <=#UTX_DLY U2txaddr_Tx_Buffer;
end
else if(Translate==1'b1) //<A NAME="需要选定端口发送">
begin
sUtx_Poll <=#UTX_DLY UTX_POLL_ADDR_RISE;
U2txaddr <=#UTX_DLY U2txaddr_Tx_Buffer; //<A NAME="送出要选定端口地址">
Addr_Rise <=#UTX_DLY 1'b0;
Utx_Status_Table[{Check_Group_Buff,Utx_Cell_Fifo_Dout[5:0]}] <=#UTX_DLY 1'b0 ;
end
else if(U2txaddr_Buffer==U2txaddr_Tx_Buffer && Check_Group_Buff==Utx_Group_Cnt_Buffer)
begin
sUtx_Poll <=#UTX_DLY UTX_POLL_ADDR_RISE;
U2txaddr <=#UTX_DLY U2txaddr01;
Addr_Rise <=#UTX_DLY 1'b1;
end
else if( Utx_Addr_Fifo_Full!=1'b1) //<A NAME="没有端口要选定且地址FIFO非满">
// else if( Utx_Addr_Fifo_Full!=1'b1 && (U2txaddr_Buffer!=U2txaddr_Tx_Buffer)
begin //<A NAME="轮询端口地址增加">
sUtx_Poll <=#UTX_DLY UTX_POLL_ADDR_RISE;
Addr_Rise <=#UTX_DLY 1'b1;
U2txaddr <=#UTX_DLY U2txaddr01; //<A NAME="送出轮询端口地址">
if(Current_Txclav==1'b1) //<A NAME="轮询端口有数据发送">
begin
Utx_Status_Table[{Utx_Group_Cnt_Buffer,U2txaddr_Buffer[5:0]}] <=#UTX_DLY 1'b1;
Utx_Addr_Fifo_Din <=#UTX_DLY {Utx_Group_Cnt_Buffer,U2txaddr_Buffer};
Utx_Addr_Fifo_Wen <=#UTX_DLY 1'b1; //<A NAME="端口信息写入FIFO">
end
else
Utx_Addr_Fifo_Wen <=#UTX_DLY 1'b0;
end
else //<A NAME="地址FIFO满">
begin
sUtx_Poll <=#UTX_DLY UTX_POLL_ADDR_RISE;
U2txaddr <=#UTX_DLY U2txaddr_Buffer;
Addr_Rise <=#UTX_DLY 1'b0;
end
end
UTX_POLL_ADDR_RISE:
begin
sUtx_Poll <=#UTX_DLY UTX_POLL_IDLE;
Utx_Addr_Fifo_Wen <=#UTX_DLY 1'b0;
U2txaddr <=#UTX_DLY 8'hff;
if(Addr_Rise==1'b0) //<A NAME="地址不增加">
begin
U2txaddr01 <=#UTX_DLY U2txaddr01;
end
else
begin
Utx_Group_Cnt_Buffer <=#UTX_DLY Utx_Group_Cnt; //<A NAME="缓存工作组信息">
U2txaddr_Buffer <=#UTX_DLY U2txaddr01; //<A NAME="缓存地址信息">
if(U2txaddr01==8'b00101111) //<A NAME="地址最大，转换组">
begin
U2txaddr01 <=#UTX_DLY 8'b00000000;
case(Utx_Group_Cnt)
3'b000:
begin
if(U2_Slot_En[1]==1'b1)
Utx_Group_Cnt <=#UTX_DLY 3'b001;
else if(U2_Slot_En[2]==1'b1)
Utx_Group_Cnt <=#UTX_DLY 3'b010;
else if(U2_Slot_En[3]==1'b1)
Utx_Group_Cnt <=#UTX_DLY 3'b011;
else if(U2_Slot_En[4]==1'b1)
Utx_Group_Cnt <=#UTX_DLY 3'b100;
else
Utx_Group_Cnt <=#UTX_DLY 3'b000;
end
3'b001:
begin
if(U2_Slot_En[2]==1'b1)
Utx_Group_Cnt <=#UTX_DLY 3'b010;
else if(U2_Slot_En[3]==1'b1 )
Utx_Group_Cnt <=#UTX_DLY 3'b011;
else if(U2_Slot_En[4]==1'b1)
Utx_Group_Cnt <=#UTX_DLY 3'b100;
else if(U2_Slot_En[0]==1'b1)
Utx_Group_Cnt <=#UTX_DLY 3'b000;
else
Utx_Group_Cnt <=#UTX_DLY 3'b001;
end
3'b010:
begin
if(U2_Slot_En[3]==1'b1)
Utx_Group_Cnt <=#UTX_DLY 3'b011;
else if(U2_Slot_En[4]==1'b1)
Utx_Group_Cnt <=#UTX_DLY 3'b100;
else if(U2_Slot_En[0]==1'b1)
Utx_Group_Cnt <=#UTX_DLY 3'b000;
else if(U2_Slot_En[1]==1'b1)
Utx_Group_Cnt <=#UTX_DLY 3'b001;
else
Utx_Group_Cnt <=#UTX_DLY 3'b010;
end
3'b011:
begin
if(U2_Slot_En[4]==1'b1)
Utx_Group_Cnt <=#UTX_DLY 3'b100;
else if(U2_Slot_En[0]==1'b1)
Utx_Group_Cnt <=#UTX_DLY 3'b000;
else if(U2_Slot_En [1]==1'b1)
Utx_Group_Cnt <=#UTX_DLY 3'b001;
else if(U2_Slot_En [2]==1'b1)
Utx_Group_Cnt <=#UTX_DLY 3'b010;
else
Utx_Group_Cnt <=#UTX_DLY 3'b011;
end
3'b100:
begin
if(U2_Slot_En[0]==1'b1 )
Utx_Group_Cnt <=#UTX_DLY 3'b000;
else if(U2_Slot_En[1]==1'b1 )
Utx_Group_Cnt <=#UTX_DLY 3'b001;
else if(U2_Slot_En[2]==1'b1 )
Utx_Group_Cnt <=#UTX_DLY 3'b010;
else if(U2_Slot_En[3]==1'b1 )
Utx_Group_Cnt <=#UTX_DLY 3'b011;
else
Utx_Group_Cnt <=#UTX_DLY 3'b100;
end
default:
Utx_Group_Cnt <=#UTX_DLY 3'b000;
endcase
end
else
U2txaddr01 <=#UTX_DLY U2txaddr01+8'h01;
end
end
default:
sUtx_Poll <=#UTX_DLY UTX_POLL_IDLE;
endcase
end
end
//******************************************************************************//
// utx_state_machine //
//******************************************************************************//
always @(posedge Rst or posedge Clk_UTP)
begin
if(Rst==1'b1)
begin
sUtx_State <= UTX_IDLE;
Translate <= 1'b0;
U2txenb <= 5'b11111;
U2txenb_Buffer <= 5'b11111;
U2txsoc <= 1'b0;
U2txdata <= 16'h0000;
Utx_Payload_Cnt <= 4'b0000;
Utx_Cell_Fifo_Ren <= 1'b0;
Checked <= 1'b0;
Uloop_Payload_Cnt <= 4'b0000;
U2txaddr_Tx_Buffer <= 8'hff;
Uloop_Checked <= 1'b0;
Mloop_Fifo_Wen <= 1'b0;
Mloop_Fifo_Din <= {33{1'b0}};
U2group_Buff <= 3'b111;
Data_en_in <= 1'b0;
Init_in <= 1'b1;
Uloop_Addr_Valid <= 1'b0;
Uloop_Cnt_Add <= 1'b0;
Utx_State_Buff <= 5'b00000;
Uloop_Fifo_Ren <= 1'b0;
Check_Group_Buff <= 3'b111;
end
else
begin
Utx_State_Buff <= #UTX_DLY sUtx_State;
case (sUtx_State)
UTX_IDLE:
begin
if(Start_Dn==1'b1)
begin
Uloop_Cnt_Add <=#UTX_DLY 1'b0;
Data_en_in <=#UTX_DLY 1'b0;
Init_in <=#UTX_DLY 1'b1;
Mloop_Fifo_Wen <=#UTX_DLY 1'b0;
Uloop_Payload_Cnt <=#UTX_DLY 4'b0000;
Utx_Payload_Cnt <=#UTX_DLY 4'b0000;
if(U2_Loop_Ctrl==2'b00 && Utx_Cell_Fifo_Rdy==1'b1) //<A NAME="正常工作且有信元准备好"> 这条语句可能有问题
begin
sUtx_State <=#UTX_DLY UTX_WAIT;
Utx_Cell_Fifo_Ren <=#UTX_DLY 1'b1; //<A NAME="读信号有效">
end
else if(U2_Loop_Ctrl==2'b10 && Uloop_Fifo_Rdy==1'b1) //<A NAME="A环回">
begin
sUtx_State <=#UTX_DLY UTX_ULOOP_WAIT;
Uloop_Fifo_Ren <=#UTX_DLY 1'b1;
end
else if(U2_Loop_Ctrl==2'b01 && Mloop_Fifo_Full!=1'b1 && Utx_Cell_Fifo_Empty!=1'b1) //<A NAME="B环回">
begin
sUtx_State <=#UTX_DLY UTX_MLOOP_WAIT;
Utx_Cell_Fifo_Ren <=#UTX_DLY 1'b1;
end
else
begin
sUtx_State <=#UTX_DLY UTX_IDLE;
Utx_Cell_Fifo_Ren <=#UTX_DLY 1'b0;
Uloop_Fifo_Ren <=#UTX_DLY 1'b0;
Utx_Cell_Fifo_Ren <=#UTX_DLY 1'b0;
end
end
else
sUtx_State <=#UTX_DLY UTX_IDLE;
end
UTX_WAIT: //<A NAME="读FIFO等待">
begin
if(Checked==1'b1) //<A NAME="信元描述字段检查通过">
begin
sUtx_State <=#UTX_DLY UTX_HEAD1;
Utx_Cell_Fifo_Ren <=#UTX_DLY 1'b0;
U2txenb_Buffer <=#UTX_DLY ~Utx_Cell_Fifo_Dout[12:8];
end
else
begin
sUtx_State <=#UTX_DLY UTX_CHECK;
Utx_Cell_Fifo_Ren <=#UTX_DLY 1'b0;
end
end
UTX_CHECK: //<A NAME="检验信元描述字段">
begin
if(Utx_Cell_Fifo_Dout[32]==1'b1) //<A NAME="信元第一个DWARD">
begin
if(Utx_Cell_Fifo_Dout[31]==1'b1) //<A NAME="有正确的完整信元">
begin
sUtx_State <=#UTX_DLY UTX_WAIT;
U2txaddr_Tx_Buffer <=#UTX_DLY Utx_Cell_Fifo_Dout[7:0];
U2group_Buff <=#UTX_DLY Utx_Cell_Fifo_Dout[15:13];
Checked <=#UTX_DLY 1'b1; //<A NAME="检查通过">
Utx_Cell_Fifo_Ren <=#UTX_DLY 1'b1; //<A NAME="读信元信号有效">
Translate <=#UTX_DLY 1'b1; //<A NAME="需要选定端口">
end
else //if(Utx_Cell_Fifo_Dout[7:0]!=U2txaddr_Buffer || Utx_Cell_Fifo_Dout[15:13]!=Utx_Group_Cnt_Buffer ) //<A NAME="操作端口非当前轮询端口">
begin
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -