hplmsp430interruptnmip.nc

tinyos2.0版本驱动

/* "Copyright (c) 2000-2005 The Regents of the University of California.  
 * All rights reserved.
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 * documentation for any purpose, without fee, and without written agreement
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 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
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 * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
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/**
 * @author Joe Polastre
 */
module HplMsp430InterruptNMIP
{
  provides interface HplMsp430Interrupt as NMI;
  provides interface HplMsp430Interrupt as OF;
  provides interface HplMsp430Interrupt as ACCV;
  uses interface PlatformInterrupt;
}
implementation
{
  TOSH_SIGNAL(NMI_VECTOR)
  {
    volatile int n = IFG1;
    if (n & NMIIFG) { signal NMI.fired(); }
    else if (n & OFIFG)  { signal OF.fired(); }
    else if (FCTL3 & ACCVIFG) { signal ACCV.fired(); }
    call PlatformInterrupt.postAmble();
  }

  default async event void NMI.fired() { call NMI.clear(); }
  default async event void OF.fired() { call OF.clear(); }
  default async event void ACCV.fired() { call ACCV.clear(); }

  async command void NMI.enable() {
    volatile uint16_t _watchdog;
    atomic {
      _watchdog = WDTCTL;
      _watchdog = WDTPW | (_watchdog & 0x0FF);
      _watchdog |= WDTNMI;
      WDTCTL = _watchdog;
      IE1 |= NMIIE;
    }
  }
  async command void OF.enable() { atomic IE1 |= OFIE; }
  async command void ACCV.enable() { atomic IE1 |= ACCVIE; }

  async command void NMI.disable() {
    volatile uint16_t _watchdog;
    atomic {
      _watchdog = WDTCTL;
      _watchdog = WDTPW | (_watchdog & 0x0FF);
      _watchdog &= ~WDTNMI;
      WDTCTL = _watchdog;
      IE1 &= ~NMIIE;
    }
  }
  async command void OF.disable() { atomic IE1 &= ~OFIE; }
  async command void ACCV.disable() { atomic IE1 &= ~ACCVIE; }

  async command void NMI.clear() { atomic IFG1 &= ~NMIIFG; }
  async command void OF.clear() { atomic IFG1 &= ~OFIFG; }
  async command void ACCV.clear() { atomic FCTL3 &= ~ACCVIFG; }

  async command bool NMI.getValue() { bool b; atomic b=(IFG1 & NMIIFG) & 0x01; return b; }
  async command bool OF.getValue() { bool b; atomic b=(IFG1 & OFIFG) & 0x01; return b; }
  async command bool ACCV.getValue() { bool b; atomic b=(FCTL3 & ACCVIFG) & 0x01; return b; }

  async command void NMI.edge(bool l2h) { 
    volatile uint16_t _watchdog;
    atomic {
      _watchdog = WDTCTL;
      _watchdog = WDTPW | (_watchdog & 0x0FF);
      if (l2h)  _watchdog &= ~(WDTNMIES); 
      else      _watchdog |=  (WDTNMIES);
      WDTCTL = _watchdog;
    }
  }
  // edge does not apply to oscillator faults
  async command void OF.edge(bool l2h) { }
  // edge does not apply to flash access violations
  async command void ACCV.edge(bool l2h) { }
}