hplmsp430dmac.nc

tinyos2.0版本驱动

/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
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 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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/*
 * "Copyright (c) 2000-2005 The Regents of the University of California.  
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement
 * is hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
 * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
 */

/**
 * @author Ben Greenstein <[e-mail]>
 * @author Jonathan Hui <[e-mail]>
 * @version $Revision: 1.1 $ $Date: 2008/06/12 14:02:25 $
 */

configuration HplMsp430DmaC {

  provides interface HplMsp430DmaControl as Control;
  provides interface HplMsp430DmaChannel as Channel0;
  provides interface HplMsp430DmaChannel as Channel1;
  provides interface HplMsp430DmaChannel as Channel2;

}

implementation {

  components HplMsp430DmaP;
  components new HplMsp430DmaXP( DMA0CTL_, DMA0SA_, DMA0DA_,
				 DMA0SZ_, DMA0TSEL_MASK, 
				 DMA0TSEL_SHIFT ) as Dma0;
  components new HplMsp430DmaXP( DMA1CTL_, DMA1SA_, DMA1DA_,
				 DMA1SZ_, DMA1TSEL_MASK, 
				 DMA1TSEL_SHIFT ) as Dma1;
  components new HplMsp430DmaXP( DMA2CTL_, DMA2SA_, DMA2DA_,
				 DMA2SZ_, DMA2TSEL_MASK, 
				 DMA2TSEL_SHIFT ) as Dma2;

  Control = HplMsp430DmaP;
  Channel0 = Dma0;
  Channel1 = Dma1;
  Channel2 = Dma2;
  Dma0.Interrupt -> HplMsp430DmaP;
  Dma1.Interrupt -> HplMsp430DmaP;
  Dma2.Interrupt -> HplMsp430DmaP;

  components PlatformInterruptC;
  HplMsp430DmaP.PlatformInterrupt -> PlatformInterruptC;
}