spmc75f2313a.h

凌阳SPMC75F2413A的跑马灯的例子。这个是我自己编写的

typedef union 
{
	UInt16	W;
	struct
	{
		UInt16	UARTDATA	: 8;
		UInt16	FE			: 1;
		UInt16	PE			: 1;
		UInt16	reserved1	: 1;
		UInt16	OE			: 1;
		UInt16	reserved2	: 4;
	} B;
} P_UART_Data_DEF;

/*****************************************************************************/
/* UART Reception Error Flag Register (P_UART_RXStatus)						 */
/* bit 0	  : FE, Frame Error.											 */
/* bit 1	  : PE, Parity Error.											 */
/* bit 2	  : BE, Break Error.											 */
/* bit 3	  : OE, Overrun Error.											 */
/* bit 4 - 15 : reserved													 */
/*****************************************************************************/
typedef union 
{
	UInt16	W;
	struct
	{
		UInt16	FE			: 1;
		UInt16	PE			: 1;
		UInt16	reserve1	: 1;
		UInt16	OE			: 1;
		UInt16	reserved2	: 12;
	} B;
} P_UART_RXStatus_DEF;

/*****************************************************************************/
/* UART Control Register (P_UART_Ctrl)										 */
/* bit 0	  : reserved												 	 */
/* bit 1	  : PEN, Parity Enable											 */
/* bit 2	  : PSEL, Parity Selection										 */
/* bit 3	  : SBSEL, Stop Bit Size Selection								 */
/* bit 4 - 8  : reserved								 					 */
/* bit 9	  : RXCHSEL,Reception data channel selection					 */
/*					1: UART reception from RXD1								 */
/* bit 10	  : TXCHSEL,  Transmission data channel selection				 */
/*					1. UART transmission to TXD1                             */						 
/* bit 11	  : Reset, Software reset										 */
/* bit 12	  : TXEN, txd pin enable									 	 */
/* bit 13	  : RXEN, rxd pin enable			 							 */
/* bit 14	  : TXIE , Transmit Interrupt Enable							 */
/* bit 15	  : RXIE , Receive Interrupt Enable								 */
/*****************************************************************************/
typedef union 
{
	UInt16	W;
	struct
	{
		UInt16	reserved1	: 1;
		UInt16	PEN			: 1;
		UInt16	PSEL		: 1;
		UInt16	SBSEL		: 1;
		UInt16	reserved2	: 5;
		UInt16	RXCHSEL		: 1;
		UInt16	TXCHSEL		: 1;
		UInt16	Reset		: 1;
		UInt16	TXEN		: 1;
		UInt16	RXEN		: 1;
		UInt16	TXIE		: 1;
		UInt16	RXIE		: 1;
	} B;
} P_UART_Ctrl_DEF;

/*****************************************************************************/
/* UART Baud Rate Setup Register (P_UART_BaudRate)							 */
/* bit 0 - 15  : UARTBUD, UART Baud Rate Divisor							 */
/*****************************************************************************/
typedef union 
{
	UInt16	W;
	struct
	{
		UInt16	UARTBUD			: 16;
	} B;
} P_UART_BaudRate_DEF;

/*****************************************************************************/
/* UART Status Register (P_UART_Status)										 */
/* bit 0 - 2   : reserved													 */
/* bit 3	   : BY, BUSY flag												 */
/* bit 4 - 5   : reserved													 */
/* bit 6	   : RXFF, Receive FIFO Full Flag								 */
/* bit 7 - 13  : reserved													 */
/* bit 14	   : TXIF, Transmit Interrupt Flag								 */
/* bit 15	   : RXIF, Receive Interrupt Flag								 */
/*****************************************************************************/
typedef union 
{
	UInt16	W;
	struct
	{
		UInt16	reserved1	: 3;
		UInt16	BY			: 1;
		UInt16	reserved2	: 2;
		UInt16	RXBF		: 1;
		UInt16	reserved3	: 7;
		UInt16	TXIF		: 1;
		UInt16	RXIF		: 1;
	} B;
} P_UART_Status_DEF;

/*****************************************************************************/
/* Interrupt status Register (P_INT_Status)									 */
/* bit 0	   : FTIF, Fault protection interrupt status flag				 */
/* bit 1 	   : OSCSF, Oscillator status flag								 */
/* bit 2 	   : OLIF, Overload interrupt status flag		 		 		 */
/* bit 3   	   : reserved													 */
/* bit 4	   : CMTIF, Compare match timer interrupt status flag			 */
/* bit 5	   : PDC0IF, Timer/PWM module channel 0 interrupt status flag	 */
/* bit 6	   : PDC1IF, Timer/PWM module channel 1 interrupt status flag	 */
/* bit 7	   : TPM2IF, Timer/PWM module channel 2 interrupt status flag	 */
/* bit 8	   : reserved													 */
/* bit 9	   : MCP4IF, Timer/PWM module channel 4 interrupt status flag	 */
/* bit 10	   : ADCIF, A/D converter interrupt status flag					 */
/* bit 11 - 12 : reserved													 */
/* bit 13	   : SPIIF, SPI interrupt status flag							 */
/* bit 14	   : UARTIF, UART interrupt status flag							 */
/* bit 15	   : KEYIF, Key-change interrupt status flag					 */
/*****************************************************************************/
typedef union 
{
	UInt16	W;
	struct
	{
		UInt16	FTIF			: 1;
		UInt16	OSCSF			: 1;
		UInt16	OLIF			: 1;			
		UInt16	reserved1		: 1;
		UInt16	CMTIF			: 1;
		UInt16	PDC0IF			: 1;
		UInt16	PDC1IF			: 1;
		UInt16	TPM2IF			: 1;
		UInt16	reserved2		: 1;
		UInt16	MCP4IF			: 1;
		UInt16	ADCIF			: 1;
		UInt16	reserved3		: 2;
		UInt16	SPIIF			: 1;
		UInt16	UARTIF			: 1;
		UInt16	KEYIF			: 1;			
	} B;
} P_INT_Status_DEF;

/*****************************************************************************/
/* IRQ and FIQ selection Register (P_INT_Priority)							 */
/* bit 0	   : FTIP, Fault protection interrupt priority select bit		 */
/* bit 1 	   : OSCIP, Oscillator fail interrupt priority select bit		 */
/* bit 2 	   : OLIP, Overload interrupt priority select bit		 		 */
/* bit 3   	   : reserved													 */
/* bit 4	   : CMTIP, CMT interrupt priority select bit					 */
/* bit 5	   : PDC0IP, PDC ch. 0 interrupt priority select bit			 */
/* bit 6	   : PDC1IP, PDC ch. 1 interrupt priority select bit			 */
/* bit 7	   : TPM2IP, TPM ch. 2 interrupt priority select bit			 */
/* bit 8	   : reserved													 */
/* bit 9	   : MCP4IP, MCP ch. 4 interrupt priority select bit			 */
/* bit 10	   : ADCIP, ADC interrupt priority select bit					 */
/* bit 11 - 12 : reserved													 */
/* bit 13	   : SPIIP, SPI interrupt priority select bit					 */
/* bit 14	   : UARTIP, UART interrupt priority select bit					 */
/* bit 15	   : KEYIP, Key-change interrupt priority select bit			 */
/*****************************************************************************/
typedef union 
{
	UInt16	W;
	struct
	{
		UInt16	FTIP			: 1;
		UInt16	OSCIP			: 1;
		UInt16	OLIP			: 1;	
		UInt16	reserved1		: 1;
		UInt16	CMTIP			: 1;
		UInt16	PDC0IP			: 1;
		UInt16	PDC1IP			: 1;
		UInt16	TPM2IP			: 1;
		UInt16	reserved2		: 1;
		UInt16	MCP4IP			: 1;
		UInt16	ADCIP			: 1;
		UInt16	reserved3		: 2;
		UInt16	SPIIP			: 1;
		UInt16	UARTIP			: 1;
		UInt16	KEYIP			: 1;			
	} B;
} P_INT_Priority_DEF;

/*****************************************************************************/
/* Miscellaneous Interrupt control register (P_MisINT_Ctrl)					 */
/* bit 0 - 14  : reserved													 */
/* bit 15	   : KEYIE, Key-change interrupt enable bit						 */
/*****************************************************************************/
typedef union 
{
	UInt16	W;
	struct
	{
		UInt16	reserved1		: 15;
		UInt16	KEYIE			: 1;			
	} B;
} P_MisINT_Ctrl_DEF;

/*****************************************************************************/
/* Embedded flash access control (P_Flash_RW)					 			 */
/* bit 0 	:	BK0WENB													     */
/* bit 1 	:	BK1WENB														 */		
/* bit 2 	:	BK2WENB														 */
/* bit 3 	:	BK3WENB														 */
/* bit 4 	:	BK4WENB														 */	
/* bit 5 	:	BK5WENB														 */
/* bit 6 	:	BK6WENB														 */	
/* bit 7 	:	BK7WENB														 */
/* bit 8 	:	BK8WENB														 */
/* bit 9 	:	BK9WENB														 */
/* bit 10 	:	BK10WENB													 */
/* bit 11 	:	BK11WENB													 */		
/* bit 12 	:	BK12WENB					 								 */
/* bit 13 	:	BK13WENB													 */
/* bit 14 	:	BK14WENB													 */
/* bit 15 	:	Reserve														 */	
/*****************************************************************************/
typedef union 
{
	UInt16	W;
	struct
	{
		UInt16	BK0WENB			: 1;
		UInt16	BK1WENB			: 1;
		UInt16	BK2WENB			: 1;
		UInt16	BK3WENB			: 1;
		UInt16	BK4WENB			: 1;
		UInt16	BK5WENB			: 1;
		UInt16	BK6WENB			: 1;
		UInt16	BK7WENB			: 1;
		UInt16	BK8WENB			: 1;
		UInt16	BK9WENB			: 1;
		UInt16	BK10WENB		: 1;
		UInt16	BK11WENB		: 1;
		UInt16	BK12WENB		: 1;
		UInt16	BK13WENB		: 1;
		UInt16	BK14WENB		: 1;
		UInt16	BK15WENB		: 1;
			
	} B;
} P_Flash_RW_DEF;


/*****************************************************************************/
/* Flash control register 	(P_Flash_Cmd)					 			     */
/*****************************************************************************/
typedef union 
{
	UInt16	W;
	struct
	{
		UInt16	Reserve			: 16;
	} B;
} P_Flash_Cmd_DEF;

/*****************************************************************************/
/*****************************************************************************/
/* H. Compare Match Timer Register											 */				
/*****************************************************************************/
/*****************************************************************************/
/* Compare Match Timer Start Register (P_CMT_Start)							 */
/* bit 0		: ST0, compare match timer 0 counter start					 */
/* bit 1		: ST1, compare match timer 1 counter start					 */
/* bit 14 - 2   : reserved													 */
/*****************************************************************************/
typedef union
{
	UInt16	W;
	struct
	{
		UInt16	ST0				: 1;
		UInt16	ST1				: 1;
		UInt16	Rerserved		: 14;
	} B;
} P_CMT_Start_DEF;

/*****************************************************************************/
/* Comapre Match Timer Control/Status Register (P_CMT_Ctrl)					 */
/* bit 15		: CM1IF, CMT1 compare match flag 1							 */
/* bit 14		: CM1IE, CMT1 compare match interrupt enable				 */
/* bit 13 - 11  : reserved													 */
/* bit 10 - 8	: CKB, CMT1 clock select bits								 */
/*				= 000, Fck / 1												 */
/*				= 001, Fck / 2												 */
/*				= 010, Fck / 4												 */
/*				= 011, Fck / 8												 */
/*				= 100, Fck / 16												 */
/*				= 101, Fck / 64												 */
/*				= 110, Fck / 256											 */
/*				= 111, Fck / 1024											 */
/* bit 7		: CM0IF, CMT0 compare match flag 0							 */
/* bit 6		: CM0IE, CMT0 compare match interrupt enable				 */
/* bit 5 - 3    : reserved													 */
/* bit 2 - 0	: CKA, CMT0 clock select bits								 */
/*				= 000, Fck / 1												 */
/*				= 001, Fck / 2												 */
/*				= 010, Fck / 4												 */
/*				= 011, Fck / 8												 */
/*				= 100, Fck / 16												 */
/*				= 101, Fck / 64												 */
/*				= 110, Fck / 256											 */
/*				= 111, Fck / 1024											 */
/*****************************************************************************/
typedef union
{
	UInt16	W;
	struct
	{
		UInt16	CKA			: 3;
		UInt16	Reserved1	: 3;
		UInt16	CM0IE		: 1;
		UInt16	CM0IF		: 1;
		UInt16	CKB			: 3;
		UInt16	Reserved2	: 3;
		UInt16	CM1IE		: 1;
		UInt16	CM1IF		: 1;
	} B;
} P_CMT_Ctrl_DEF;

/*****************************************************************************/
/* SPMC75 family register structure macro definition                		 */
/*****************************************************************************/
#ifndef SPMC75_REG_DEBUG
//
/* A. CPU control register */
#define P_System_Option			((volatile P_System_Option_DEF *)(P_System_Option_ADDR))
#define P_Wait_Enter			((volatile P_Wait_Enter_DEF *)(P_Wait_Enter_ADDR))
#define P_Stdby_Enter			((volatile P_Stdby_Enter_DEF *)(P_Stdby_Enter_ADDR))
#define P_Reset_Status			((volatile P_Reset_Status_DEF *)(P_Reset_Status_ADDR))
#define P_Clk_Ctrl				((volatile P_Clk_Ctrl_DEF *)(P_Clk_Ctrl_ADDR))
#define P_WatchDog_Ctrl			((volatile P_WatchDog_Ctrl_DEF *)(P_WatchDog_Ctrl_ADDR))
#define P_WatchDog_Clr			((volatile P_WatchDog_Clr_DEF *)(P_WatchDog_Clr_ADDR))
#define P_Wakeup_Ctrl			((volatile P_Wakeup_Ctrl_DEF *)(P_Wakeup_Ctrl_ADDR))
#define P_INT_Status			((volatile P_INT_Status_DEF *)(P_INT_Status_ADDR))
#define P_INT_Priority			((volatile P_INT_Priority_DEF *)(P_INT_Priority_ADDR))
#define P_MisINT_Ctrl			((volatile P_MisINT_Ctrl_DEF *)(P_MisINT_Ctrl_ADDR))

/* B. I/O Ports */
/* B1. PortA register*/
#define P_IOA_Data				((volatile GEN_REG_DEF *)(P_IOA_Data_ADDR))
#define P_IOA_Buffer			((volatile GEN_REG_DEF *)(P_IOA_Buffer_ADDR))
#define P_IOA_Dir				((volatile GEN_REG_DEF *)(P_IOA_Dir_ADDR))
#define P_IOA_Attrib			((volatile GEN_REG_DEF *)(P_IOA_Attrib_ADDR))
#define P_IOA_Latch				((volatile GEN_REG_DEF *)(P_IOA_Latch_ADDR))
#define P_IOA_SPE				((volatile P_IOA_SPE_DEF *)(P_IOA_SPE_ADDR))
#define P_IOA_KCER				((volatile P_IOA_KCER_DEF *)(P_IOA_KCER_ADDR))

/* B2. PortB register*/
#define P_IOB_Data				((volatile GEN_REG_DEF *)(P_IOB_Data_ADD