📄 video.lst
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C51 COMPILER V6.10 VIDEO 12/02/2004 10:58:52 PAGE 1
C51 COMPILER V6.10, COMPILATION OF MODULE VIDEO
OBJECT MODULE PLACED IN .\OUTPUT\VIDEO.obj
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE .\code\VIDEO.C LARGE DEBUG OBJECTEXTEND CODE LISTINCLUDE PRINT(.\OUTPUT\VID
-EO.lst) OBJECT(.\OUTPUT\VIDEO.obj)
stmt level source
1 #include "global.h"
1 =1 #include "reg51.h"
1 =2 //--------------------------------------------------------------------------
2 =2 //REG51.H
3 =2 //
4 =2 //Header file for 8051.
5 =2 //Copyright (c) 1988-1997 Keil Elektronik GmbH and Keil Software, Inc.
6 =2 //All rights reserved.
7 =2 //--------------------------------------------------------------------------
8 =2
9 =2 // BYTE Register
10 =2 sfr P0 = 0x80;
11 =2 sfr P1 = 0x90;
12 =2 sfr P2 = 0xA0;
13 =2 sfr P3 = 0xB0;
14 =2 sfr PSW = 0xD0;
15 =2 sfr ACC = 0xE0;
16 =2 sfr B = 0xF0;
17 =2 sfr SP = 0x81;
18 =2 sfr DPL = 0x82;
19 =2 sfr DPH = 0x83;
20 =2 sfr PCON = 0x87;
21 =2 sfr TCON = 0x88;
22 =2 sfr TMOD = 0x89;
23 =2 sfr TL0 = 0x8A;
24 =2 sfr TL1 = 0x8B;
25 =2 sfr TH0 = 0x8C;
26 =2 sfr TH1 = 0x8D;
27 =2 sfr IE = 0xA8;
28 =2 sfr IP = 0xB8;
29 =2 sfr SCON = 0x98;
30 =2 sfr SBUF = 0x99;
31 =2
32 =2
33 =2 // BIT Register
34 =2 // PSW
35 =2 sbit CY = 0xD7;
36 =2 sbit AC = 0xD6;
37 =2 sbit F0 = 0xD5;
38 =2 sbit RS1 = 0xD4;
39 =2 sbit RS0 = 0xD3;
40 =2 sbit OV = 0xD2;
41 =2 sbit P = 0xD0;
42 =2
43 =2 // TCON
44 =2 sbit TF1 = 0x8F;
45 =2 sbit TR1 = 0x8E;
46 =2 sbit TF0 = 0x8D;
47 =2 sbit TR0 = 0x8C;
48 =2 sbit IE1 = 0x8B;
49 =2 sbit IT1 = 0x8A;
50 =2 sbit IE0 = 0x89;
51 =2 sbit IT0 = 0x88;
52 =2
C51 COMPILER V6.10 VIDEO 12/02/2004 10:58:52 PAGE 2
53 =2 // IE
54 =2 sbit EA = 0xAF;
55 =2 sbit ES = 0xAC;
56 =2 sbit ET1 = 0xAB;
57 =2 sbit EX1 = 0xAA;
58 =2 sbit ET0 = 0xA9;
59 =2 sbit EX0 = 0xA8;
60 =2
61 =2 // IP
62 =2 sbit PS = 0xBC;
63 =2 sbit PT1 = 0xBB;
64 =2 sbit PX1 = 0xBA;
65 =2 sbit PT0 = 0xB9;
66 =2 sbit PX0 = 0xB8;
67 =2
68 =2 // P1
69 =2 sbit P1_0 = 0x90;
70 =2 sbit P1_1 = 0x91;
71 =2 sbit P1_2 = 0x92;
72 =2 sbit P1_3 = 0x93;
73 =2 sbit P1_4 = 0x94;
74 =2 sbit P1_5 = 0x95;
75 =2 sbit P1_6 = 0x96;
76 =2 sbit P1_7 = 0x97;
77 =2
78 =2 // P2
79 =2 sbit P2_0 = 0xa0;
80 =2 sbit P2_1 = 0xa1;
81 =2 sbit P2_2 = 0xa2;
82 =2 sbit P2_3 = 0xa3;
83 =2 sbit P2_4 = 0xa4;
84 =2 sbit P2_5 = 0xa5;
85 =2 sbit P2_6 = 0xa6;
86 =2 sbit P2_7 = 0xa7;
87 =2
88 =2 // P3
89 =2 sbit P3_0 = 0xb0;
90 =2 sbit P3_1 = 0xb1;
91 =2 sbit P3_2 = 0xb2;
92 =2 sbit P3_4 = 0xb4;
93 =2 sbit P3_5 = 0xb5;
94 =2
95 =2 sbit RD = 0xB7;
96 =2 sbit WR = 0xB6;
97 =2 sbit T1 = 0xB5;
98 =2 sbit T0 = 0xB4;
99 =2 sbit INT1 = 0xB3;
100 =2 sbit INT0 = 0xB2;
101 =2 sbit TXD = 0xB1;
102 =2 sbit RXD = 0xB0;
103 =2
104 =2 // SCON
105 =2 sbit SM0 = 0x9F;
106 =2 sbit SM1 = 0x9E;
107 =2 sbit SM2 = 0x9D;
108 =2 sbit REN = 0x9C;
109 =2 sbit TB8 = 0x9B;
110 =2 sbit RB8 = 0x9A;
111 =2 sbit TI = 0x99;
112 =2 sbit RI = 0x98;
2 =1 #include "config.h"
1 =2 #define MTV230
C51 COMPILER V6.10 VIDEO 12/02/2004 10:58:52 PAGE 3
2 =2 #define _JRCPIN_
3 =2
4 =2 //#define IIC_SW_2526
5 =2 #define IIC_HW_2526
6 =2
7 =2 #define _IR_
8 =2
9 =2 //#define EE24C02
10 =2 #define EE24C16
11 =2
12 =2 #define _NEWKEY_
13 =2 //#define _AD_KEY_
14 =2
15 =2
16 =2 //#define _DEBUG_
3 =1 #include "define.h"
1 =2
2 =2 typedef bit BIT;
3 =2 typedef bit BOOL;
4 =2 typedef unsigned char BYTE;
5 =2 typedef unsigned int WORD;
6 =2 typedef unsigned long LWORD;
7 =2
8 =2 #define LoByte(w) ((BYTE)(w))
9 =2 #define HiByte(w) ((BYTE)(((WORD)(w) >> 8) & 0xFF))
10 =2
11 =2 #define LoNibble(w) ((BYTE)(w) & 0x0F)
12 =2 #define HiNibble(w) ((BYTE)(((BYTE)(w) >> 4) & 0x0F))
13 =2 #define MakeByte(x,y) (BYTE)((BYTE)x << 4 | y)
14 =2
15 =2 #define Max(a,b) (((a) > (b)) ? (a) : (b))
16 =2 #define Min(a,b) (((a) < (b)) ? (a) : (b))
17 =2 #define Abs(a,b) (((a) > (b)) ? (a-b) : (b-a))
18 =2
19 =2 #define SetBit(byData,nBit)\
20 =2 byData=(byData | ((BYTE) (1) << nBit))
21 =2
22 =2 #define ClrBit(byData,nBit)\
23 =2 byData=(byData & ~((BYTE) (1) << nBit))
24 =2
25 =2 #define ValBit(byData,nBit)\
26 =2 ((byData & ((BYTE) (1) << nBit)))
27 =2
28 =2 // define 1ms
29 =2 #define TIMER0_COUNT (1*1000)
30 =2
4 =1 #include "iic.h"
1 =2
2 =2 #define Delay1uS() _nop_()
3 =2 #define Delay2uS() _nop_();_nop_()
4 =2 #define Delay5uS() _nop_();_nop_();_nop_();_nop_();_nop_()
5 =2 #define IICDelay() Delay1uS()
6 =2 #define IICRetry 10
7 =2
8 =2 extern BIT bNoAck;
9 =2 extern BYTE IIC_Timer;
10 =2 extern BYTE EEP_Wait;
11 =2
12 =2 extern void Short_Delay(BYTE Time);
13 =2 extern void DoWait(WORD Time);
14 =2 extern void DELAY10ms(WORD delay );
15 =2
C51 COMPILER V6.10 VIDEO 12/02/2004 10:58:52 PAGE 4
16 =2
17 =2 #ifdef IIC_HW_2526
18 =2 extern void Initial_I2C(void);
19 =2 extern void IIC_WriteByte(BYTE id,BYTE addr,BYTE senddata);
20 =2 extern void IIC_Write(BYTE id,BYTE addr,BYTE *databuf,WORD number);
21 =2 extern void IIC_Read(BYTE id,BYTE addr,BYTE *databuf,WORD number);
22 =2
23 =2
24 =2 #endif
25 =2
26 =2 #ifdef IIC_SW_2526
=2 //------------------software iic for 2526
=2 //Special setup for JRC
=2 #define SetSDA (P1_5 =0x01)
=2 #define ResSDA (P1_5 =0x00)
=2 #define GetSDA (P1_5)
=2 #define SetSCL (P1_4 =0x01)
=2 #define ResSCL (P1_4 =0x00)
=2 #define GetSCL (P1_4 )
=2 /*
=2 #define SetSDA byMTV_Port61=0x01
=2 #define ResSDA byMTV_Port61=0x00
=2 #define GetSDA byMTV_Port61&0x01
=2 #define SetSCL byMTV_Port60=0x01
=2 #define ResSCL byMTV_Port60=0x00
=2 #define GetSCL byMTV_Port60&0x01 */
=2
=2
=2 extern void Initial_I2C(void);
=2 extern void IICSW_Write(BYTE id,BYTE addr,BYTE *databuf,WORD number);
=2 extern void IICSW_Read(BYTE id,BYTE addr,BYTE *databuf,WORD number);
=2
=2 #endif
5 =1 #include "mcu.h"
1 =2
2 =2 #define ETXBI 0x80
3 =2 #define ERCBI 0x40
4 =2
5 =2 #define TXBI 0x80
6 =2 #define RCBI 0x40
7 =2 #define WardB 0x80
8 =2
9 =2 #define EnSlvB 0x80
10 =2 #define SlvB_Addr 0x4c
11 =2
12 =2 #ifdef MTV230
13 =2 //-------------------------------------------
14 =2 // XFR RAM 0xF00 ~ 0xFFF
15 =2 //-------------------------------------------
16 =2
17 =2 //---- Chip Configuration -------------------
18 =2 extern BYTE xdata byMTV_PadModeB;// _at_ 0xF2B;
19 =2 extern BYTE xdata byMTV_PadModeC;// _at_ 0xF2C;
20 =2 extern BYTE xdata byMTV_PadModeD;// _at_ 0xF2D;
21 =2 extern BYTE xdata byMTV_PadModeE;// _at_ 0xF2E;
22 =2
23 =2 extern BYTE xdata byMTV_Option;// _at_ 0xF2F;
24 =2 //----- I/O Ports -------------------------
25 =2 extern BYTE xdata byMTV_Port40;// _at_ 0xF30;
26 =2 extern BYTE xdata byMTV_Port41;// _at_ 0xF31;
27 =2 extern BYTE xdata byMTV_Port42;// _at_ 0xF32;
28 =2 extern BYTE xdata byMTV_Port43;// _at_ 0xF33;
C51 COMPILER V6.10 VIDEO 12/02/2004 10:58:52 PAGE 5
29 =2 extern BYTE xdata byMTV_Port44;// _at_ 0xF34;
30 =2 extern BYTE xdata byMTV_Port45;// _at_ 0xF35;
31 =2 extern BYTE xdata byMTV_Port46;// _at_ 0xF36;
32 =2 extern BYTE xdata byMTV_Port47;// _at_ 0xF37;
33 =2
34 =2 extern BYTE xdata byMTV_Port50;// _at_ 0xF38;
35 =2 extern BYTE xdata byMTV_Port51;// _at_ 0xF39;
36 =2 extern BYTE xdata byMTV_Port52;// _at_ 0xF3A;
37 =2 extern BYTE xdata byMTV_Port53;// _at_ 0xF3B;
38 =2 extern BYTE xdata byMTV_Port54;// _at_ 0xF3C;
39 =2 extern BYTE xdata byMTV_Port55;// _at_ 0xF3D;
40 =2 extern BYTE xdata byMTV_Port56;// _at_ 0xF3E;
41 =2 extern BYTE xdata byMTV_Port57;// _at_ 0xF3F;
42 =2
43 =2 extern BYTE xdata byMTV_Port60;// _at_ 0xF28;
44 =2 extern BYTE xdata byMTV_Port61;// _at_ 0xF29;
45 =2 extern BYTE xdata byMTV_Port62;// _at_ 0xF2A;
46 =2 //------ PWM DAC ---------------------------
47 =2 extern BYTE xdata byMTV_DA0;// _at_ 0xF20;
48 =2 extern BYTE xdata byMTV_DA1;// _at_ 0xF21;
49 =2 extern BYTE xdata byMTV_DA2;// _at_ 0xF22;
50 =2 extern BYTE xdata byMTV_DA3;// _at_ 0xF23;
51 =2 //------ H/VSync processor -------------------
52 =2 extern BYTE xdata byMTV_HVSTUS;// _at_ 0xF40; //HVCTR0
53 =2 extern BYTE xdata byMTV_HCNTH;// _at_ 0xF41;
54 =2 extern BYTE xdata byMTV_HCNTL;// _at_ 0xF42;
55 =2 extern BYTE xdata byMTV_VCNTH;// _at_ 0xF43; //HVCTR3
56 =2 extern BYTE xdata byMTV_VCNTL;// _at_ 0xF44; //HVCTR4
57 =2
58 =2 extern BYTE xdata byMTV_INTFLG;// _at_ 0xF48;
59 =2 extern BYTE xdata byMTV_INTEN;// _at_ 0xF49;
60 =2 //------- IIC's control ------------------------
61 =2 extern BYTE xdata byMTV_IIC_CTR;// _at_ 0xF00;
62 =2 extern BYTE xdata byMTV_IIC_STUS1;// _at_ 0xF01;
63 =2 extern BYTE xdata byMTV_IIC_INTFLG;// _at_ 0xF03;
64 =2 extern BYTE xdata byMTV_IIC_INTEN;// _at_ 0xF04;
65 =2 extern BYTE xdata byMTV_IIC_MBUF;// _at_ 0xF05;
66 =2 extern BYTE xdata byMTV_IIC_TXRCABUF;// _at_ 0xF06;
67 =2 extern BYTE xdata byMTV_IIC_SLVAADR;// _at_ 0xF07;
68 =2 extern BYTE xdata byMTV_IIC_TXRCBBUF;// _at_ 0xF08;
69 =2 extern BYTE xdata byMTV_IIC_SLVBADR;// _at_ 0xF09;
70 =2 //------ AD Converter -------------------------
71 =2 extern BYTE xdata byMTV_ADC;// _at_ 0xF10;
72 =2 extern BYTE xdata byMTV_WDT;// _at_ 0xF18;
73 =2
74 =2 //------ ISP ---------------------------------
75 =2 extern BYTE xdata byMTV_ISPSLV;// _at_ 0xF0B;
76 =2 extern BYTE xdata byMTV_ISPEN;// _at_ 0xF0C;
77 =2
78 =2 //define OSD register
79 =2 extern BYTE xdata byM230_OSDRA;// _at_ 0xFA0;
80 =2 extern BYTE xdata byM230_OSDCA;// _at_ 0xFA1;
81 =2 extern BYTE xdata byM230_OSDDT0;// _at_ 0xFA2;
82 =2 extern BYTE xdata byM230_OSDDT1;// _at_ 0xFA3;
83 =2
84 =2 extern BYTE xdata byM230_W1ROW;// _at_ 0xFC0;
85 =2 extern BYTE xdata byM230_W1COL;// _at_ 0xFC1;
86 =2 extern BYTE xdata byM230_W1COL1;// _at_ 0xFC2;
87 =2 extern BYTE xdata byM230_W2ROW;// _at_ 0xFC3;
88 =2 extern BYTE xdata byM230_W2COL;// _at_ 0xFC4;
89 =2 extern BYTE xdata byM230_W2COL1;// _at_ 0xFC5;
90 =2 extern BYTE xdata byM230_W3ROW;// _at_ 0xFC6;
C51 COMPILER V6.10 VIDEO 12/02/2004 10:58:52 PAGE 6
91 =2 extern BYTE xdata byM230_W3COL;// _at_ 0xFC7;
92 =2 extern BYTE xdata byM230_W3COL1;// _at_ 0xFC8;
93 =2 extern BYTE xdata byM230_W4ROW;// _at_ 0xFC9;
94 =2 extern BYTE xdata byM230_W4COL;// _at_ 0xFCA;
95 =2 extern BYTE xdata byM230_W4COL1;// _at_ 0xFCB;
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