smallcore.map.eqn

嵌入式系统实验教程(一)中对应的实验内容

AB1_q_a[5] = AMPP_FUNCTION(G1_W_rf_wren_a, G1L837, NC1__clk0, NC1__clk0, G1_W_alu_result[5], G1L937, G1L047, G1L147, G1L247, G1L347, G1_av_ld_byte0_data[5], G1_D_iw[22], G1_D_iw[23], G1_D_iw[24], G1_D_iw[25], G1_D_iw[26]);

--AB1_q_b[5] is nios2e_1C6:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_dno1:auto_generated|q_b[5]
AB1_q_b[5] = AMPP_FUNCTION(G1_W_rf_wren_a, G1L837, NC1__clk0, NC1__clk0, G1_W_alu_result[5], G1L937, G1L047, G1L147, G1L247, G1L347, G1_av_ld_byte0_data[5], G1_D_iw[22], G1_D_iw[23], G1_D_iw[24], G1_D_iw[25], G1_D_iw[26]);


--AB1_q_a[4] is nios2e_1C6:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_dno1:auto_generated|q_a[4]
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 32, Port A Width: 1, Port B Depth: 32, Port B Width: 1
--Port A Logical Depth: 32, Port A Logical Width: 32, Port B Logical Depth: 32, Port B Logical Width: 32
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
AB1_q_a[4] = AMPP_FUNCTION(G1_W_rf_wren_a, G1L837, NC1__clk0, NC1__clk0, G1_W_alu_result[4], G1L937, G1L047, G1L147, G1L247, G1L347, G1_av_ld_byte0_data[4], G1_D_iw[22], G1_D_iw[23], G1_D_iw[24], G1_D_iw[25], G1_D_iw[26]);

--AB1_q_b[4] is nios2e_1C6:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_dno1:auto_generated|q_b[4]
AB1_q_b[4] = AMPP_FUNCTION(G1_W_rf_wren_a, G1L837, NC1__clk0, NC1__clk0, G1_W_alu_result[4], G1L937, G1L047, G1L147, G1L247, G1L347, G1_av_ld_byte0_data[4], G1_D_iw[22], G1_D_iw[23], G1_D_iw[24], G1_D_iw[25], G1_D_iw[26]);


--AB1_q_a[3] is nios2e_1C6:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_dno1:auto_generated|q_a[3]
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 32, Port A Width: 1, Port B Depth: 32, Port B Width: 1
--Port A Logical Depth: 32, Port A Logical Width: 32, Port B Logical Depth: 32, Port B Logical Width: 32
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
AB1_q_a[3] = AMPP_FUNCTION(G1_W_rf_wren_a, G1L837, NC1__clk0, NC1__clk0, G1_W_alu_result[3], G1L937, G1L047, G1L147, G1L247, G1L347, G1_av_ld_byte0_data[3], G1_D_iw[22], G1_D_iw[23], G1_D_iw[24], G1_D_iw[25], G1_D_iw[26]);

--AB1_q_b[3] is nios2e_1C6:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_dno1:auto_generated|q_b[3]
AB1_q_b[3] = AMPP_FUNCTION(G1_W_rf_wren_a, G1L837, NC1__clk0, NC1__clk0, G1_W_alu_result[3], G1L937, G1L047, G1L147, G1L247, G1L347, G1_av_ld_byte0_data[3], G1_D_iw[22], G1_D_iw[23], G1_D_iw[24], G1_D_iw[25], G1_D_iw[26]);


--AB1_q_a[2] is nios2e_1C6:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_dno1:auto_generated|q_a[2]
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 32, Port A Width: 1, Port B Depth: 32, Port B Width: 1
--Port A Logical Depth: 32, Port A Logical Width: 32, Port B Logical Depth: 32, Port B Logical Width: 32
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
AB1_q_a[2] = AMPP_FUNCTION(G1_W_rf_wren_a, G1L837, NC1__clk0, NC1__clk0, G1_W_alu_result[2], G1L937, G1L047, G1L147, G1L247, G1L347, G1_av_ld_byte0_data[2], G1_D_iw[22], G1_D_iw[23], G1_D_iw[24], G1_D_iw[25], G1_D_iw[26]);

--AB1_q_b[2] is nios2e_1C6:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_dno1:auto_generated|q_b[2]
AB1_q_b[2] = AMPP_FUNCTION(G1_W_rf_wren_a, G1L837, NC1__clk0, NC1__clk0, G1_W_alu_result[2], G1L937, G1L047, G1L147, G1L247, G1L347, G1_av_ld_byte0_data[2], G1_D_iw[22], G1_D_iw[23], G1_D_iw[24], G1_D_iw[25], G1_D_iw[26]);


--AB1_q_a[1] is nios2e_1C6:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_dno1:auto_generated|q_a[1]
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 32, Port A Width: 1, Port B Depth: 32, Port B Width: 1
--Port A Logical Depth: 32, Port A Logical Width: 32, Port B Logical Depth: 32, Port B Logical Width: 32
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
AB1_q_a[1] = AMPP_FUNCTION(G1_W_rf_wren_a, G1L837, NC1__clk0, NC1__clk0, G1L084, G1L937, G1L047, G1L147, G1L247, G1L347, G1_av_ld_byte0_data[1], G1_D_iw[22], G1_D_iw[23], G1_D_iw[24], G1_D_iw[25], G1_D_iw[26]);

--AB1_q_b[1] is nios2e_1C6:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_dno1:auto_generated|q_b[1]
AB1_q_b[1] = AMPP_FUNCTION(G1_W_rf_wren_a, G1L837, NC1__clk0, NC1__clk0, G1L084, G1L937, G1L047, G1L147, G1L247, G1L347, G1_av_ld_byte0_data[1], G1_D_iw[22], G1_D_iw[23], G1_D_iw[24], G1_D_iw[25], G1_D_iw[26]);


--AB1_q_a[0] is nios2e_1C6:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_dno1:auto_generated|q_a[0]
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 32, Port A Width: 1, Port B Depth: 32, Port B Width: 1
--Port A Logical Depth: 32, Port A Logical Width: 32, Port B Logical Depth: 32, Port B Logical Width: 32
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
AB1_q_a[0] = AMPP_FUNCTION(G1_W_rf_wren_a, G1L837, NC1__clk0, NC1__clk0, G1L974, G1L937, G1L047, G1L147, G1L247, G1L347, G1_av_ld_byte0_data[0], G1_D_iw[22], G1_D_iw[23], G1_D_iw[24], G1_D_iw[25], G1_D_iw[26]);

--AB1_q_b[0] is nios2e_1C6:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_dno1:auto_generated|q_b[0]
AB1_q_b[0] = AMPP_FUNCTION(G1_W_rf_wren_a, G1L837, NC1__clk0, NC1__clk0, G1L974, G1L937, G1L047, G1L147, G1L247, G1L347, G1_av_ld_byte0_data[0], G1_D_iw[22], G1_D_iw[23], G1_D_iw[24], G1_D_iw[25], G1_D_iw[26]);


--Q1_oe is nios2e_1C6:inst|sdram:the_sdram|oe
--operation mode is normal

Q1_oe_lut_out = Q1L552 & (MC1_entries[1] # MC1_entries[0]) # !Q1_f_pop;
Q1_oe = DFFEAS(Q1_oe_lut_out, NC1__clk0, F1_data_out, , , , , !Q1_m_state.000010000, );


--AC1_td_shift[2] is nios2e_1C6:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|td_shift[2]
--operation mode is normal

AC1_td_shift[2] = AMPP_FUNCTION(A1L331, AC1_td_shift[3], AC1_rdata[0], A1L921, AC1_count[9], A1L421, AC1L84, !A1L131, AC1L53);


--G1L505 is nios2e_1C6:inst|cpu:the_cpu|add~1500
--operation mode is normal

G1L505 = AMPP_FUNCTION(G1_F_pc[21], G1L365);


--G1L605 is nios2e_1C6:inst|cpu:the_cpu|add~1505
--operation mode is arithmetic

G1L605 = AMPP_FUNCTION(G1_E_src2[10], G1_E_src1[10], G1L525);

--G1L705 is nios2e_1C6:inst|cpu:the_cpu|add~1507
--operation mode is arithmetic

G1L705 = AMPP_FUNCTION(G1_E_src2[10], G1_E_src1[10], G1L525);


--G1L805 is nios2e_1C6:inst|cpu:the_cpu|add~1510
--operation mode is arithmetic

G1L805 = AMPP_FUNCTION(G1_E_src2[10], G1_E_src1[10], G1L725);

--G1L905 is nios2e_1C6:inst|cpu:the_cpu|add~1512
--operation mode is arithmetic

G1L905 = AMPP_FUNCTION(G1_E_src2[10], G1_E_src1[10], G1L725);


--G1L015 is nios2e_1C6:inst|cpu:the_cpu|add~1515
--operation mode is arithmetic

G1L015 = AMPP_FUNCTION(G1_F_pc[8], G1L925);

--G1L115 is nios2e_1C6:inst|cpu:the_cpu|add~1517
--operation mode is arithmetic

G1L115 = AMPP_FUNCTION(G1_F_pc[8], G1L925);


--G1L215 is nios2e_1C6:inst|cpu:the_cpu|add~1520
--operation mode is arithmetic

G1L215 = AMPP_FUNCTION(G1_E_src2[14], G1_E_src1[14], G1L565);

--G1L315 is nios2e_1C6:inst|cpu:the_cpu|add~1522
--operation mode is arithmetic

G1L315 = AMPP_FUNCTION(G1_E_src2[14], G1_E_src1[14], G1L565);


--G1L415 is nios2e_1C6:inst|cpu:the_cpu|add~1525
--operation mode is arithmetic

G1L415 = AMPP_FUNCTION(G1_E_src2[14], G1_E_src1[14], G1L765);

--G1L515 is nios2e_1C6:inst|cpu:the_cpu|add~1527
--operation mode is arithmetic

G1L515 = AMPP_FUNCTION(G1_E_src2[14], G1_E_src1[14], G1L765);


--G1L615 is nios2e_1C6:inst|cpu:the_cpu|add~1530
--operation mode is arithmetic

G1L615 = AMPP_FUNCTION(G1_F_pc[12], G1L965);

--G1L715 is nios2e_1C6:inst|cpu:the_cpu|add~1532
--operation mode is arithmetic

G1L715 = AMPP_FUNCTION(G1_F_pc[12], G1L965);


--G1L815 is nios2e_1C6:inst|cpu:the_cpu|add~1535
--operation mode is arithmetic

G1L815 = AMPP_FUNCTION(G1_E_src2[15], G1_E_src1[15], G1L315);

--G1L915 is nios2e_1C6:inst|cpu:the_cpu|add~1537
--operation mode is arithmetic

G1L915 = AMPP_FUNCTION(G1_E_src2[15], G1_E_src1[15], G1L315);


--G1L025 is nios2e_1C6:inst|cpu:the_cpu|add~1540
--operation mode is arithmetic

G1L025 = AMPP_FUNCTION(G1_E_src2[15], G1_E_src1[15], G1L515);

--G1L125 is nios2e_1C6:inst|cpu:the_cpu|add~1542
--operation mode is arithmetic

G1L125 = AMPP_FUNCTION(G1_E_src2[15], G1_E_src1[15], G1L515);


--G1L225 is nios2e_1C6:inst|cpu:the_cpu|add~1545
--operation mode is arithmetic

G1L225 = AMPP_FUNCTION(G1_F_pc[13], G1L715);

--G1L325 is nios2e_1C6:inst|cpu:the_cpu|add~1547
--operation mode is arithmetic

G1L325 = AMPP_FUNCTION(G1_F_pc[13], G1L715);


--G1L425 is nios2e_1C6:inst|cpu:the_cpu|add~1550
--operation mode is arithmetic

G1L425 = AMPP_FUNCTION(G1_E_src2[9], G1_E_src1[9], G1L995);

--G1L525 is nios2e_1C6:inst|cpu:the_cpu|add~1552
--operation mode is arithmetic

G1L525 = AMPP_FUNCTION(G1_E_src2[9], G1_E_src1[9], G1L995);


--G1L625 is nios2e_1C6:inst|cpu:the_cpu|add~1555
--operation mode is arithmetic

G1L625 = AMPP_FUNCTION(G1_E_src2[9], G1_E_src1[9], G1L106);

--G1L725 is nios2e_1C6:inst|cpu:the_cpu|add~1557
--operation mode is arithmetic

G1L725 = AMPP_FUNCTION(G1_E_src2[9], G1_E_src1[9], G1L106);


--G1L825 is nios2e_1C6:inst|cpu:the_cpu|add~1560
--operation mode is arithmetic

G1L825 = AMPP_FUNCTION(G1_F_pc[7], G1L795);

--G1L925 is nios2e_1C6:inst|cpu:the_cpu|add~1562
--operation mode is arithmetic

G1L925 = AMPP_FUNCTION(G1_F_pc[7], G1L795);


--G1L035 is nios2e_1C6:inst|cpu:the_cpu|add~1565
--operation mode is arithmetic

G1L035 = AMPP_FUNCTION(G1_E_src2[12], G1_E_src1[12], G1L884);

--G1L135 is nios2e_1C6:inst|cpu:the_cpu|add~1567
--operation mode is arithmetic

G1L135 = AMPP_FUNCTION(G1_E_src2[12], G1_E_src1[12], G1L884);


--G1L235 is nios2e_1C6:inst|cpu:the_cpu|add~1570
--operation mode is arithmetic

G1L235 = AMPP_FUNCTION(G1_E_src2[12], G1_E_src1[12], G1L684);

--G1L335 is nios2e_1C6:inst|cpu:the_cpu|add~1572
--operation mode is arithmetic

G1L335 = AMPP_FUNCTION(G1_E_src2[12], G1_E_src1[12], G1L684);


--G1L435 is nios2e_1C6:inst|cpu:the_cpu|add~1575
--operation mode is arithmetic

G1L435 = AMPP_FUNCTION(G1_F_pc[10], G1L945);

--G1L535 is nios2e_1C6:inst|cpu:the_cpu|add~1577
--operation mode is arithmetic

G1L535 = AMPP_FUNCTION(G1_F_pc[10], G1L945);


--G1L635 is nios2e_1C6:inst|cpu:the_cpu|add~1580
--operation mode is arithmetic

G1L635 = AMPP_FUNCTION(G1_E_src2[16], G1_E_src1[16], G1L915);

--G1L735 is nios2e_1C6:inst|cpu:the_cpu|add~1582
--operation mode is arithmetic

G1L735 = AMPP_FUNCTION(G1_E_src2[16], G1_E_src1[16], G1L915);


--G1L835 is nios2e_1C6:inst|cpu:the_cpu|add~1585
--operation mode is arithmetic

G1L835 = AMPP_FUNCTION(G1_E_src2[16], G1_E_src1[16], G1L125);

--G1L935 is nios2e_1C6:inst|cpu:the_cpu|add~1587
--operation mode is arithmetic

G1L935 = AMPP_FUNCTION(G1_E_src2[16], G1_E_src1[16], G1L125);


--G1L045 is nios2e_1C6:inst|cpu:the_cpu|add~1590
--operation mode is arithmetic

G1L045 = AMPP_FUNCTION(G1_F_pc[14], G1L325);

--G1L145 is nios2e_1C6:inst|cpu:the_cpu|add~1592
--operation mode is arithmetic

G1L145 = AMPP_FUNCTION(G1_F_pc[14], G1L325);


--G1L245 is nios2e_1C6:inst|cpu:the_cpu|add~1595
--operation mode is arithmetic

G1L245 = AMPP_FUNCTION(G1_E_src2[17], G1_E_src1[17], G1L735);

--G1L345 is nios2e_1C6:inst|cpu:the_cpu|add~1597
--operation mode is arithmetic

G1L345 = AMPP_FUNCTION(G1_E_src2[17], G1_E_src1[17], G1L735);


--G1L445 is nios2e_1C6:inst|cpu:the_cpu|add~1600
--operation mode is arithmetic

G1L445 = AMPP_FUNCTION(G1_E_src2[17], G1_E_src1[17], G1L935);

--G1L545 is nios2e_1C6:inst|cpu:the_cpu|add~1602
--operation mode is arithmetic

G1L545 = AMPP_FUNCTION(G1_E_src2[17], G1_E_src1[17], G1L935);


--G1L645 is nios2e_1C6:inst|cpu:the_cpu|add~1605
--operation mode is arithmetic

G1L645 = AMPP_FUNCTION(G1_F_pc[15], G1L145);

--G1L745 is nios2e_1C6:inst|cpu:the_cpu|add~1607
--operation mode is arithmetic

G1L745 = AMPP_FUNCTION(G1_F_pc[15], G1L145);