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📄 epsonc33.h

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/****************************************************************
 *  Copyright (C) Asic Center. 2001
 *  All Rights Reserved
 *
 *  Filename : EPSONC33.h
 *  Function : hardware abstract layer(HAL)
 *  Revision :
 *		2002/4/17	PESSIA	Create this file
 *****************************************************************/
#ifndef _EPSONC33_H
#define _EPSONC33_H

#include <hardware\dbcfg.h>
//#include "..\include\itron.h"

#ifndef CHIP
#define CHIP EPSONC33209
#endif

#if ( CHIP == EPSONC33209 )
/*
  * ENABLE_IRQ  --- set IE in PSR.
  *     use a temporary register( R4 ); we should choose this register carefully;
  *     it wouldn't be used by manual-asm-code and needn't  to be saved by 
  *     callee.
  */
#define ENABLE_INT \
	asm("
		ld.w %r4, %psr
		nor %r4, 0x10
		nld.w %psr, %r4
		")

/*
  * DISABLE_IRQ  --- clear IE in PSR.
  *     use a temporary register( R4 ); we should choose this register carefully;
  *     it wouldn't be used by manual-asm-code and needn't  to be saved by 
  *     callee.
  */
#define DISABLE_INT \
	asm("
		ld.w %r4, %psr
		nand %r4, 0x2f
		nld.w %psr, %r4
		")

/*
  * ENTER_CRITICAL_SECTION --- IE = 1 and IL = 4
  */
#define ENTER_CRITICAL_SECTION \
	asm("
		pushn %r0
		ld.w  %r0, %psr
		xand  %r0, %r0, 0xff     ; clear IL
		xoor  %r0, %r0, 0x410    ; set IL and IE, interrupt mask by IL
		ld.w  %psr, %r0
		popn  %r0
		")

/*
  * ENTER_CRITICAL_SECTION --- IE = 1 and IL = 4
  */
#define EXIT_CRITICAL_SECTION \
	asm("
		pushn %r0
		ld.w  %r0, %psr
		xand  %r0, %r0, 0xff     ; clear IL
		xoor  %r0, %r0, 0x010    ; set IL and IE, interrupt mask by IL
		ld.w  %psr, %r0
		popn  %r0
		")

/*
  * SAVE_CURTSK_SP ------ g_pCurTsk->uwSP = sp
  * RESTORE_CURTSK_SP ---sp = g_pCurTsk->uwSP
  */
#define CURTSK_SP	16
#define SAVE_CURTSK_SP \
	asm("
		xld.w %r4, [g_pCurTsk]
		xld.w [%r4+16], %sp
		")

#define RESTORE_CURTSK_SP \
	asm("
		xld.w %r4, [g_pCurTsk]
		xld.w %r4, [%r4+16]
		ld.w %sp, %r4
		")

/*
  * GET_RETURN_VALUE_FROM_STACK:
  *     r10 is used to save return value, 
  *     and change stack point ( sp )
  */
#define GET_RETURN_VALUE_FROM_STACK \
	asm("
		ld.w %r10, [%sp+0]
		add %sp, 1
		")

/*
  * PUSH_NULL --- push null into stack
  * POP_NULL	 --- pop null from stack
  */
#define PUSH_NULL	asm("sub %sp, 1")
#define POP_NULL		asm("add %sp, 1")

/*
  * PUSH_ALL_COMM_REG ---to save all common registers ( which include 
  *     all information about current task ) into stack when interrupt occurs.
  * POP_ALL_COMM_REG   ---to restore all common registers.
  */
#define PUSH_ALL_COMM_REG \
	asm("
		pushn %r15			; save r1,r2...r15
		ld.w %r1,%alr
		ld.w %r0,%ahr
		pushn   %r1			; save alr & ahr
		")
		
#define POP_ALL_COMM_REG \
	asm("
		popn %r1
		ld.w %alr, %r1
		ld.w %ahr, %r0		; restore alr & ahr
		popn %r15			; restore r1,r2...r15
		")

/*
  * PUSH_CALLEE_SAVED_REG --- to save special registers (which must 
  *     be saved by callee while not caller ) into stack while function-calling
  *     occurs.
  * POP_CALLEE_SAVED_REG --- to restore them.
  */
#define PUSH_CALLEE_SAVED_REG \
	asm("pushn %r3")
#define POP_CALLEE_SAVED_REG \
	asm("popn %r3")

/*
  * PUSH_PSR --- save PSR into stack
  * POP_PSR	--- restore PSR from stack
  */
#define PUSH_PSR \
	asm("
		sub %sp,1
	    	ld.w  %r4, %psr
    		ld.w  [%sp+0x0],%r4    ; save PSR
    		")
    		
#define POP_PSR \
	asm("
		ld.w  %r4,[%sp+0x0]
		ld.w  %psr, %r4
		add %sp,1
		")

/*
  * RETI --- return from interrupt( pop PC&PSR).
  */
#define RETI	asm("reti")

/*
  * Interrupt Context Information :
  *    it is built by PUSH_ALL_COMM_REG
  */
typedef struct 
{
    UW   ahr;       		// Arithmetic operation high register 
    UW   alr;       		// Arithmetic operation low register
    UW   r[16];     		// General-purpose register 
    UW   psr;       		// Processor status register
    void (*pc)();   		// Program counter/
} T_SAVEDREG;

/*
  * Minimum Context Information :
  *    it is built by 
  *			PUSH_CALLEE_SAVED_REG;
  *			PUSH_NULL;
  */
typedef struct  
{
    UW   r10;       		// return value
    UW   r[4];      		// General-purpose register
    UW   psr;       		// Processor status register
    void (*pc)();   		// Program counter
} T_SAVEDREG_MIN;

/*
  * returnvalue --- to provide an accordant interrface of return-value
  *    from different cpus.
  */
#define returnvalue	r10

#endif /* CHIP == EPSONC33209 */

#endif /* _EPSONC33_H */

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