bsp.txt

ATMEL ARM7 SAM64 Porting ucos / Keil ARM VER3.04。不同于其它

; generated by ARM/Thumb C/C++ Compiler with , RVCT3.0 [Build 951] for uVision
; commandline ArmCC [--debug -c --asm --interleave -o.\ULINK-RAM\Obj\bsp.o --device=DARMATS --apcs=interwork -I..\..\..\..\uCOS-II\Source -I..\..\..\..\uCOS-II\Ports\ARM\Generic\KEILRV -I.\APP -I.\BSP -IC:\DEVELOP\Keil\ARM\INC\Atmel\SAM7S BSP\bsp.c]

                          ARM

                          AREA ||.text.7||, CODE, READONLY, ALIGN=2

                  BSP_DummyISR_Handler PROC
;;;45     {
;;;46     }
                  |L1.0|
000000  e12fff1e          BX       lr
                          ENDP

                  BSP_IntCtrlInit PROC
;;;61     
;;;62         AT91C_BASE_AIC->AIC_EOICR = 0x00000000;                        /* End-of-interrupt command         */
000004  e3a01000          MOV      r1,#0
000008  e5011ed0          STR      r1,[r1,#-0xed0]
;;;63     
;;;64         for (i = 0; i < 32; i++) {                                     /* Disable all ISRs                 */
00000c  e59f3060          LDR      r3,|L1.116|
000010  e1a00001          MOV      r0,r1
000014  e24f201c          ADR      r2,|L1.0|
;;;65             AT91C_BASE_AIC->AIC_SVR[i] = (INT32U)BSP_DummyISR_Handler;
                  |L1.24|
000018  e1a0c100          LSL      r12,r0,#2
00001c  e50c2f80          STR      r2,[r12,#-0xf80]
;;;66             AT91C_BASE_AIC->AIC_SMR[i] = 0;
000020  e7831100          STR      r1,[r3,r0,LSL #2]
000024  e2800001          ADD      r0,r0,#1              ;64
000028  e3500020          CMP      r0,#0x20              ;64
00002c  bafffff9          BLT      |L1.24|               ;64
;;;67         }
;;;68     }
000030  e12fff1e          BX       lr
                          ENDP

                  Tmr_TickISR_Handler PROC
;;;129    
;;;130        if (AT91C_BASE_PITC->PITC_PISR & AT91C_PITC_PITS)
                  |L1.52|
000034  e3a00000          MOV      r0,#0
000038  e51012cc          LDR      r1,[r0,#-0x2cc]
00003c  e3110001          TST      r1,#1
;;;131        {
;;;132          status = AT91C_BASE_PITC->PITC_PIVR;      /* Clear PIT interrupt                                   */
000040  151002c8          LDRNE    r0,[r0,#-0x2c8]
;;;133    
;;;134          OSTimeTick();                             /* Tell uC/OS-II about clock tick                        */
000044  1afffffe          BNE      OSTimeTick
;;;135        }
;;;136    }
000048  e12fff1e          BX       lr
                          ENDP

                  Tmr_TickInit PROC
;;;101                                                    /* Set the vector address for PIT                      */
;;;102        AT91C_BASE_AIC->AIC_SVR[AT91C_ID_SYS] = (INT32U)Tmr_TickISR_Handler;
00004c  e24f1020          ADR      r1,|L1.52|
000050  e3a00000          MOV      r0,#0
000054  e5001f7c          STR      r1,[r0,#-0xf7c]
;;;103        AT91C_BASE_AIC->AIC_SMR[AT91C_ID_SYS] = AT91C_AIC_SRCTYPE_INT_LEVEL_SENSITIVE
000058  e5000ffc          STR      r0,[r0,#-0xffc]
;;;104                                              | AT91C_AIC_PRIOR_LOWEST;
;;;105    
;;;106        // clear any pending interrupt for this AIC input and then enable the interrupt.
;;;107        AT91C_BASE_AIC->AIC_ICCR              = 1 << AT91C_ID_SYS;
00005c  e3a01002          MOV      r1,#2
000060  e5001ed8          STR      r1,[r0,#-0xed8]
;;;108        AT91C_BASE_AIC->AIC_IECR              = 1 << AT91C_ID_SYS;
000064  e5001ee0          STR      r1,[r0,#-0xee0]
;;;109    
;;;110        counts                                = (48000000 / 16 / OS_TICKS_PER_SEC) - 1;
;;;111        AT91C_BASE_PITC->PITC_PIMR            = AT91C_PITC_PITEN | AT91C_PITC_PITIEN | counts;
000068  e59f1008          LDR      r1,|L1.120|
00006c  e50012d0          STR      r1,[r0,#-0x2d0]
;;;112    }
000070  e12fff1e          BX       lr
                  |L1.116|
000074  fffff000          DCD      0xfffff000
                  |L1.120|
000078  0300752f          DCD      0x0300752f
                          ENDP