📄 quanbo.mdl
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ExtMode off
ExtModeStaticAlloc off
ExtModeTesting off
ExtModeStaticAllocSize 1000000
ExtModeTransport 0
ExtModeMexFile "ext_comm"
ExtModeIntrfLevel "Level1"
RTWCAPISignals off
RTWCAPIParams off
RTWCAPIStates off
GenerateASAP2 off
}
PropName "Components"
}
}
hdlcoderui.hdlcc {
$ObjectID 11
Description "HDL Coder custom configuration component"
Version "1.4.0"
Name "HDL Coder"
Array {
Type "Cell"
Dimension 1
Cell ""
PropName "HDLConfigFile"
}
HDLCActiveTab "0"
}
PropName "Components"
}
Name "Configuration"
CurrentDlgPage "Solver"
}
PropName "ConfigurationSets"
}
Simulink.ConfigSet {
$PropName "ActiveConfigurationSet"
$ObjectID 1
}
BlockDefaults {
Orientation "right"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
NamePlacement "normal"
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
ShowName on
}
BlockParameterDefaults {
Block {
BlockType EnablePort
StatesWhenEnabling "held"
ShowOutputPort off
ZeroCross on
}
Block {
BlockType Gain
Gain "1"
Multiplication "Element-wise(K.*u)"
ParamMin "[]"
ParamMax "[]"
ParameterDataTypeMode "Same as input"
ParameterDataType "fixdt(1,16,0)"
ParameterScalingMode "Best Precision: Matrix-wise"
ParameterScaling "[]"
ParamDataTypeStr "Inherit: Same as input"
OutMin "[]"
OutMax "[]"
OutDataTypeMode "Same as input"
OutDataType "fixdt(1,16,0)"
OutScaling "[]"
OutDataTypeStr "Inherit: Same as input"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Inport
Port "1"
UseBusObject off
BusObject "BusObject"
BusOutputAsStruct off
PortDimensions "-1"
SampleTime "-1"
OutMin "[]"
OutMax "[]"
DataType "auto"
OutDataType "fixdt(1,16,0)"
OutScaling "[]"
OutDataTypeStr "Inherit: auto"
SignalType "auto"
SamplingMode "auto"
LatchByDelayingOutsideSignal off
LatchByCopyingInsideSignal off
Interpolate on
}
Block {
BlockType Mux
Inputs "4"
DisplayOption "none"
UseBusObject off
BusObject "BusObject"
NonVirtualBus off
}
Block {
BlockType Outport
Port "1"
UseBusObject off
BusObject "BusObject"
BusOutputAsStruct off
PortDimensions "-1"
SampleTime "-1"
OutMin "[]"
OutMax "[]"
DataType "auto"
OutDataType "fixdt(1,16,0)"
OutScaling "[]"
OutDataTypeStr "Inherit: auto"
SignalType "auto"
SamplingMode "auto"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Block {
BlockType Scope
ModelBased off
TickLabels "OneTimeTick"
ZoomMode "on"
Grid "on"
TimeRange "auto"
YMin "-5"
YMax "5"
SaveToWorkspace off
SaveName "ScopeData"
LimitDataPoints on
MaxDataPoints "5000"
Decimation "1"
SampleInput off
SampleTime "-1"
}
Block {
BlockType SubSystem
ShowPortLabels "FromPortIcon"
Permissions "ReadWrite"
PermitHierarchicalResolution "All"
TreatAsAtomicUnit off
CheckFcnCallInpInsideContextMsg off
SystemSampleTime "-1"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
SimViewingDevice off
DataTypeOverride "UseLocalSettings"
MinMaxOverflowLogging "UseLocalSettings"
}
Block {
BlockType Merge
Inputs "2"
InitialOutput "[]"
AllowUnequalInputPortWidths off
InputPortOffsets "[]"
}
Block {
BlockType Sin
SineType "Time based"
TimeSource "Use simulation time"
Amplitude "1"
Bias "0"
Frequency "1"
Phase "0"
Samples "10"
Offset "0"
SampleTime "-1"
VectorParams1D on
}
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
UseDisplayTextAsClickCallback off
}
LineDefaults {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
System {
Name "quanbo"
Location [382, 193, 964, 568]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
ReportName "simulink-default.rpt"
Block {
BlockType SubSystem
Name "Enabled\nSubsystem"
Ports [1, 1, 1]
Position [220, 32, 315, 68]
TreatAsAtomicUnit on
MinAlgLoopOccurrences off
PropExecContextOutsideSubsystem off
RTWSystemCode "Auto"
FunctionWithSeparateData off
Opaque off
RequestExecContextInheritance off
MaskHideContents off
System {
Name "Enabled\nSubsystem"
Location [421, 301, 919, 601]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
Block {
BlockType Inport
Name "In1"
Position [110, 103, 140, 117]
IconDisplay "Port number"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Block {
BlockType EnablePort
Name "Enable"
Ports []
Position [235, 20, 255, 40]
}
Block {
BlockType Outport
Name "Out1"
Position [360, 103, 390, 117]
IconDisplay "Port number"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Line {
SrcBlock "In1"
SrcPort 1
DstBlock "Out1"
DstPort 1
}
}
}
Block {
BlockType SubSystem
Name "Enabled\nSubsystem1"
Ports [1, 1, 1]
Position [225, 124, 315, 156]
TreatAsAtomicUnit on
MinAlgLoopOccurrences off
PropExecContextOutsideSubsystem off
RTWSystemCode "Auto"
FunctionWithSeparateData off
Opaque off
RequestExecContextInheritance off
MaskHideContents off
System {
Name "Enabled\nSubsystem1"
Location [421, 301, 919, 601]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
Block {
BlockType Inport
Name "In1"
Position [110, 103, 140, 117]
IconDisplay "Port number"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Block {
BlockType EnablePort
Name "Enable"
Ports []
Position [235, 20, 255, 40]
}
Block {
BlockType Outport
Name "Out1"
Position [360, 103, 390, 117]
IconDisplay "Port number"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Line {
SrcBlock "In1"
SrcPort 1
DstBlock "Out1"
DstPort 1
}
}
}
Block {
BlockType Gain
Name "Gain"
Position [150, 90, 180, 120]
Gain "-1"
ParameterDataTypeMode "Inherit via internal rule"
ParameterDataType "sfix(16)"
ParameterScaling "2^0"
ParamDataTypeStr "Inherit: Inherit via internal rule"
OutDataTypeMode "Inherit via internal rule"
OutDataType "sfix(16)"
OutScaling "2^0"
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Merge
Name "Merge"
Ports [2, 1]
Position [350, 73, 400, 122]
}
Block {
BlockType Mux
Name "Mux"
Ports [2, 1]
Position [445, 34, 450, 96]
ShowName off
Inputs "2"
DisplayOption "bar"
}
Block {
BlockType Scope
Name "Scope"
Ports [1]
Position [510, 37, 560, 103]
Floating off
Location [6, 327, 330, 566]
Open on
NumInputPorts "1"
List {
ListType AxesTitles
axes1 "%<SignalLabel>"
}
DataFormat "StructureWithTime"
SampleTime "0"
}
Block {
BlockType Sin
Name "Sine Wave"
Ports [0, 1]
Position [65, 45, 95, 75]
SampleTime "0"
}
Line {
SrcBlock "Gain"
SrcPort 1
Points [15, 0]
Branch {
Points [70, 0]
DstBlock "Enabled\nSubsystem1"
DstPort enable
}
Branch {
Points [0, 35]
DstBlock "Enabled\nSubsystem1"
DstPort 1
}
}
Line {
SrcBlock "Enabled\nSubsystem1"
SrcPort 1
Points [5, 0; 0, -30]
DstBlock "Merge"
DstPort 2
}
Line {
SrcBlock "Enabled\nSubsystem"
SrcPort 1
Points [5, 0; 0, 35]
DstBlock "Merge"
DstPort 1
}
Line {
SrcBlock "Merge"
SrcPort 1
Points [10, 0; 0, -20]
DstBlock "Mux"
DstPort 2
}
Line {
SrcBlock "Sine Wave"
SrcPort 1
Points [25, 0]
Branch {
Points [0, 45]
DstBlock "Gain"
DstPort 1
}
Branch {
Points [0, -50; 65, 0]
Branch {
Points [0, 40]
DstBlock "Enabled\nSubsystem"
DstPort 1
}
Branch {
Points [70, 0]
Branch {
Points [170, 0]
DstBlock "Mux"
DstPort 1
}
Branch {
Points [0, 9]
DstBlock "Enabled\nSubsystem"
DstPort enable
}
}
}
}
Line {
SrcBlock "Mux"
SrcPort 1
Points [20, 0; 0, 5]
DstBlock "Scope"
DstPort 1
}
}
}
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