scratch.v

来自「fft代码,采用蝶形算法,包括C,matlab和verilog代码」· Verilog 代码 · 共 12 行

module multiplexor(in, select, out);
parameter width = 1, select_bits = 1;
input  [width-1:0][(1<<select_bits)-1:0] in;
input  [select_bits-1:0] select;
output [width-1:0] out;
reg    [width-1:0] out;

always@(posedge clk)
  out = in[select];

endmodule