prev_cmp_led_test.tan.qmsg

买的开发板上自带的例程

{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "clk register first_nios2_system:inst\|cpu_0:the_cpu_0\|av_ld_or_div_done register first_nios2_system:inst\|cpu_0:the_cpu_0\|M_pipe_flush 65.28 MHz 15.318 ns Internal " "Info: Clock \"clk\" has Internal fmax of 65.28 MHz between source register \"first_nios2_system:inst\|cpu_0:the_cpu_0\|av_ld_or_div_done\" and destination register \"first_nios2_system:inst\|cpu_0:the_cpu_0\|M_pipe_flush\" (period= 15.318 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "15.110 ns + Longest register register " "Info: + Longest register to register delay is 15.110 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns first_nios2_system:inst\|cpu_0:the_cpu_0\|av_ld_or_div_done 1 REG LCFF_X18_Y9_N7 45 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X18_Y9_N7; Fanout = 45; REG Node = 'first_nios2_system:inst\|cpu_0:the_cpu_0\|av_ld_or_div_done'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { first_nios2_system:inst|cpu_0:the_cpu_0|av_ld_or_div_done } "NODE_NAME" } } { "cpu_0.v" "" { Text "F:/alter/2sfenpin/liz/led_test/cpu_0.v" 4920 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(2.784 ns) + CELL(0.366 ns) 3.150 ns first_nios2_system:inst\|cpu_0:the_cpu_0\|M_wr_data_unfiltered\[25\]~4105 2 COMB LCCOMB_X16_Y7_N0 1 " "Info: 2: + IC(2.784 ns) + CELL(0.366 ns) = 3.150 ns; Loc. = LCCOMB_X16_Y7_N0; Fanout = 1; COMB Node = 'first_nios2_system:inst\|cpu_0:the_cpu_0\|M_wr_data_unfiltered\[25\]~4105'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.150 ns" { first_nios2_system:inst|cpu_0:the_cpu_0|av_ld_or_div_done first_nios2_system:inst|cpu_0:the_cpu_0|M_wr_data_unfiltered[25]~4105 } "NODE_NAME" } } { "cpu_0.v" "" { Text "F:/alter/2sfenpin/liz/led_test/cpu_0.v" 4752 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.379 ns) + CELL(0.206 ns) 3.735 ns first_nios2_system:inst\|cpu_0:the_cpu_0\|M_wr_data_unfiltered\[25\]~4106 3 COMB LCCOMB_X16_Y7_N18 7 " "Info: 3: + IC(0.379 ns) + CELL(0.206 ns) = 3.735 ns; Loc. = LCCOMB_X16_Y7_N18; Fanout = 7; COMB Node = 'first_nios2_system:inst\|cpu_0:the_cpu_0\|M_wr_data_unfiltered\[25\]~4106'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.585 ns" { first_nios2_system:inst|cpu_0:the_cpu_0|M_wr_data_unfiltered[25]~4105 first_nios2_system:inst|cpu_0:the_cpu_0|M_wr_data_unfiltered[25]~4106 } "NODE_NAME" } } { "cpu_0.v" "" { Text "F:/alter/2sfenpin/liz/led_test/cpu_0.v" 4752 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(2.772 ns) + CELL(0.206 ns) 6.713 ns first_nios2_system:inst\|cpu_0:the_cpu_0\|E_src2\[25\]~2565 4 COMB LCCOMB_X17_Y7_N22 1 " "Info: 4: + IC(2.772 ns) + CELL(0.206 ns) = 6.713 ns; Loc. = LCCOMB_X17_Y7_N22; Fanout = 1; COMB Node = 'first_nios2_system:inst\|cpu_0:the_cpu_0\|E_src2\[25\]~2565'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "2.978 ns" { first_nios2_system:inst|cpu_0:the_cpu_0|M_wr_data_unfiltered[25]~4106 first_nios2_system:inst|cpu_0:the_cpu_0|E_src2[25]~2565 } "NODE_NAME" } } { "cpu_0.v" "" { Text "F:/alter/2sfenpin/liz/led_test/cpu_0.v" 4319 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.358 ns) + CELL(0.206 ns) 7.277 ns first_nios2_system:inst\|cpu_0:the_cpu_0\|E_src2\[25\]~2566 5 COMB LCCOMB_X17_Y7_N18 6 " "Info: 5: + IC(0.358 ns) + CELL(0.206 ns) = 7.277 ns; Loc. = LCCOMB_X17_Y7_N18; Fanout = 6; COMB Node = 'first_nios2_system:inst\|cpu_0:the_cpu_0\|E_src2\[25\]~2566'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.564 ns" { first_nios2_system:inst|cpu_0:the_cpu_0|E_src2[25]~2565 first_nios2_system:inst|cpu_0:the_cpu_0|E_src2[25]~2566 } "NODE_NAME" } } { "cpu_0.v" "" { Text "F:/alter/2sfenpin/liz/led_test/cpu_0.v" 4319 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(2.407 ns) + CELL(0.621 ns) 10.305 ns first_nios2_system:inst\|cpu_0:the_cpu_0\|Add8~447 6 COMB LCCOMB_X18_Y7_N2 2 " "Info: 6: + IC(2.407 ns) + CELL(0.621 ns) = 10.305 ns; Loc. = LCCOMB_X18_Y7_N2; Fanout = 2; COMB Node = 'first_nios2_system:inst\|cpu_0:the_cpu_0\|Add8~447'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.028 ns" { first_nios2_system:inst|cpu_0:the_cpu_0|E_src2[25]~2566 first_nios2_system:inst|cpu_0:the_cpu_0|Add8~447 } "NODE_NAME" } } { "cpu_0.v" "" { Text "F:/alter/2sfenpin/liz/led_test/cpu_0.v" 6603 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 10.391 ns first_nios2_system:inst\|cpu_0:the_cpu_0\|Add8~449 7 COMB LCCOMB_X18_Y7_N4 2 " "Info: 7: + IC(0.000 ns) + CELL(0.086 ns) = 10.391 ns; Loc. = LCCOMB_X18_Y7_N4; Fanout = 2; COMB Node = 'first_nios2_system:inst\|cpu_0:the_cpu_0\|Add8~449'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { first_nios2_system:inst|cpu_0:the_cpu_0|Add8~447 first_nios2_system:inst|cpu_0:the_cpu_0|Add8~449 } "NODE_NAME" } } { "cpu_0.v" "" { Text "F:/alter/2sfenpin/liz/led_test/cpu_0.v" 6603 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 10.477 ns first_nios2_system:inst\|cpu_0:the_cpu_0\|Add8~451 8 COMB LCCOMB_X18_Y7_N6 2 " "Info: 8: + IC(0.000 ns) + CELL(0.086 ns) = 10.477 ns; Loc. = LCCOMB_X18_Y7_N6; Fanout = 2; COMB Node = 'first_nios2_system:inst\|cpu_0:the_cpu_0\|Add8~451'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { first_nios2_system:inst|cpu_0:the_cpu_0|Add8~449 first_nios2_system:inst|cpu_0:the_cpu_0|Add8~451 } "NODE_NAME" } } { "cpu_0.v" "" { Text "F:/alter/2sfenpin/liz/led_test/cpu_0.v" 6603 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 10.563 ns first_nios2_system:inst\|cpu_0:the_cpu_0\|Add8~453 9 COMB LCCOMB_X18_Y7_N8 2 " "Info: 9: + IC(0.000 ns) + CELL(0.086 ns) = 10.563 ns; Loc. = LCCOMB_X18_Y7_N8; Fanout = 2; COMB Node = 'first_nios2_system:inst\|cpu_0:the_cpu_0\|Add8~453'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { first_nios2_system:inst|cpu_0:the_cpu_0|Add8~451 first_nios2_system:inst|cpu_0:the_cpu_0|Add8~453 } "NODE_NAME" } } { "cpu_0.v" "" { Text "F:/alter/2sfenpin/liz/led_test/cpu_0.v" 6603 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 10.649 ns first_nios2_system:inst\|cpu_0:the_cpu_0\|Add8~455 10 COMB LCCOMB_X18_Y7_N10 2 " "Info: 10: + IC(0.000 ns) + CELL(0.086 ns) = 10.649 ns; Loc. = LCCOMB_X18_Y7_N10; Fanout = 2; COMB Node = 'first_nios2_system:inst\|cpu_0:the_cpu_0\|Add8~455'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { first_nios2_system:inst|cpu_0:the_cpu_0|Add8~453 first_nios2_system:inst|cpu_0:the_cpu_0|Add8~455 } "NODE_NAME" } } { "cpu_0.v" "" { Text "F:/alter/2sfenpin/liz/led_test/cpu_0.v" 6603 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 10.735 ns first_nios2_system:inst\|cpu_0:the_cpu_0\|Add8~457 11 COMB LCCOMB_X18_Y7_N12 2 " "Info: 11: + IC(0.000 ns) + CELL(0.086 ns) = 10.735 ns; Loc. = LCCOMB_X18_Y7_N12; Fanout = 2; COMB Node = 'first_nios2_system:inst\|cpu_0:the_cpu_0\|Add8~457'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { first_nios2_system:inst|cpu_0:the_cpu_0|Add8~455 first_nios2_system:inst|cpu_0:the_cpu_0|Add8~457 } "NODE_NAME" } } { "cpu_0.v" "" { Text "F:/alter/2sfenpin/liz/led_test/cpu_0.v" 6603 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.190 ns) 10.925 ns first_nios2_system:inst\|cpu_0:the_cpu_0\|Add8~459 12 COMB LCCOMB_X18_Y7_N14 1 " "Info: 12: + IC(0.000 ns) + CELL(0.190 ns) = 10.925 ns; Loc. = LCCOMB_X18_Y7_N14; Fanout = 1; COMB Node = 'first_nios2_system:inst\|cpu_0:the_cpu_0\|Add8~459'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.190 ns" { first_nios2_system:inst|cpu_0:the_cpu_0|Add8~457 first_nios2_system:inst|cpu_0:the_cpu_0|Add8~459 } "NODE_NAME" } } { "cpu_0.v" "" { Text "F:/alter/2sfenpin/liz/led_test/cpu_0.v" 6603 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.506 ns) 11.431 ns first_nios2_system:inst\|cpu_0:the_cpu_0\|Add8~460 13 COMB LCCOMB_X18_Y7_N16 1 " "Info: 13: + IC(0.000 ns) + CELL(0.506 ns) = 11.431 ns; Loc. = LCCOMB_X18_Y7_N16; Fanout = 1; COMB Node = 'first_nios2_system:inst\|cpu_0:the_cpu_0\|Add8~460'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.506 ns" { first_nios2_system:inst|cpu_0:the_cpu_0|Add8~459 first_nios2_system:inst|cpu_0:the_cpu_0|Add8~460 } "NODE_NAME" } } { "cpu_0.v" "" { Text "F:/alter/2sfenpin/liz/led_test/cpu_0.v" 6603 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.376 ns) + CELL(0.366 ns) 12.173 ns first_nios2_system:inst\|cpu_0:the_cpu_0\|E_arith_result\[32\]~55 14 COMB LCCOMB_X18_Y7_N26 1 " "Info: 14: + IC(0.376 ns) + CELL(0.366 ns) = 12.173 ns; Loc. = LCCOMB_X18_Y7_N26; Fanout = 1; COMB Node = 'first_nios2_system:inst\|cpu_0:the_cpu_0\|E_arith_result\[32\]~55'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.742 ns" { first_nios2_system:inst|cpu_0:the_cpu_0|Add8~460 first_nios2_system:inst|cpu_0:the_cpu_0|E_arith_result[32]~55 } "NODE_NAME" } } { "cpu_0.v" "" { Text "F:/alter/2sfenpin/liz/led_test/cpu_0.v" 4067 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.368 ns) + CELL(0.206 ns) 12.747 ns first_nios2_system:inst\|cpu_0:the_cpu_0\|E_br_actually_taken~187 15 COMB LCCOMB_X18_Y7_N28 4 " "Info: 15: + IC(0.368 ns) + CELL(0.206 ns) = 12.747 ns; Loc. = LCCOMB_X18_Y7_N28; Fanout = 4; COMB Node = 'first_nios2_system:inst\|cpu_0:the_cpu_0\|E_br_actually_taken~187'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.574 ns" { first_nios2_system:inst|cpu_0:the_cpu_0|E_arith_result[32]~55 first_nios2_system:inst|cpu_0:the_cpu_0|E_br_actually_taken~187 } "NODE_NAME" } } { "cpu_0.v" "" { Text "F:/alter/2sfenpin/liz/led_test/cpu_0.v" 4070 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.477 ns) + CELL(0.206 ns) 14.430 ns first_nios2_system:inst\|cpu_0:the_cpu_0\|M_pipe_flush_nxt~183 16 COMB LCCOMB_X12_Y7_N0 1 " "Info: 16: + IC(1.477 ns) + CELL(0.206 ns) = 14.430 ns; Loc. = LCCOMB_X12_Y7_N0; Fanout = 1; COMB Node = 'first_nios2_system:inst\|cpu_0:the_cpu_0\|M_pipe_flush_nxt~183'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.683 ns" { first_nios2_system:inst|cpu_0:the_cpu_0|E_br_actually_taken~187 first_nios2_system:inst|cpu_0:the_cpu_0|M_pipe_flush_nxt~183 } "NODE_NAME" } } { "cpu_0.v" "" { Text "F:/alter/2sfenpin/liz/led_test/cpu_0.v" 4730 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.366 ns) + CELL(0.206 ns) 15.002 ns first_nios2_system:inst\|cpu_0:the_cpu_0\|M_pipe_flush_nxt~184 17 COMB LCCOMB_X12_Y7_N14 1 " "Info: 17: + IC(0.366 ns) + CELL(0.206 ns) = 15.002 ns; Loc. = LCCOMB_X12_Y7_N14; Fanout = 1; COMB Node = 'first_nios2_system:inst\|cpu_0:the_cpu_0\|M_pipe_flush_nxt~184'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.572 ns" { first_nios2_system:inst|cpu_0:the_cpu_0|M_pipe_flush_nxt~183 first_nios2_system:inst|cpu_0:the_cpu_0|M_pipe_flush_nxt~184 } "NODE_NAME" } } { "cpu_0.v" "" { Text "F:/alter/2sfenpin/liz/led_test/cpu_0.v" 4730 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.108 ns) 15.110 ns first_nios2_system:inst\|cpu_0:the_cpu_0\|M_pipe_flush 18 REG LCFF_X12_Y7_N15 11 " "Info: 18: + IC(0.000 ns) + CELL(0.108 ns) = 15.110 ns; Loc. = LCFF_X12_Y7_N15; Fanout = 11; REG Node = 'first_nios2_system:inst\|cpu_0:the_cpu_0\|M_pipe_flush'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.108 ns" { first_nios2_system:inst|cpu_0:the_cpu_0|M_pipe_flush_nxt~184 first_nios2_system:inst|cpu_0:the_cpu_0|M_pipe_flush } "NODE_NAME" } } { "cpu_0.v" "" { Text "F:/alter/2sfenpin/liz/led_test/cpu_0.v" 4727 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.823 ns ( 25.30 % ) " "Info: Total cell delay = 3.823 ns ( 25.30 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "11.287 ns ( 74.70 % ) " "Info: Total interconnect delay = 11.287 ns ( 74.70 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "15.110 ns" { first_nios2_system:inst|cpu_0:the_cpu_0|av_ld_or_div_done first_nios2_system:inst|cpu_0:the_cpu_0|M_wr_data_unfiltered[25]~4105 first_nios2_system:inst|cpu_0:the_cpu_0|M_wr_data_unfiltered[25]~4106 first_nios2_system:inst|cpu_0:the_cpu_0|E_src2[25]~2565 first_nios2_system:inst|cpu_0:the_cpu_0|E_src2[25]~2566 first_nios2_system:inst|cpu_0:the_cpu_0|Add8~447 first_nios2_system:inst|cpu_0:the_cpu_0|Add8~449 first_nios2_system:inst|cpu_0:the_cpu_0|Add8~451 first_nios2_system:inst|cpu_0:the_cpu_0|Add8~453 first_nios2_system:inst|cpu_0:the_cpu_0|Add8~455 first_nios2_system:inst|cpu_0:the_cpu_0|Add8~457 first_nios2_system:inst|cpu_0:the_cpu_0|Add8~459 first_nios2_system:inst|cpu_0:the_cpu_0|Add8~460 first_nios2_system:inst|cpu_0:the_cpu_0|E_arith_result[32]~55 first_nios2_system:inst|cpu_0:the_cpu_0|E_br_actually_taken~187 first_nios2_system:inst|cpu_0:the_cpu_0|M_pipe_flush_nxt~183 first_nios2_system:inst|cpu_0:the_cpu_0|M_pipe_flush_nxt~184 first_nios2_system:inst|cpu_0:the_cpu_0|M_pipe_flush } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "15.110 ns" { first_nios2_system:inst|cpu_0:the_cpu_0|av_ld_or_div_done {} first_nios2_system:inst|cpu_0:the_cpu_0|M_wr_data_unfiltered[25]~4105 {} first_nios2_system:inst|cpu_0:the_cpu_0|M_wr_data_unfiltered[25]~4106 {} first_nios2_system:inst|cpu_0:the_cpu_0|E_src2[25]~2565 {} first_nios2_system:inst|cpu_0:the_cpu_0|E_src2[25]~2566 {} first_nios2_system:inst|cpu_0:the_cpu_0|Add8~447 {} first_nios2_system:inst|cpu_0:the_cpu_0|Add8~449 {} first_nios2_system:inst|cpu_0:the_cpu_0|Add8~451 {} first_nios2_system:inst|cpu_0:the_cpu_0|Add8~453 {} first_nios2_system:inst|cpu_0:the_cpu_0|Add8~455 {} first_nios2_system:inst|cpu_0:the_cpu_0|Add8~457 {} first_nios2_system:inst|cpu_0:the_cpu_0|Add8~459 {} first_nios2_system:inst|cpu_0:the_cpu_0|Add8~460 {} first_nios2_system:inst|cpu_0:the_cpu_0|E_arith_result[32]~55 {} first_nios2_system:inst|cpu_0:the_cpu_0|E_br_actually_taken~187 {} first_nios2_system:inst|cpu_0:the_cpu_0|M_pipe_flush_nxt~183 {} first_nios2_system:inst|cpu_0:the_cpu_0|M_pipe_flush_nxt~184 {} first_nios2_system:inst|cpu_0:the_cpu_0|M_pipe_flush {} } { 0.000ns 2.784ns 0.379ns 2.772ns 0.358ns 2.407ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.376ns 0.368ns 1.477ns 0.366ns 0.000ns } { 0.000ns 0.366ns 0.206ns 0.206ns 0.206ns 0.621ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.190ns 0.506ns 0.366ns 0.206ns 0.206ns 0.206ns 0.108ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.056 ns - Smallest " "Info: - Smallest clock skew is 0.056 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 2.809 ns + Shortest register " "Info: + Shortest clock path from clock \"clk\" to destination register is 2.809 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.090 ns) 1.090 ns clk 1 CLK PIN_17 1 " "Info: 1: + IC(0.000 ns) + CELL(1.090 ns) = 1.090 ns; Loc. = PIN_17; Fanout = 1; CLK Node = 'clk'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "led_test.bdf" "" { Schematic "F:/alter/2sfenpin/liz/led_test/led_test.bdf" { { 160 16 184 176 "clk" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.139 ns) + CELL(0.000 ns) 1.229 ns clk~clkctrl 2 COMB CLKCTRL_G2 1378 " "Info: 2: + IC(0.139 ns) + CELL(0.000 ns) = 1.229 ns; Loc. = CLKCTRL_G2; Fanout = 1378; COMB Node = 'clk~clkctrl'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.139 ns" { clk clk~clkctrl } "NODE_NAME" } } { "led_test.bdf" "" { Schematic "F:/alter/2sfenpin/liz/led_test/led_test.bdf" { { 160 16 184 176 "clk" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.914 ns) + CELL(0.666 ns) 2.809 ns first_nios2_system:inst\|cpu_0:the_cpu_0\|M_pipe_flush 3 REG LCFF_X12_Y7_N15 11 " "Info: 3: + IC(0.914 ns) + CELL(0.666 ns) = 2.809 ns; Loc. = LCFF_X12_Y7_N15; Fanout = 11; REG Node = 'first_nios2_system:inst\|cpu_0:the_cpu_0\|M_pipe_flush'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.580 ns" { clk~clkctrl first_nios2_system:inst|cpu_0:the_cpu_0|M_pipe_flush } "NODE_NAME" } } { "cpu_0.v" "" { Text "F:/alter/2sfenpin/liz/led_test/cpu_0.v" 4727 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.756 ns ( 62.51 % ) " "Info: Total cell delay = 1.756 ns ( 62.51 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.053 ns ( 37.49 % ) " "Info: Total interconnect delay = 1.053 ns ( 37.49 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "2.809 ns" { clk clk~clkctrl first_nios2_system:inst|cpu_0:the_cpu_0|M_pipe_flush } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "2.809 ns" { clk {} clk~combout {} clk~clkctrl {} first_nios2_system:inst|cpu_0:the_cpu_0|M_pipe_flush {} } { 0.000ns 0.000ns 0.139ns 0.914ns } { 0.000ns 1.090ns 0.000ns 0.666ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 2.753 ns - Longest register " "Info: - Longest clock path from clock \"clk\" to source register is 2.753 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.090 ns) 1.090 ns clk 1 CLK PIN_17 1 " "Info: 1: + IC(0.000 ns) + CELL(1.090 ns) = 1.090 ns; Loc. = PIN_17; Fanout = 1; CLK Node = 'clk'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "led_test.bdf" "" { Schematic "F:/alter/2sfenpin/liz/led_test/led_test.bdf" { { 160 16 184 176 "clk" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.139 ns) + CELL(0.000 ns) 1.229 ns clk~clkctrl 2 COMB CLKCTRL_G2 1378 " "Info: 2: + IC(0.139 ns) + CELL(0.000 ns) = 1.229 ns; Loc. = CLKCTRL_G2; Fanout = 1378; COMB Node = 'clk~clkctrl'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.139 ns" { clk clk~clkctrl } "NODE_NAME" } } { "led_test.bdf" "" { Schematic "F:/alter/2sfenpin/liz/led_test/led_test.bdf" { { 160 16 184 176 "clk" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.858 ns) + CELL(0.666 ns) 2.753 ns first_nios2_system:inst\|cpu_0:the_cpu_0\|av_ld_or_div_done 3 REG LCFF_X18_Y9_N7 45 " "Info: 3: + IC(0.858 ns) + CELL(0.666 ns) = 2.753 ns; Loc. = LCFF_X18_Y9_N7; Fanout = 45; REG Node = 'first_nios2_system:inst\|cpu_0:the_cpu_0\|av_ld_or_div_done'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.524 ns" { clk~clkctrl first_nios2_system:inst|cpu_0:the_cpu_0|av_ld_or_div_done } "NODE_NAME" } } { "cpu_0.v" "" { Text "F:/alter/2sfenpin/liz/led_test/cpu_0.v" 4920 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.756 ns ( 63.78 % ) " "Info: Total cell delay = 1.756 ns ( 63.78 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.997 ns ( 36.22 % ) " "Info: Total interconnect delay = 0.997 ns ( 36.22 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "2.753 ns" { clk clk~clkctrl first_nios2_system:inst|cpu_0:the_cpu_0|av_ld_or_div_done } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "2.753 ns" { clk {} clk~combout {} clk~clkctrl {} first_nios2_system:inst|cpu_0:the_cpu_0|av_ld_or_div_done {} } { 0.000ns 0.000ns 0.139ns 0.858ns } { 0.000ns 1.090ns 0.000ns 0.666ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "2.809 ns" { clk clk~clkctrl first_nios2_system:inst|cpu_0:the_cpu_0|M_pipe_flush } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "2.809 ns" { clk {} clk~combout {} clk~clkctrl {} first_nios2_system:inst|cpu_0:the_cpu_0|M_pipe_flush {} } { 0.000ns 0.000ns 0.139ns 0.914ns } { 0.000ns 1.090ns 0.000ns 0.666ns } "" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "2.753 ns" { clk clk~clkctrl first_nios2_system:inst|cpu_0:the_cpu_0|av_ld_or_div_done } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "2.753 ns" { clk {} clk~combout {} clk~clkctrl {} first_nios2_system:inst|cpu_0:the_cpu_0|av_ld_or_div_done {} } { 0.000ns 0.000ns 0.139ns 0.858ns } { 0.000ns 1.090ns 0.000ns 0.666ns } "" } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.304 ns + " "Info: + Micro clock to output delay of source is 0.304 ns" {  } { { "cpu_0.v" "" { Text "F:/alter/2sfenpin/liz/led_test/cpu_0.v" 4920 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TSU_DELAY" "-0.040 ns + " "Info: + Micro setup delay of destination is -0.040 ns" {  } { { "cpu_0.v" "" { Text "F:/alter/2sfenpin/liz/led_test/cpu_0.v" 4727 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "15.110 ns" { first_nios2_system:inst|cpu_0:the_cpu_0|av_ld_or_div_done first_nios2_system:inst|cpu_0:the_cpu_0|M_wr_data_unfiltered[25]~4105 first_nios2_system:inst|cpu_0:the_cpu_0|M_wr_data_unfiltered[25]~4106 first_nios2_system:inst|cpu_0:the_cpu_0|E_src2[25]~2565 first_nios2_system:inst|cpu_0:the_cpu_0|E_src2[25]~2566 first_nios2_system:inst|cpu_0:the_cpu_0|Add8~447 first_nios2_system:inst|cpu_0:the_cpu_0|Add8~449 first_nios2_system:inst|cpu_0:the_cpu_0|Add8~451 first_nios2_system:inst|cpu_0:the_cpu_0|Add8~453 first_nios2_system:inst|cpu_0:the_cpu_0|Add8~455 first_nios2_system:inst|cpu_0:the_cpu_0|Add8~457 first_nios2_system:inst|cpu_0:the_cpu_0|Add8~459 first_nios2_system:inst|cpu_0:the_cpu_0|Add8~460 first_nios2_system:inst|cpu_0:the_cpu_0|E_arith_result[32]~55 first_nios2_system:inst|cpu_0:the_cpu_0|E_br_actually_taken~187 first_nios2_system:inst|cpu_0:the_cpu_0|M_pipe_flush_nxt~183 first_nios2_system:inst|cpu_0:the_cpu_0|M_pipe_flush_nxt~184 first_nios2_system:inst|cpu_0:the_cpu_0|M_pipe_flush } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "15.110 ns" { first_nios2_system:inst|cpu_0:the_cpu_0|av_ld_or_div_done {} first_nios2_system:inst|cpu_0:the_cpu_0|M_wr_data_unfiltered[25]~4105 {} first_nios2_system:inst|cpu_0:the_cpu_0|M_wr_data_unfiltered[25]~4106 {} first_nios2_system:inst|cpu_0:the_cpu_0|E_src2[25]~2565 {} first_nios2_system:inst|cpu_0:the_cpu_0|E_src2[25]~2566 {} first_nios2_system:inst|cpu_0:the_cpu_0|Add8~447 {} first_nios2_system:inst|cpu_0:the_cpu_0|Add8~449 {} first_nios2_system:inst|cpu_0:the_cpu_0|Add8~451 {} first_nios2_system:inst|cpu_0:the_cpu_0|Add8~453 {} first_nios2_system:inst|cpu_0:the_cpu_0|Add8~455 {} first_nios2_system:inst|cpu_0:the_cpu_0|Add8~457 {} first_nios2_system:inst|cpu_0:the_cpu_0|Add8~459 {} first_nios2_system:inst|cpu_0:the_cpu_0|Add8~460 {} first_nios2_system:inst|cpu_0:the_cpu_0|E_arith_result[32]~55 {} first_nios2_system:inst|cpu_0:the_cpu_0|E_br_actually_taken~187 {} first_nios2_system:inst|cpu_0:the_cpu_0|M_pipe_flush_nxt~183 {} first_nios2_system:inst|cpu_0:the_cpu_0|M_pipe_flush_nxt~184 {} first_nios2_system:inst|cpu_0:the_cpu_0|M_pipe_flush {} } { 0.000ns 2.784ns 0.379ns 2.772ns 0.358ns 2.407ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.376ns 0.368ns 1.477ns 0.366ns 0.000ns } { 0.000ns 0.366ns 0.206ns 0.206ns 0.206ns 0.621ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.190ns 0.506ns 0.366ns 0.206ns 0.206ns 0.206ns 0.108ns } "" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "2.809 ns" { clk clk~clkctrl first_nios2_system:inst|cpu_0:the_cpu_0|M_pipe_flush } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "2.809 ns" { clk {} clk~combout {} clk~clkctrl {} first_nios2_system:inst|cpu_0:the_cpu_0|M_pipe_flush {} } { 0.000ns 0.000ns 0.139ns 0.914ns } { 0.000ns 1.090ns 0.000ns 0.666ns } "" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "2.753 ns" { clk clk~clkctrl first_nios2_system:inst|cpu_0:the_cpu_0|av_ld_or_div_done } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "2.753 ns" { clk {} clk~combout {} clk~clkctrl {} first_nios2_system:inst|cpu_0:the_cpu_0|av_ld_or_div_done {} } { 0.000ns 0.000ns 0.139ns 0.858ns } { 0.000ns 1.090ns 0.000ns 0.666ns } "" } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0 "" 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "altera_internal_jtag~TCKUTAP register first_nios2_system:inst\|cpu_0:the_cpu_0\|cpu_0_nios2_oci:the_cpu_0_nios2_oci\|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper\|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1\|sr\[0\] register sld_hub:sld_hub_inst\|hub_tdo_reg 151.06 MHz 6.62 ns Internal " "Info: Clock \"altera_internal_jtag~TCKUTAP\" has Internal fmax of 151.06 MHz between source register \"first_nios2_system:inst\|cpu_0:the_cpu_0\|cpu_0_nios2_oci:the_cpu_0_nios2_oci\|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper\|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1\|sr\[0\]\" and destination register \"sld_hub:sld_hub_inst\|hub_tdo_reg\" (period= 6.62 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "3.040 ns + Longest register register " "Info: + Longest register to register delay is 3.040 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns first_nios2_system:inst\|cpu_0:the_cpu_0\|cpu_0_nios2_oci:the_cpu_0_nios2_oci\|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper\|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1\|sr\[0\] 1 REG LCFF_X21_Y14_N13 2 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X21_Y14_N13; Fanout = 2; REG Node = 'first_nios2_system:inst\|cpu_0:the_cpu_0\|cpu_0_nios2_oci:the_cpu_0_nios2_oci\|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper\|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1\|sr\[0\]'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { first_nios2_system:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[0] } "NODE_NAME" } } { "cpu_0_jtag_debug_module.v" "" { Text "F:/alter/2sfenpin/liz/led_test/cpu_0_jtag_debug_module.v" 230 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.064 ns) + CELL(0.651 ns) 1.715 ns sld_hub:sld_hub_inst\|hub_tdo_reg~294 2 COMB LCCOMB_X19_Y14_N0 1 " "Info: 2: + IC(1.064 ns) + CELL(0.651 ns) = 1.715 ns; Loc. = LCCOMB_X19_Y14_N0; Fanout = 1; COMB Node = 'sld_hub:sld_hub_inst\|hub_tdo_reg~294'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.715 ns" { first_nios2_system:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[0] sld_hub:sld_hub_inst|hub_tdo_reg~294 } "NODE_NAME" } } { "d:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "d:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd" 385 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.011 ns) + CELL(0.206 ns) 2.932 ns sld_hub:sld_hub_inst\|hub_tdo_reg~295 3 COMB LCCOMB_X18_Y15_N24 1 " "Info: 3: + IC(1.011 ns) + CELL(0.206 ns) = 2.932 ns; Loc. = LCCOMB_X18_Y15_N24; Fanout = 1; COMB Node = 'sld_hub:sld_hub_inst\|hub_tdo_reg~295'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.217 ns" { sld_hub:sld_hub_inst|hub_tdo_reg~294 sld_hub:sld_hub_inst|hub_tdo_reg~295 } "NODE_NAME" } } { "d:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "d:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd" 385 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.108 ns) 3.040 ns sld_hub:sld_hub_inst\|hub_tdo_reg 4 REG LCFF_X18_Y15_N25 2 " "Info: 4: + IC(0.000 ns) + CELL(0.108 ns) = 3.040 ns; Loc. = LCFF_X18_Y15_N25; Fanout = 2; REG Node = 'sld_hub:sld_hub_inst\|hub_tdo_reg'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.108 ns" { sld_hub:sld_hub_inst|hub_tdo_reg~295 sld_hub:sld_hub_inst|hub_tdo_reg } "NODE_NAME" } } { "d:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "d:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd" 385 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.965 ns ( 31.74 % ) " "Info: Total cell delay = 0.965 ns ( 31.74 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.075 ns ( 68.26 % ) " "Info: Total interconnect delay = 2.075 ns ( 68.26 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.040 ns" { first_nios2_system:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[0] sld_hub:sld_hub_inst|hub_tdo_reg~294 sld_hub:sld_hub_inst|hub_tdo_reg~295 sld_hub:sld_hub_inst|hub_tdo_reg } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "3.040 ns" { first_nios2_system:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[0] {} sld_hub:sld_hub_inst|hub_tdo_reg~294 {} sld_hub:sld_hub_inst|hub_tdo_reg~295 {} sld_hub:sld_hub_inst|hub_tdo_reg {} } { 0.000ns 1.064ns 1.011ns 0.000ns } { 0.000ns 0.651ns 0.206ns 0.108ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-0.006 ns - Smallest " "Info: - Smallest clock skew is -0.006 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "altera_internal_jtag~TCKUTAP destination 5.398 ns + Shortest register " "Info: + Shortest clock path from clock \"altera_internal_jtag~TCKUTAP\" to destination register is 5.398 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns altera_internal_jtag~TCKUTAP 1 CLK JTAG_X1_Y10_N0 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = JTAG_X1_Y10_N0; Fanout = 1; CLK Node = 'altera_internal_jtag~TCKUTAP'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { altera_internal_jtag~TCKUTAP } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(3.831 ns) + CELL(0.000 ns) 3.831 ns altera_internal_jtag~TCKUTAPclkctrl 2 COMB CLKCTRL_G3 152 " "Info: 2: + IC(3.831 ns) + CELL(0.000 ns) = 3.831 ns; Loc. = CLKCTRL_G3; Fanout = 152; COMB Node = 'altera_internal_jtag~TCKUTAPclkctrl'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.831 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.901 ns) + CELL(0.666 ns) 5.398 ns sld_hub:sld_hub_inst\|hub_tdo_reg 3 REG LCFF_X18_Y15_N25 2 " "Info: 3: + IC(0.901 ns) + CELL(0.666 ns) = 5.398 ns; Loc. = LCFF_X18_Y15_N25; Fanout = 2; REG Node = 'sld_hub:sld_hub_inst\|hub_tdo_reg'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.567 ns" { altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|hub_tdo_reg } "NODE_NAME" } } { "d:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "d:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd" 385 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.666 ns ( 12.34 % ) " "Info: Total cell delay = 0.666 ns ( 12.34 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.732 ns ( 87.66 % ) " "Info: Total interconnect delay = 4.732 ns ( 87.66 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "5.398 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|hub_tdo_reg } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "5.398 ns" { altera_internal_jtag~TCKUTAP {} altera_internal_jtag~TCKUTAPclkctrl {} sld_hub:sld_hub_inst|hub_tdo_reg {} } { 0.000ns 3.831ns 0.901ns } { 0.000ns 0.000ns 0.666ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "altera_internal_jtag~TCKUTAP source 5.404 ns - Longest register " "Info: - Longest clock path from clock \"altera_internal_jtag~TCKUTAP\" to source register is 5.404 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns altera_internal_jtag~TCKUTAP 1 CLK JTAG_X1_Y10_N0 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = JTAG_X1_Y10_N0; Fanout = 1; CLK Node = 'altera_internal_jtag~TCKUTAP'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { altera_internal_jtag~TCKUTAP } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(3.831 ns) + CELL(0.000 ns) 3.831 ns altera_internal_jtag~TCKUTAPclkctrl 2 COMB CLKCTRL_G3 152 " "Info: 2: + IC(3.831 ns) + CELL(0.000 ns) = 3.831 ns; Loc. = CLKCTRL_G3; Fanout = 152; COMB Node = 'altera_internal_jtag~TCKUTAPclkctrl'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.831 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.907 ns) + CELL(0.666 ns) 5.404 ns first_nios2_system:inst\|cpu_0:the_cpu_0\|cpu_0_nios2_oci:the_cpu_0_nios2_oci\|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper\|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1\|sr\[0\] 3 REG LCFF_X21_Y14_N13 2 " "Info: 3: + IC(0.907 ns) + CELL(0.666 ns) = 5.404 ns; Loc. = LCFF_X21_Y14_N13; Fanout = 2; REG Node = 'first_nios2_system:inst\|cpu_0:the_cpu_0\|cpu_0_nios2_oci:the_cpu_0_nios2_oci\|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper\|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1\|sr\[0\]'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.573 ns" { altera_internal_jtag~TCKUTAPclkctrl first_nios2_system:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[0] } "NODE_NAME" } } { "cpu_0_jtag_debug_module.v" "" { Text "F:/alter/2sfenpin/liz/led_test/cpu_0_jtag_debug_module.v" 230 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.666 ns ( 12.32 % ) " "Info: Total cell delay = 0.666 ns ( 12.32 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.738 ns ( 87.68 % ) " "Info: Total interconnect delay = 4.738 ns ( 87.68 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "5.404 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl first_nios2_system:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[0] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "5.404 ns" { altera_internal_jtag~TCKUTAP {} altera_internal_jtag~TCKUTAPclkctrl {} first_nios2_system:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[0] {} } { 0.000ns 3.831ns 0.907ns } { 0.000ns 0.000ns 0.666ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "5.398 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|hub_tdo_reg } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "5.398 ns" { altera_internal_jtag~TCKUTAP {} altera_internal_jtag~TCKUTAPclkctrl {} sld_hub:sld_hub_inst|hub_tdo_reg {} } { 0.000ns 3.831ns 0.901ns } { 0.000ns 0.000ns 0.666ns } "" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "5.404 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl first_nios2_system:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[0] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "5.404 ns" { altera_internal_jtag~TCKUTAP {} altera_internal_jtag~TCKUTAPclkctrl {} first_nios2_system:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[0] {} } { 0.000ns 3.831ns 0.907ns } { 0.000ns 0.000ns 0.666ns } "" } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.304 ns + " "Info: + Micro clock to output delay of source is 0.304 ns" {  } { { "cpu_0_jtag_debug_module.v" "" { Text "F:/alter/2sfenpin/liz/led_test/cpu_0_jtag_debug_module.v" 230 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TSU_DELAY" "-0.040 ns + " "Info: + Micro setup delay of destination is -0.040 ns" {  } { { "d:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "d:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd" 385 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0 "" 0} { "Info" "ITDB_INVERTED_CLOCK_FOUND" "" "Info: Delay path is controlled by inverted clocks -- if clock duty cycle is 50%, fmax is divided by two" {  } { { "cpu_0_jtag_debug_module.v" "" { Text "F:/alter/2sfenpin/liz/led_test/cpu_0_jtag_debug_module.v" 230 -1 0 } } { "d:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "d:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd" 385 -1 0 } }  } 0 0 "Delay path is controlled by inverted clocks -- if clock duty cycle is 50%, fmax is divided by two" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.040 ns" { first_nios2_system:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[0] sld_hub:sld_hub_inst|hub_tdo_reg~294 sld_hub:sld_hub_inst|hub_tdo_reg~295 sld_hub:sld_hub_inst|hub_tdo_reg } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "3.040 ns" { first_nios2_system:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[0] {} sld_hub:sld_hub_inst|hub_tdo_reg~294 {} sld_hub:sld_hub_inst|hub_tdo_reg~295 {} sld_hub:sld_hub_inst|hub_tdo_reg {} } { 0.000ns 1.064ns 1.011ns 0.000ns } { 0.000ns 0.651ns 0.206ns 0.108ns } "" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "5.398 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|hub_tdo_reg } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "5.398 ns" { altera_internal_jtag~TCKUTAP {} altera_internal_jtag~TCKUTAPclkctrl {} sld_hub:sld_hub_inst|hub_tdo_reg {} } { 0.000ns 3.831ns 0.901ns } { 0.000ns 0.000ns 0.666ns } "" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "5.404 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl first_nios2_system:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[0] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "5.404 ns" { altera_internal_jtag~TCKUTAP {} altera_internal_jtag~TCKUTAPclkctrl {} first_nios2_system:inst|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|sr[0] {} } { 0.000ns 3.831ns 0.907ns } { 0.000ns 0.000ns 0.666ns } "" } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0 "" 0}